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ManualsBrandsPimoroni Manuals<10A DC ControllersDRV8830 DC Motor Driver Breakout

Table Of Contents

2.75 V to 6.8 V

DRV8830

Brushed DC

Motor Driver

BDC

SCL

1.3-A peak

Controller

Protection

SDA

Product

Folder

Sample &

Buy

Technical

Documents

Tools &

Software

Support &

Community

DRV8830

SLVSAB2G –MAY 2010–REVISED DECEMBER 2015

DRV8830 Low-Voltage Motor Driver With Serial Interface

1 Features 3 Description

The DRV8830 device provides an integrated motor

• H-Bridge Voltage-Controlled Motor Driver

driver solution for battery-powered toys, printers, and

– Drives DC Motor, One Winding of a Stepper

other low-voltage or battery-powered motion control

Motor, or Other Actuators/Loads

applications. The device has one H-bridge driver, and

– Efficient PWM Voltage Control for Constant

can drive one DC motor or one winding of a stepper

motor, as well as other loads like solenoids. The

Motor Speed With Varying Supply Voltages

output driver block consists of N-channel and P-

– Low MOSFET On-Resistance:

channel power MOSFETs configured as an H-bridge

HS + LS 450 mΩ

to drive the motor winding.

• 1-A Maximum DC/RMS or Peak Drive Current

Provided with sufficient PCB heatsinking, the

• 2.75-V to 6.8-V Operating Supply Voltage Range

DRV8830 can supply up to 1-A of DC/RMS or peak

• 300-nA (Typical) Sleep Mode Current

output current. It operates on power supply voltages

from 2.75 V to 6.8 V.

• Serial I

C-Compatible Interface

• Multiple Address Selections Allow Up to 9 Devices

To maintain constant motor speed over varying

on One I

C Bus

battery voltages while maintaining long battery life, a

PWM voltage regulation method is provided. The

• Current Limit Circuit and Fault Output

output voltage is programmed through an I

C-

• Thermally-Enhanced Surface Mount Packages

compatible interface, using an internal voltage

reference and DAC.

2 Applications

Internal protection functions are provided for over

• Battery-Powered:

current protection, short-circuit protection,

– Printers

undervoltage lockout, and overtemperature

protection.

– Toys

The DRV8830 is available in a tiny 3-mm × 3-mm 10-

– Robotics

pin VSON package and HVSSOP package with

– Cameras

PowerPAD™ (Eco-friendly: RoHS & no Sb/Br).

– Phones

• Small Actuators, Pumps, and so forth

Device Information

(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

HVSSOP (10)

DRV8830 3.00 mm × 3.00 mm

VSON (10)

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Simplified Schematic

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

Summary of content (35 pages)

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Product Folder Sample & Buy Support & Community Tools & Software Technical Documents DRV8830 SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 DRV8830 Low-Voltage Motor Driver With Serial Interface 1 Features 3 Description • The DRV8830 device provides an integrated motor driver solution for battery-powered toys, printers, and other low-voltage or battery-powered motion control applications.
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DRV8830 SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications................................................
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DRV8830 www.ti.com SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 5 Pin Configuration and Functions DGQ or DRC Package 10-Pin HVSSOP or VSON Top View OUT2 1 ISENSE 2 OUT1 3 VCC 4 GND 5 GND (Thermal Pad) 10 SCL 9 SDA 8 A1 7 A0 6 FAULTn The HVSSOP package has a PowerPAD. Pin Functions PIN NAME NO.
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DRV8830 SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 www.ti.com 6.2 ESD Ratings VALUE Electrostatic discharge V(ESD) (1) (2) Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.
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DRV8830 www.ti.com SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 6.5 Electrical Characteristics VCC = 2.75 V to 6.8 V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLIES IVCC VCC operating supply current VCC = 5 V 1.4 2 mA IVCCQ VCC sleep mode supply current VCC = 5 V, TA = 25°C 0.3 1 μA VCC undervoltage lockout voltage VCC rising 2.575 2.75 VCC falling 2.47 VUVLO V LOGIC-LEVEL INPUTS VIL Input low voltage 0.25 × VCC 0.
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DRV8830 SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 www.ti.com 6.6 I2C Timing Requirements (1) VCC = 2.75 V to 6.8 V, TA = -40°C to 85°C (unless otherwise noted) STANDARD MODE MIN NOM FAST MODE MAX MIN NOM MAX UNIT fscl I2C clock frequency 0 tsch I2C clock high time 4 0.6 µs tscl I2C clock low time 4.7 1.3 µs 2 tsp I C spike time tsds I2C serial data setup time tsdh I2C serial data hold time 100 0 0 50 0 400 50 kHz ns 250 100 ns 0 0 ns 2 1000 20+0.
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DRV8830 www.ti.com SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 100% 95% 90% 85% 80% 75% 70% 65% 60% 55% 50% 0.2 100% 90% 80% 70% EFFICENCY EFFICIENCY 6.7 Typical Characteristics 60% 50% 40% 30% Linear Regulator 20% DRV8830 10% 0.4 0.6 0% 0.5 0.8 1.5 2.5 LOAD - A 4.5 550 2000 -40qC 25qC 85qC 500 450 400 1600 IVCCQ(nA) IVCC(uA) 5.5 Figure 4. Efficiency vs Output Voltage (VIN = 5 V, IOUT = 500 mA) Figure 3. Efficiency vs Load Current (VIN = 5 V, VOUT = 3 V) 1800 3.
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DRV8830 SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 www.ti.com 7 Detailed Description 7.1 Overview The DRV8830 is an integrated motor driver solution used for brushed motor control. The device integrates one H-bridge, current regulation circuitry, and a PWM voltage regulation method. Using the PWM voltage regulation allows the motor to maintain the desired speed as VCC changes. Battery operation is an example of using this feature.
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DRV8830 www.ti.com SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 Feature Description (continued) Note that if the programmed output voltage is greater than the supply voltage, the device will operate at 100% duty cycle and the voltage regulation feature will be disabled. In this mode the device behaves as a conventional H-bridge driver. During the PWM off time, winding current is recirculated by enabling both of the high-side FETs in the bridge. This is shown in Figure 8.
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DRV8830 SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 www.ti.com Feature Description (continued) Table 1. Commanded Output Voltage (continued) VSET[5..0] OUTPUT VOLTAGE VSET[5..0] OUTPUT VOLTAGE 0x10h 1.29 0x30h 3.86 0x11h 1.37 0x31h 3.94 0x12h 1.45 0x32h 4.02 0x13h 1.53 0x33h 4.1 0x14h 1.61 0x34h 4.18 0x15h 1.69 0x35h 4.26 0x16h 1.77 0x36h 4.34 0x17h 1.85 0x37h 4.42 0x18h 1.93 0x38h 4.5 0x19h 2.01 0x39h 4.58 0x1Ah 2.09 0x3Ah 4.66 0x1Bh 2.17 0x3Bh 4.
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DRV8830 www.ti.com SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 7.3.4.1 Overcurrent Protection (OCP) An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If this analog current limit persists for longer than the OCP time, all FETs in the H-bridge will be disabled, the FAULTn signal will be driven low, and the FAULT and OCP bits in the FAULT register will be set.
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DRV8830 SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 www.ti.com When both bits are zero, the output drivers are disabled and the device is placed into a low-power shutdown state. The current limit fault condition (if present) is also cleared. At initial power up, the device will enter the low-power shutdown state. Note that when transitioning from either brake or standby mode to forward or reverse, the voltage control PWM starts at zero duty cycle. The duty cycle slowly ramps up to the commanded voltage.
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DRV8830 www.ti.com SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 1 1 S (An) (As) (Dn+1) Slave Address Data Data ACK STOP ACK START ACK Sub Address ACK 0 W Slave Address (Dn) (As) ACK 0 START R 1 1 S Figure 9. I2C Read Mode 1 1 (Dn) (Dn+1) Sub Address Data Data ACK STOP Slave Address ACK W ACK 0 START (An) (As) ACK S Figure 10. I2C Write Mode 7.6 Register Maps 7.6.1 I2C Register Map Table 6.
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DRV8830 SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 www.ti.
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DRV8830 www.ti.com SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.
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DRV8830 SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 www.ti.com Typical Application (continued) 8.2.1 Design Requirements Table 9 lists the design parameters of the DRV8830. Table 9. Design Parameters DESIGN PARAMETER REFERENCE EXAMPLE VALUE Motor voltage VCC 5V Motor RMS current IRMS 0.3 A Motor start-up ISTART 1.3 A Motor current trip point ILIMIT 0.9 A 8.2.2 Detailed Design Procedure 8.2.2.
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DRV8830 www.ti.com SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 Because power resistors are larger and more expensive than standard resistors, it is common practice to use multiple standard resistors in parallel, between the sense node and ground. This distributes the current and heat dissipation. 8.2.2.4 Low Power Operation Under normal operation, using sleep mode to minimize supply current should be sufficient. If desired, power can be removed to the DRV8830 to further decrease supply current.
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DRV8830 SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 www.ti.com Figure 16. Output Pulse Width Modulating at VCC = 5.
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DRV8830 www.ti.com SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 9 Power Supply Recommendations 9.1 Power Supervisor The DRV8830 is capable of entering a low-power sleep mode by bringing both of the INx control inputs logic low. The outputs will be disabled Hi-Z. To exit the sleep mode, bring either or both of the INx inputs logic high. This will enable the H-bridges. When exiting the sleep mode, the FAULTn pin will pulse low. 9.
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DRV8830 SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 www.ti.com 10 Layout 10.1 Layout Guidelines The VCC pin should be bypassed to GND using low-ESR ceramic bypass capacitors with a recommended value of 0.1-μF rated for VCC. This capacitor should be placed as close to the VCC pin as possible with a thick trace or ground plane connection to the device GND pin. The VCC pin must be bypassed to ground using an appropriate bulk capacitor.
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DRV8830 www.ti.com SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation For related documentation, see the following: • PowerPAD™ Thermally Enhanced Package, SLMA002 • PowerPAD™ Made Easy, SLMA004 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 3-Jun-2022 TAPE AND REEL BOX DIMENSIONS Width (mm) W L H *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DRV8830DGQR HVSSOP DGQ 10 2500 356.0 356.0 35.0 DRV8830DRCR VSON DRC 10 3000 367.0 367.0 35.0 DRV8830DRCT VSON DRC 10 250 210.0 185.0 35.
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PACKAGE MATERIALS INFORMATION www.ti.com 3-Jun-2022 TUBE T - Tube height L - Tube length W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) DRV8830DGQ DGQ HVSSOP 10 80 330.2 6.6 3005 1.
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GENERIC PACKAGE VIEW DRC 10 VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD 3 x 3, 0.5 mm pitch This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4226193/A www.ti.
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PACKAGE OUTLINE DRC0010J VSON - 1 mm max height SCALE 4.000 PLASTIC SMALL OUTLINE - NO LEAD 3.1 2.9 A B PIN 1 INDEX AREA 3.1 2.9 1.0 0.8 C SEATING PLANE 0.05 0.00 0.08 C 1.65 0.1 2X (0.5) EXPOSED THERMAL PAD (0.2) TYP 4X (0.25) 5 2X 2 6 11 SYMM 2.4 0.1 10 1 8X 0.5 PIN 1 ID (OPTIONAL) 10X SYMM 0.5 10X 0.3 0.30 0.18 0.1 0.05 C A B C 4218878/B 07/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only.
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EXAMPLE BOARD LAYOUT DRC0010J VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD (1.65) (0.5) 10X (0.6) 1 10 10X (0.24) 11 (2.4) SYMM (3.4) (0.95) 8X (0.5) 6 5 (R0.05) TYP ( 0.2) VIA TYP (0.25) (0.575) SYMM (2.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X 0.07 MAX ALL AROUND 0.
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EXAMPLE STENCIL DESIGN DRC0010J VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD 2X (1.5) (0.5) SYMM EXPOSED METAL TYP 11 10X (0.6) 1 10 (1.53) 10X (0.24) 2X (1.06) SYMM (0.63) 8X (0.5) 6 5 (R0.05) TYP 4X (0.34) 4X (0.25) (2.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 11: 80% PRINTED SOLDER COVERAGE BY AREA SCALE:25X 4218878/B 07/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
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GENERIC PACKAGE VIEW DGQ 10 TM PowerPAD HVSSOP - 1.1 mm max height PLASTIC SMALL OUTLINE 3 x 3, 0.5 mm pitch Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224775/A www.ti.
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PACKAGE OUTLINE DGQ0010E PowerPAD TM - 1.1 mm max height SCALE 3.700 PLASTIC SMALL OUTLINE C 5.05 TYP 4.75 SEATING PLANE PIN 1 ID AREA A 0.1 C 8X 0.5 10 1 3.1 2.9 NOTE 3 2X 2 5 6 B 3.1 2.9 NOTE 4 10X 0.27 0.17 0.08 C A B 1.1 MAX 0.23 TYP 0.13 SEE DETAIL A EXPOSED THERMAL PAD 4 5 0.25 GAGE PLANE 2.1 1.9 8 1 0 -8 0.15 0.05 0.7 0.4 DETAIL A TYPICAL 1.83 1.63 4221816/A 08/2015 PowerPAD is a trademark of Texas Instruments. NOTES: 1. All linear dimensions are in millimeters.
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EXAMPLE BOARD LAYOUT DGQ0010E PowerPAD TM - 1.1 mm max height PLASTIC SMALL OUTLINE (2.2) NOTE 9 (1.83) SOLDER MASK OPENING SOLDER MASK DEFINED PAD SEE DETAILS 10X (1.45) 10X (0.3) 1 10 (1.3) TYP SYMM (2.1) SOLDER MASK OPENING (3.1) NOTE 9 8X (0.5) 6 5 (R0.05) TYP METAL COVERED BY SOLDER MASK SYMM ( 0.2) TYP VIA (1.3) TYP (4.4) LAND PATTERN EXAMPLE SCALE:15X SOLDER MASK OPENING METAL METAL UNDER SOLDER MASK 0.05 MAX ALL AROUND SOLDER MASK OPENING 0.
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EXAMPLE STENCIL DESIGN DGQ0010E PowerPAD TM - 1.1 mm max height PLASTIC SMALL OUTLINE (1.83) BASED ON 0.125 THICK STENCIL 10X (0.3) 10X (1.45) 1 10 (2.1) BASED ON 0.125 THICK STENCIL SYMM 8X (0.5) 5 6 (R0.05) TYP SYMM METAL COVERED BY SOLDER MASK (4.4) SEE TABLE FOR DIFFERENT OPENINGS FOR OTHER STENCIL THICKNESSES SOLDER PASTE EXAMPLE EXPOSED PAD 100% PRINTED SOLDER COVERAGE BY AREA SCALE:15X STENCIL THICKNESS SOLDER STENCIL OPENING 0.1 0.125 0.150 0.175 2.05 X 2.35 1.83 X 2.1 (SHOWN) 1.
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IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS.