Datasheet ADS1015
Table Of Contents
- 1 Features
- 2 Applications
- 3 Description
- Table of Contents
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Application and Implementation
- 9.1 Application Information
- 9.2 Typical Application
- 9.2.1 Design Requirements
- 9.2.2 Detailed Design Procedure
- 9.2.2.1 Shunt Resistor Considerations
- 9.2.2.2 Operational Amplifier Considerations
- 9.2.2.3 ADC Input Common-Mode Considerations
- 9.2.2.4 Resistor (R1, R2, R3, R4) Considerations
- 9.2.2.5 Noise and Input Impedance Considerations
- 9.2.2.6 First-order RC Filter Considerations
- 9.2.2.7 Circuit Implementation
- 9.2.2.8 Results Summary
- 9.2.3 Application Curves
- 10 Power Supply Recommendations
- 11 Layout
- 12 Device and Documentation Support
- 13 Mechanical, Packaging, and Orderable Information
Comparator
ALERT/RDY
PGA
Voltage
Reference
SCL
SDA
ADDR
ADS1014
AIN1
GND
AIN0
VDD
I
2
C
Interface
12-Bit û¯
ADC
Oscillator
Copyright © 2016, Texas Instruments Incorporated
Voltage
Reference
SCL
SDA
ADDR
ADS1013
AIN1
GND
AIN0
VDD
I
2
C
Interface
12-Bit û¯
ADC
Oscillator
Copyright © 2016, Texas Instruments Incorporated
Comparator
ALERT/RDY
Voltage
Reference
SCL
SDA
ADDR
ADS1015
I
2
C
Interface
12-Bit û¯
ADC
Oscillator
Copyright © 2016, Texas Instruments Incorporated
PGA
GND
VDD
MUX
AIN1
AIN2
AIN0
AIN3
10
ADS1013
,
ADS1014
,
ADS1015
SBAS473E –MAY 2009–REVISED JANUARY 2018
www.ti.com
Product Folder Links: ADS1013 ADS1014 ADS1015
Submit Documentation Feedback Copyright © 2009–2018, Texas Instruments Incorporated
8 Detailed Description
8.1 Overview
The ADS101x are very small, low-power, noise-free, 12-bit, delta-sigma (ΔΣ) analog-to-digital converters (ADCs).
The ADS101x consist of a ΔΣ ADC core with an internal voltage reference, a clock oscillator and an I
2
C interface.
The ADS1014 and ADS1015 also integrate a programmable gain amplifier (PGA) and a programmable digital
comparator. Figure 7, Figure 8, and Figure 9 show the functional block diagrams of ADS1015, ADS1014, and
ADS1013, respectively.
The ADS101x ADC core measures a differential signal, V
IN
, that is the difference of V
(AINP)
and V
(AINN)
. The
converter core consists of a differential, switched-capacitor ΔΣ modulator followed by a digital filter. This
architecture results in a very strong attenuation of any common-mode signals. Input signals are compared to the
internal voltage reference. The digital filter receives a high-speed bitstream from the modulator and outputs a
code proportional to the input voltage.
The ADS101x have two available conversion modes: single-shot and continuous-conversion. In single-shot
mode, the ADC performs one conversion of the input signal upon request, stores the conversion value to an
internal conversion register, and then enters a power-down state. This mode is intended to provide significant
power savings in systems that only require periodic conversions or when there are long idle periods between
conversions. In continuous-conversion mode, the ADC automatically begins a conversion of the input signal as
soon as the previous conversion is completed. The rate of continuous conversion is equal to the programmed
data rate. Data can be read at any time and always reflect the most recent completed conversion.
8.2 Functional Block Diagrams
Figure 7. ADS1015 Block Diagram
Figure 8. ADS1014 Block Diagram Figure 9. ADS1013 Block Diagram