Datasheet ADS1015
Table Of Contents
- 1 Features
- 2 Applications
- 3 Description
- Table of Contents
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Application and Implementation
- 9.1 Application Information
- 9.2 Typical Application
- 9.2.1 Design Requirements
- 9.2.2 Detailed Design Procedure
- 9.2.2.1 Shunt Resistor Considerations
- 9.2.2.2 Operational Amplifier Considerations
- 9.2.2.3 ADC Input Common-Mode Considerations
- 9.2.2.4 Resistor (R1, R2, R3, R4) Considerations
- 9.2.2.5 Noise and Input Impedance Considerations
- 9.2.2.6 First-order RC Filter Considerations
- 9.2.2.7 Circuit Implementation
- 9.2.2.8 Results Summary
- 9.2.3 Application Curves
- 10 Power Supply Recommendations
- 11 Layout
- 12 Device and Documentation Support
- 13 Mechanical, Packaging, and Orderable Information
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ADS1013
,
ADS1014
,
ADS1015
www.ti.com
SBAS473E –MAY 2009–REVISED JANUARY 2018
Product Folder Links: ADS1013 ADS1014 ADS1015
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8.6 Register Map
The ADS101x have four registers that are accessible through the I
2
C interface using the Address Pointer
register. The Conversion register contains the result of the last conversion. The Config register is used to change
the ADS101x operating modes and query the status of the device. The other two registers, Lo_thresh and
Hi_thresh, set the threshold values used for the comparator function, and are not available in the ADS1013.
8.6.1 Address Pointer Register (address = N/A) [reset = N/A]
All four registers are accessed by writing to the Address Pointer register; see Figure 15.
Figure 19. Address Pointer Register
7 6 5 4 3 2 1 0
0 0 0 0 0 0 P[1:0]
W-0h W-0h W-0h W-0h W-0h W-0h W-0h
LEGEND: R/W = Read/Write; R = Read only; W = Write only; -n = value after reset
Table 4. Address Pointer Register Field Descriptions
Bit Field Type Reset Description
7:2 Reserved W 0h Always write 0h
1:0 P[1:0] W 0h Register address pointer
00 : Conversion register
01 : Config register
10 : Lo_thresh register
11 : Hi_thresh register
8.6.2 Conversion Register (P[1:0] = 0h) [reset = 0000h]
The 16-bit Conversion register contains the result of the last conversion in binary two's complement format.
Following power-up, the Conversion register is cleared to 0, and remains 0 until the first conversion is completed.
Figure 20. Conversion Register
15 14 13 12 11 10 9 8
D11 D10 D9 D8 D7 D6 D5 D4
R-0h R-0h R-0h R-0h R-0h R-0h R-0h R-0h
7 6 5 4 3 2 1 0
D3 D2 D1 D0 Reserved
R-0h R-0h R-0h R-0h R-0h R-0h R-0h R-0h
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5. Conversion Register Field Descriptions
Bit Field Type Reset Description
15:4 D[11:0] R 000h 12-bit conversion result
3:0 Reserved R 0h Always Reads back 0h