Datasheet ADS1015

VDD
GND
SCL
SDA
ADDR
ALERT
(ADS1014/5 Only)
AIN0
AIN1
AIN2 (ADS1015 Only)
AIN3 (ADS1015 Only)
SCL (P1.6)
SDA (P1.7)
I
2
C-Capable Master
(MSP430F2002)
ADS101x
3.3 V
VDD
GND
JTAG Serial/UART
3.3 V
Copyright © 2016, Texas Instruments Incorporated
10 k
0.1 µF
10 k
3.3 V
0.1 µF
31
ADS1013 , ADS1014 , ADS1015
www.ti.com SBAS473E –MAY 2009–REVISED JANUARY 2018
Product Folder Links: ADS1013 ADS1014 ADS1015
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Application Information (continued)
9.1.7 Quickstart Guide
This section provides a brief example of ADS101x communications. See subsequent sections of this data sheet
for more detailed explanations. Hardware for this design includes: one ADS101x configured with an I
2
C address
of 1001000; a microcontroller with an I
2
C interface; discrete components such as resistors, capacitors, and serial
connectors; and a 2 V to 5 V power supply. Figure 28 shows the basic hardware configuration.
The ADS101x communicate with the master (microcontroller) through an I
2
C interface. The master provides a
clock signal on the SCL pin and data are transferred using the SDA pin. The ADS101x never drive the SCL pin.
For information on programming and debugging the microcontroller being used, see the device-specific product
data sheet.
The first byte sent by the master is the ADS101x address, followed by the R/W bit that instructs the ADS101x to
listen for a subsequent byte. The second byte is the Address Pointer register byte. The third and fourth bytes
sent from the master are written to the register indicated in register address pointer bits P[1:0]. See Figure 15
and Figure 16 for read and write operation timing diagrams, respectively. All read and write transactions with the
ADS101x must be preceded by a START condition, and followed by a STOP condition.
For example, to write to the configuration register to set the ADS101x to continuous-conversion mode and then
read the conversion result, send the following bytes in this order:
1. Write to Config register:
– First byte: 0b10010000 (first 7-bit I
2
C address followed by a low R/W bit)
– Second byte: 0b00000001 (points to Config register)
– Third byte: 0b10000100 (MSB of the Config register to be written)
– Fourth byte: 0b10000011 (LSB of the Config register to be written)
2. Write to Address Pointer register:
– First byte: 0b10010000 (first 7-bit I
2
C address followed by a low R/W bit)
– Second byte: 0b00000000 (points to Conversion register)
3. Read Conversion register:
– First byte: 0b10010001 (first 7-bit I
2
C address followed by a high R/W bit)
– Second byte: the ADS101x response with the MSB of the Conversion register
– Third byte: the ADS101x response with the LSB of the Conversion register
Figure 28. Basic Hardware Configuration