Datasheet ADS1015
Table Of Contents
- 1 Features
- 2 Applications
- 3 Description
- Table of Contents
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Application and Implementation
- 9.1 Application Information
- 9.2 Typical Application
- 9.2.1 Design Requirements
- 9.2.2 Detailed Design Procedure
- 9.2.2.1 Shunt Resistor Considerations
- 9.2.2.2 Operational Amplifier Considerations
- 9.2.2.3 ADC Input Common-Mode Considerations
- 9.2.2.4 Resistor (R1, R2, R3, R4) Considerations
- 9.2.2.5 Noise and Input Impedance Considerations
- 9.2.2.6 First-order RC Filter Considerations
- 9.2.2.7 Circuit Implementation
- 9.2.2.8 Results Summary
- 9.2.3 Application Curves
- 10 Power Supply Recommendations
- 11 Layout
- 12 Device and Documentation Support
- 13 Mechanical, Packaging, and Orderable Information
0.1 µF
VDD
ADDR
GND
AIN0
AIN1
DIN
SDA
VDD
AIN3
AIN2
Device
ALERT/RDY
1
2
3
4
9
8
7
6
10
5
36
ADS1013
,
ADS1014
,
ADS1015
SBAS473E –MAY 2009–REVISED JANUARY 2018
www.ti.com
Product Folder Links: ADS1013 ADS1014 ADS1015
Submit Documentation Feedback Copyright © 2009–2018, Texas Instruments Incorporated
10 Power Supply Recommendations
The device requires a single unipolar supply, VDD, to power both the analog and digital circuitry of the device.
10.1 Power-Supply Sequencing
Wait approximately 50 µs after VDD is stabilized before communicating with the device to allow the power-up
reset process to complete.
10.2 Power-Supply Decoupling
Good power-supply decoupling is important to achieve optimum performance. VDD must be decoupled with at
least a 0.1-µF capacitor, as shown in Figure 32. The 0.1-μF bypass capacitor supplies the momentary bursts of
extra current required from the supply when the device is converting. Place the bypass capacitor as close to the
power-supply pin of the device as possible using low-impedance connections. Use multilayer ceramic chip
capacitors (MLCCs) that offer low equivalent series resistance (ESR) and inductance (ESL) characteristics for
power-supply decoupling purposes. For very sensitive systems, or for systems in harsh noise environments,
avoid the use of vias for connecting the capacitors to the device pins for better noise immunity. The use of
multiple vias in parallel lowers the overall inductance, and is beneficial for connections to ground planes.
Figure 32. ADS1015 Power-Supply Decoupling