User guide
PNIASIC
Specifications
Electrical Specifications 
Parameter voltage and current levels 
Testing for the currents listed in 
Table 4 assume a static test setup with measurements performed while 
static data is applied to the device. Test type parameters apply as listed in the 
Table 8: Pin Definitions  
Table 4: Inputs 
Test Type  Vil
a
 Vih
a
  Iil
b
 Iih
b
AIB (analog input)  0.2 Vdd  2.0 Vdd  0.0 to -1.0 µA  0.0 to 1.0 µA 
IBA (CMOS)  0.25 Vdd  0.8 Vdd  0.0 to -1.0 µA  0.0 to 1.0 µA 
IBT (CMOS, SC 
Hsy = 1.0)
c
0.2 Vdd  0.8 Vdd  0.0 to -1.0 µA  0.0 to 1.0 µA 
a.  CMOS values are V
IN
 x V
DD
. 
b.  Iil and Iih are tested at V
DD
 = 3.6 V. Not tested at less than room temperature. 
c.  SC = Schmitt 
Table 5: Outputs 
Test Type  Vol Voh Iol
a
 Ioh
a
OB 1
b
  <0.4 V  >2.4 V  1.0 mA minimum  -1.0 mA minimum 
OB 2
b
  <0.4 V  >2.4 V  1.0 mA minimum  -1.0 mA minimum 
OB 3
c
  0.267 V  1.936 V  10 mA minimum  10 mA minimum 
a.  Polarity on currents indicate direction of current ( + ) for sinking ( - ) for sourcing. 
b.  V
DD 
= 4.5 to 5.0 V 
c.  V
DD 
= 2.2 V 
Table 6: I/O Pins 
Test 
Type 
Vil
a
 Vih
a
 Vol
b
 Voh
b
 Iol
b
 Ioh
b
 Ioz
c
 Ioz
c
IO1A 
CMOS 
<.30 V  >.70V  <0.40 V  4.1 V  -0.64 mA  -0.15 mA  39µA 
minimum 
217 µA 
maximum 
a.  CMOS values are V
IN
 x V
DD
. 
b.  Tested at V
DD 
= 4.8 V 
c.  Tested with V
DD 
= 5.2 V. Leakage on I/O pins is typically checked for ± 2 µA with the ouput device turned off and no 
PU or PD.
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