Data Sheet

ManualsBrandsPololu ManualsAccelerometers, Gyros, GPS, & CompassesMinIMU-9 v5 Gyro, Accelerometer, and Compass (LSM6DS33 and LIS3MDL Carrier)

This is information on a product in full production.

October 2015 DocID027423 Rev 4 1/77

LSM6DS33

iNEMO inertial module:

always-on 3D accelerometer and 3D gyroscope

Datasheet - production data

Features

 Power consumption: 0.9 mA in combo normal mode

and 1.25 mA in combo high-performance mode up to

1.6 kHz.

 “Always-on” experience with low power

consumption for both accelerometer and gyroscope

 Smart FIFO up to 8 kbyte based on features set

 Compliant with Android K and L

 ±2/±4/±8/±16 g full scale

 ±125/±245/±500/±1000/±2000 dps full scale

 Analog supply voltage: 1.71 V to 3.6 V

 Independent IOs supply (1.62 V)

 Compact footprint, 3 mm x 3 mm x 0.86 mm

 SPI/I

C serial interface with main processor data

synchronization feature

 Embedded temperature sensor

 ECOPACK

, RoHS and “Green” compliant

Applications

 Pedometer, step detector and step counter

 Significant motion and tilt functions

 Indoor navigation

 Tap and double-tap detection

 IoT and connected devices

 Intelligent power saving for handheld devices

 Vibration monitoring and compensation

 Free-fall detection

 6D orientation detection

Description

The LSM6DS33 is a system-in-package featuring a 3D

digital accelerometer and a 3D digital gyroscope

performing at 1.25 mA (up to 1.6 kHz ODR) in high-

performance mode and enabling always-on low-power

features for an optimal motion experience for the

consumer.

The LSM6DS33 supports main OS requirements,

offering real, virtual and batch sensors with 8 kbyte for

dynamic data batching.

ST’s family of MEMS sensor modules leverages the

robust and mature manufacturing processes already

used for the production of micromachined

accelerometers and gyroscopes.

The various sensing elements are manufactured using

specialized micromachining processes, while the IC

interfaces are developed using CMOS technology that

allows the design of a dedicated circuit which is

trimmed to better match the characteristics of the

sensing element.

The LSM6DS33 has a full-scale acceleration range of

±2/±4/±8/±16 g and an angular rate range of

±125/±245/±500/±1000/±2000 dps.

High robustness to mechanical shock makes the

LSM6DS33 the preferred choice of system designers

for the creation and manufacturing of reliable products.

The LSM6DS33 is available in a plastic land grid array

(LGA) package.

LGA-16L (3 x 3 x 0.86 mm) typ.

Table 1. Device summary

Part number

Temp.

range [°C]

Package Packing

LSM6DS33 -40 to +85

LGA-16L

(3 x 3 x 0.86 mm)

Tray

LSM6DS33TR -40 to +85

Tape &

Reel

www.st.com

Summary of content (77 pages)

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LSM6DS33 iNEMO inertial module: always-on 3D accelerometer and 3D gyroscope Datasheet - production data Description The LSM6DS33 is a system-in-package featuring a 3D digital accelerometer and a 3D digital gyroscope performing at 1.25 mA (up to 1.6 kHz ODR) in highperformance mode and enabling always-on low-power features for an optimal motion experience for the consumer. LGA-16L (3 x 3 x 0.86 mm) typ.
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Contents LSM6DS33 Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2 Embedded low-power features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.1 Tilt detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4 Module specifications . . . . . . . . . .
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LSM6DS33 Contents 6.1 I2C serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6.1.1 6.2 7 I2C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 SPI bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 6.2.1 SPI read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6.2.2 SPI write . . . . . . .
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Contents 4/77 LSM6DS33 9.21 WAKE_UP_SRC (1Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 9.22 TAP_SRC (1Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 9.23 D6D_SRC (1Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 9.24 STATUS_REG (1Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 9.25 OUT_TEMP_L (20h), OUT_TEMP(21h) . . . . . .
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LSM6DS33 Contents 9.54 INT_DUR2 (5Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 9.55 WAKE_UP_THS (5Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 9.56 WAKE_UP_DUR (5Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 9.57 FREE_FALL (5Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 9.58 MD1_CFG (5Eh) . . . . . . . . . . . . . . . . . . . . .
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List of tables LSM6DS33 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Table 47. Table 48.
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LSM6DS33 Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. Table 78. Table 79. Table 80. Table 81. Table 82. Table 83. Table 84. Table 85. Table 86. Table 87. Table 88. Table 89. Table 90. Table 91. Table 92. Table 93. Table 94. Table 95. Table 96. Table 97. Table 98.
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List of tables Table 101. Table 102. Table 103. Table 104. Table 105. Table 106. Table 107. Table 108. Table 109. Table 110. Table 111. Table 112. Table 113. Table 114. Table 115. Table 116. Table 117. Table 118. Table 119. Table 120. Table 121. Table 122. Table 123. Table 124. Table 125. Table 126. Table 127. Table 128. Table 129. Table 130. Table 131. Table 132. Table 133. Table 134. Table 135. Table 136. Table 137. Table 138. Table 139. Table 140. Table 141. Table 142. Table 143. Table 144. Table 145.
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LSM6DS33 Table 153. Table 154. Table 155. Table 156. Table 157. Table 158. Table 159. Table 160. Table 161. List of tables PEDO_THS_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 SM_THS register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 SM_THS register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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List of figures LSM6DS33 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. 10/77 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 SPI slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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LSM6DS33 1 Overview Overview The LSM6DS33 is a system-in-package featuring a high-performance 3-axis digital accelerometer and 3-axis digital gyroscope. The integrated power-efficient modes are able to reduce the power consumption down to 1.25 mA in high-performance mode, combining always-on low-power features with superior sensing precision for an optimal motion experience for the consumer thanks to ultra-low noise performance for both the gyroscope and accelerometer.
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Embedded low-power features 2 LSM6DS33 Embedded low-power features The LSM6DS33 has been designed to be fully compliant with Android, featuring the following on-chip functions:  8 kbyte data buffering – 100% efficiency with flexible configurations and partitioning – possibility to store time stamp  Event-detection interrupts (fully configurable): – free-fall – wakeup – 6D orientation – tap and double-tap sensing – activity / inactivity recognition  Specific IP blocks with negligible power consumption
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LSM6DS33 Pin description Figure 1. Pin connections *1' 6'$ 6'2 ½ < &6 ,17 ½ 723 9,(: ',5(&7,21 2) 7+( '(7(&7$%/( $1*8/$5 5$7(6 ,17 5(6 9'',2 6&/ 5(6 = ; %27720 9,(: 5(6 ½ *1' ; 9'' ',5(&7,21 2) 7+( '(7(&7$%/( $&&(/(5$7,216 1& 723 9,(: < 5(6 = 5(6 3 Pin description ; In the LSM6DS33 an I2C slave interface or SPI (3- and 4-wire) serial interface is available.
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Pin description LSM6DS33 Table 2.
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LSM6DS33 Module specifications 4 Module specifications 4.1 Mechanical characteristics @ Vdd = 1.8 V, T = 25 °C unless otherwise noted. Table 3. Mechanical characteristics Symbol Parameter Test conditions Min. Typ.(1) Max. Unit ±2 LA_FS ±4 Linear acceleration measurement range ±8 g ±16 ±125 G_FS ±245 Angular rate measurement range ±500 dps ±1000 ±2000 LA_So G_So Linear acceleration sensitivity Angular rate sensitivity FS = ±2 0.061 FS = ±4 0.122 FS = ±8 0.244 FS = ±16 0.
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Module specifications LSM6DS33 Table 3. Mechanical characteristics (continued) Symbol LA_ODR Parameter Test conditions Angular rate output data rate Top Operating temperature range Typ.(1) Max. 13 26 52 104 208 416 833 1666 3332 6664 Linear acceleration output data rate G_ODR Unit Hz 13 26 52 104 208 416 833 1666 -40 1. Typical specifications are not guaranteed. 2. Measurements are performed in a uniform temperature setup. 3. Values after soldering. 16/77 Min.
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LSM6DS33 4.2 Module specifications Electrical characteristics @ Vdd = 1.8 V, T = 25 °C unless otherwise noted. Table 4. Electrical characteristics Symbol Vdd Vdd_IO Min. Typ.(1) Max. Unit Supply voltage 1.71 1.8 3.6 V Power supply for I/O 1.62 Vdd+0.1 V Parameter Test conditions IddHP Gyroscope and accelerometer in high-performance mode up to ODR = 1.6 kHz 1.25 mA IddNM Gyroscope and accelerometer in normal mode ODR = 208 Hz 0.
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Module specifications 4.3 LSM6DS33 Temperature sensor characteristics @ Vdd = 1.8 V, T = 25 °C unless otherwise noted. Table 5. Temperature sensor characteristics Symbol TODR Toff Parameter Test condition Min. Temperature refresh rate Temperature offset (2) TSen Temperature sensitivity TST Temperature stabilization time(3) Operating temperature range 1. Typical specifications are not guaranteed. 2. The output of the temperature sensor is 0 LSB (typ.) at 25 °C. 3.
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LSM6DS33 Module specifications 4.4 Communication interface characteristics 4.4.1 SPI - serial peripheral interface Subject to general operating conditions for Vdd and Top. Table 6.
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Module specifications 4.4.2 LSM6DS33 I2C - inter-IC control interface Subject to general operating conditions for Vdd and Top. Table 7. I2C slave timing values Symbol f(SCL) I2C Standard mode(1) Parameter SCL clock frequency I2C Fast mode (1) Min Max Min Max 0 100 0 400 tw(SCLL) SCL clock low time 4.7 1.3 tw(SCLH) SCL clock high time 4.0 0.6 tsu(SDA) SDA setup time 250 100 th(SDA) SDA data hold time 0 th(ST) START condition hold time 4 0.
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LSM6DS33 4.5 Module specifications Absolute maximum ratings Stresses above those listed as “Absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 8. Absolute maximum ratings Symbol Maximum value Unit Vdd Supply voltage -0.3 to 4.
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Module specifications 4.6 Terminology 4.6.1 Sensitivity LSM6DS33 Linear acceleration sensitivity can be determined, for example, by applying 1 g acceleration to the device. Because the sensor can measure DC accelerations, this can be done easily by pointing the selected axis towards the ground, noting the output value, rotating the sensor 180 degrees (pointing towards the sky) and noting the output value again. By doing so, ±1 g acceleration is applied to the sensor.
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LSM6DS33 Functionality 5 Functionality 5.1 Operating modes The LSM6DS33 has three operating modes available:  only accelerometer active and gyroscope in power-down  only gyroscope active and accelerometer in power-down  both accelerometer and gyroscope sensors active with independent ODR The accelerometer is activated from power down by writing ODR_XL[3:0] in CTRL1_XL (10h) while the gyroscope is activated from power-down by writing ODR_G[3:0] in CTRL2_G (11h).
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Functionality LSM6DS33 Writing data in the FIFO can be configured to be triggered by the: - accelerometer/gyroscope data-ready signal; in which case the ODR must be lower than or equal to both the accelerometer and gyroscope ODRs; - step detection signal. In addition, each data can be stored at a decimated data rate compared to FIFO ODR and it is configurable by the user, setting the registers FIFO_CTRL3 (08h) and FIFO_CTRL4 (09h). The available decimation factors are 2, 3, 4, 8, 16, 32.
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LSM6DS33 Functionality A FIFO threshold flag FIFO_STATUS2 (3Bh)(FTH) is asserted when the number of unread samples in FIFO is greater than or equal to FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h)(FTH [11:0]). It is possible to route FIFO_STATUS2 (3Bh) (FTH) to the INT1 pin by writing in register INT1_CTRL (0Dh) (INT1_FTH) = ‘1’ or to the INT2 pin by writing in register INT2_CTRL (0Eh) (INT2_FTH) = ‘1’.
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Functionality 5.4.7 LSM6DS33 Filter block diagrams Figure 4. Accelerometer chain $QDORJ $QWL DOLDVLQJ /3 )LOWHU 'LJLWDO /3 )LOWHU /3) &RPSRVLWH )LOWHU $'& %:B;/> @ 2'5B;/> @ Figure 5.
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LSM6DS33 Functionality Figure 6.
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Digital interfaces 6 LSM6DS33 Digital interfaces The registers embedded inside the LSM6DS33 may be accessed through both the I2C and SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire interface mode. The serial interfaces are mapped onto the same pins. To select/exploit the I2C interface, the CS line must be tied high (i.e connected to Vdd_IO). Table 9. Serial interface pin description Pin name CS SCL/SPC SDA/SDI/SDO SDO/SA0 6.
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LSM6DS33 6.1.1 Digital interfaces I2C operation The transaction on the bus is started through a START (ST) signal. A START condition is defined as a HIGH to LOW transition on the data line while the SCL line is held HIGH. After this has been transmitted by the master, the bus is considered busy.
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Digital interfaces LSM6DS33 Table 14. Transfer when master is receiving (reading) one byte of data from slave Master ST SAD + W Slave SUB SAK SR SAD + R SAK NMAK SAK SP DATA Table 15. Transfer when master is receiving (reading) multiple bytes of data from slave Master Slave ST SAD+W SUB SAK SR SAD+R SAK MAK SAK DATA MAK DAT A NMAK SP DATA Data are transmitted in byte format (DATA). Each data transfer contains 8 bits. The number of bytes transferred per transfer is unlimited.
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LSM6DS33 Digital interfaces Both the read register and write register commands are completed in 16 clock pulses or in multiples of 8 in case of multiple read/write bytes. Bit duration is the time between two falling edges of SPC. The first bit (bit 0) starts at the first falling edge of SPC after the falling edge of CS while the last bit (bit 15, bit 23, ...) starts at the last falling edge of SPC just before the rising edge of CS. bit 0: RW bit. When 0, the data DI(7:0) is written into the device.
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Digital interfaces LSM6DS33 Figure 9. Multiple byte SPI read protocol (2-byte example) &6 63& 6', 5: $' $' $' $' $' $' $' 6'2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 6.2.2 SPI write Figure 10. SPI write protocol &6 63& 6', ', ', ', ', ', ', ', ', 5: $' $' $' $' $' $' $' The SPI Write command is performed with 16 clock pulses. A multiple byte write command is performed by adding blocks of 8 clock pulses to the previous one. bit 0: WRITE bit.
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LSM6DS33 6.2.3 Digital interfaces SPI read in 3-wire mode A 3-wire mode is entered by setting the CTRL3_C (12h) (SIM) bit equal to ‘1’ (SPI serial interface mode selection). Figure 12. SPI read protocol in 3-wire mode &6 63& 6', 2 '2 '2 '2 '2 '2 '2 '2 '2 5: $' $' $' $' $' $' $' The SPI read command is performed with 16 clock pulses: bit 0: READ bit. The value is 1. bit 1-7: address AD(6:0). This is the address field of the indexed register. bit 8-15: data DO(7:0) (read mode).
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Application hints LSM6DS33 7 Application hints 7.1 LSM6DS33 electrical connections Figure 13. LSM6DS33 electrical connections & 9'',2 6'$ 6&/ 6'2 &6 9GGB,2 Q) *1' ,17 9'' 723 9,(: ,17 5(6 9'' 5(6 1& & Q) *1' *1' 9GGB,2 *1' *1' 5(6 5(6 5(6 , & FRQILJXUDWLRQ 5SX *1' 5SX N2KP 6&/ 6'$ 3XOO XS WR EH DGGHG The device core is supplied through the Vdd line.
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LSM6DS33 7.2 Application hints Pin compatibility with LSM6DS0 Figure 14.
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Application hints LSM6DS33 Figure 15.
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LSM6DS33 8 Register mapping Register mapping The table given below provides a list of the 8/16 bit registers embedded in the device and the corresponding addresses. Table 16.
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Register mapping LSM6DS33 Table 16.
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LSM6DS33 Register mapping Table 16.
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Register description 9 LSM6DS33 Register description The device contains a set of registers which are used to control its behavior and to retrieve linear acceleration, angular rate and temperature data. The register addresses, made up of 7 bits, are used to identify them and to write the data through the serial interface. 9.1 FUNC_CFG_ACCESS (01h) Enable embedded functions register (r/w). Table 17. FUNC_CFG_ACCESS register FUNC_CFG_EN 0 (1) 0(1) 0(1) 0(1) 0(1) 0(1) 0(1) 1.
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LSM6DS33 Register description Table 22. FIFO_CTRL2 register description TIMER_PEDO _FIFO_EN Enable pedometer step counter and time stamp. Default: 0 (0: disable step counter and time stamp data; 1: enable step counter and time stamp data.) TIMER_PEDO _FIFO_DRDY FIFO write mode. Default: 0 (0: enable write in FIFO based on XL/Gyro data-ready; 1: enable write in FIFO at every step detected by step counter.) FTH_[11:8] FIFO threshold level setting(1).
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Register description LSM6DS33 Table 26. Accelerometer FIFO decimation setting DEC_FIFO_XL [2:0] 9.5 Configuration 000 Accelerometer sensor not in FIFO 001 No decimation 010 Decimation with factor 2 011 Decimation with factor 3 100 Decimation with factor 4 101 Decimation with factor 8 110 Decimation with factor 16 111 Decimation with factor 32 FIFO_CTRL4 (09h) FIFO control register (r/w). Table 27.
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LSM6DS33 9.6 Register description FIFO_CTRL5 (0Ah) FIFO control register (r/w). Table 30. FIFO_CTRL5 register 0(1) ODR_ FIFO_3 ODR_ FIFO_2 ODR_ FIFO_1 ODR_ FIFO_0 FIFO_ MODE_2 FIFO_ MODE_1 FIFO_ MODE_0 1. This bit must be set to ‘0’ for the correct operation of the device. Table 31. FIFO_CTRL5 register description ODR_FIFO_[3:0] FIFO_MODE_[2:0] FIFO ODR selection, setting FIFO_MODE also.
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Register description 9.7 LSM6DS33 ORIENT_CFG_G (0Bh) Angular rate sensor sign and orientation register (r/w). Table 34. ORIENT_CFG_G register 0 (1) 0 (1) SignX_G SignY_G SignZ_G Orient_2 Orient_1 Orient_0 1. This bit must be set to ‘0’ for the correct operation of the device. Table 35. ORIENT_CFG_G register description SignX_G Pitch axis (X) angular rate sign. Default value: 0 (0: positive sign; 1: negative sign) SignY_G Roll axis (Y) angular rate sign.
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LSM6DS33 Register description Table 38. INT1_CTRL register description Pedometer step recognition interrupt enable on INT1 pad. Default value: 0 INT1_ STEP_ DETECTOR (0: disabled; 1: enabled) Significant motion interrupt enable on INT1 pad. Default value: 0 INT1_SIGN_MOT (0: disabled; 1: enabled) FIFO full flag interrupt enable on INT1 pad. Default value: 0 INT1_FULL_FLAG (0: disabled; 1: enabled) FIFO overrun interrupt on INT1 pad.
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Register description 9.10 LSM6DS33 WHO_AM_I (0Fh) Who_AM_I register (r). This register is a read-only register. Its value is fixed at 69h. Table 41. WHO_AM_I register 0 9.11 1 1 0 1 0 0 1 FS_XL0 BW_XL1 BW_XL0 CTRL1_XL (10h) Linear acceleration sensor control register 1 (r/w). Table 42. CTRL1_XL register ODR_XL3 ODR_XL2 ODR_XL1 ODR_XL0 FS_XL1 Table 43. CTRL1_XL register description ODR_XL [3:0] Output data rate and power mode selection. Default value: 0000 (see Table 44).
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LSM6DS33 Register description Table 45. BW and ODR (high-performance mode) Analog filter BW (XL_HM_MODE = 0) ODR(1) XL_BW_SCAL_ODR = 0 6.66 - 3.33 kHz Filter not used 1.66 kHz 400 Hz 833 Hz 400 Hz 416 Hz 200 Hz 208 Hz 100 Hz 104 - 13 Hz 50 Hz XL_BW_SCAL_ODR = 1 Bandwidth is determined by setting BW_XL[1:0] in CTRL1_XL (10h) 1. Filter not used when accelerometer is in normal and low-power modes.
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Register description 9.12 LSM6DS33 CTRL2_G (11h) Angular rate sensor control register 2 (r/w). Table 46. CTRL2_G register ODR_G3 ODR_G2 ODR_G1 ODR_G0 FS_G1 FS_G0 FS_125 0(1) 1. This bit must be set to ‘0’ for the correct operation of the device. Table 47. CTRL2_G register description ODR_G [3:0] Gyroscope output data rate selection. Default value: 0000 (Refer toTable 46) FS_G [1:0] Gyroscope full-scale selection.
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LSM6DS33 9.13 Register description CTRL3_C (12h) Control register 3 (r/w). Table 49. CTRL3_C register BOOT BDU H_LACTIVE PP_OD SIM IF_INC BLE SW_RESET Table 50. CTRL3_C register description BOOT Reboot memory content. Default value: 0 (0: normal mode; 1: reboot memory content(1)) BDU Block Data Update. Default value: 0 (0: continuous update; 1: output registers not updated until MSB and LSB have been read) H_LACTIVE Interrupt activation level.
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Register description 9.14 LSM6DS33 CTRL4_C (13h) Control register 4 (r/w). Table 51. CTRL4_C register XL_BW_ INT2_on_ FIFO_ SLEEP_G SCAL_ODR INT1 TEMP_EN DRDY_ MASK I2C_disable 0 STOP_ON _FTH Table 52. CTRL4_C register description XL_BW_ SCAL_ODR Accelerometer bandwidth selection. Default value: 0 (0(1): bandwidth determined by ODR selection, refer to Table 45; 1(2): bandwidth determined by setting BW_XL[1:0] in CTRL1_XL (10h) register.) SLEEP_G Gyroscope sleep mode enable.
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LSM6DS33 Register description Table 55. Output registers rounding pattern ROUNDING[2:0] Rounding pattern 000 No rounding 001 Accelerometer only 010 Gyroscope only 011 Gyroscope + accelerometer Table 56. Angular rate sensor self-test mode selection ST1_G ST0_G Self-test mode 0 0 Normal mode 0 1 Positive sign self-test 1 0 Not allowed 1 1 Negative sign self-test Table 57. Linear acceleration sensor self-test mode selection ST1_XL 9.
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Register description 9.17 LSM6DS33 CTRL7_G (16h) Angular rate sensor control register 7 (r/w). Table 60. CTRL7_G register G_HM_MODE HP_G_ EN HPCF_G1 HPCF_G0 HP_G_R ROUNDING_ ST STATUS 0(1) 0(1) 1. This bit must be set to ‘0’ for the correct operation of the device. Table 61. CTRL7_G register description High-performance operating mode disable for gyroscope(1).
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LSM6DS33 Register description Table 64. CTRL8_XL register description LPF2_XL_EN Accelerometer low-pass filter LPF2 selection. Refer to Figure 5. HPCF_XL[1:0] Accelerometer slope filter and high-pass filter configuration and cutoff setting. Refer to Table 65. HP_SLOPE_XL_EN Accelerometer slope filter / high-pass filter selection. Refer to Figure 5. LOW_PASS_ON_6D Low-pass filter on 6D function selection. Refer to Figure 5. Table 65.
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Register description 9.20 LSM6DS33 CTRL10_C (19h) Control register 10 (r/w). Table 68. CTRL10_C register 0(1) 0(1) Zen_G Yen_G Xen_G FUNC_EN PEDO_RST SIGN_ _STEP MOTION_EN 1. This bit must be set to ‘0’ for the correct operation of the device. Table 69. CTRL10_C register description Zen_G Gyroscope yaw axis (Z) output enable. Default value: 1 (0: Z-axis output disabled; 1: Z-axis output enabled) Yen_G Gyroscope roll axis (Y) output enable.
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LSM6DS33 9.22 Register description TAP_SRC (1Ch) Tap source register (r). Table 72. TAP_SRC register 0(1) TAP_IA SINGLE_ TAP DOUBLE_ TAP_SIGN TAP X_TAP Y_TAP Z_TAP 1. This bit must be set to ‘0’ for the correct operation of the device. Table 73. TAP_SRC register description Tap event detection status. Default: 0 (0: tap event not detected; 1: tap event detected) Single-tap event status.
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Register description 9.24 LSM6DS33 STATUS_REG (1Eh) Table 76. STATUS_REG register - - - - EV_BOOT TDA GDA XLDA Table 77. STATUS_REG register description 9.25 EV_BOOT Boot running flag signal. Default value: 0 (0: no boot running; 1: boot running) TDA Temperature new data available. Default: 0 (0: no set of data is available at temperature sensor output; 1: a new set of data is available at temperature sensor output) GDA Gyroscope new data available.
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LSM6DS33 9.27 Register description OUTX_H_G (23h) Angular rate sensor pitch axis (X) angular rate output register (r). The value is expressed as a 16-bit word in two’s complement. (r) Table 83. OUTX_H_G register D15 D14 D13 D12 D11 D10 D9 D8 Table 84. OUTX_H_G register description D[15:8] 9.28 Pitch axis (X) angular rate value (MSbyte) OUTY_L_G (24h) Angular rate sensor roll axis (Y) angular rate output register (r). The value is expressed as a 16-bit word in two’s complement. (r). Table 85.
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Register description 9.31 LSM6DS33 OUTZ_H_G (27h) Angular rate sensor Yaw axis (Z) angular rate output register (r). The value is expressed as a 16-bit word in two’s complement. Table 91. OUTZ_H_G register D15 D14 D13 D12 D11 D10 D9 D8 Table 92. OUTZ_H_G register description D[15:8] 9.32 Yaw axis (Z) angular rate value (MSbyte) OUTX_L_XL (28h) Linear acceleration sensor X-axis output register (r). The value is expressed as a 16-bit word in two’s complement. Table 93.
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LSM6DS33 9.35 Register description OUTY_H_XL (2Bh) Linear acceleration sensor Y-axis output register (r). The value is expressed as a 16-bit word in two’s complement. Table 99. OUTY_H_G register D15 D14 D13 D12 D11 D10 D9 D8 Table 100. OUTY_H_G register description D[15:8] 9.36 Y-axis linear acceleration value (MSbyte) OUTZ_L_XL (2Ch) Linear acceleration sensor Z-axis output register (r). The value is expressed as a 16-bit word in two’s complement. Table 101.
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Register description 9.39 LSM6DS33 FIFO_STATUS2 (3Bh) FIFO status control register (r). For a proper reading of the register, it is recommended to set the BDU bit in CTRL3_C (12h) to 1. Table 107. FIFO_STATUS2 register FTH FIFO_ OVER_RUN FIFO_ FULL FIFO_ EMPTY DIFF_ FIFO_11 DIFF_ FIFO_10 DIFF_ FIFO_9 DIFF_ FIFO_8 Table 108. FIFO_STATUS2 register description FTH FIFO watermark status.
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LSM6DS33 9.41 Register description FIFO_STATUS4 (3Dh) FIFO status control register (r). For a proper reading of the register, it is recommended to set the BDU bit in CTRL3_C (12h) to 1. Table 111. FIFO_STATUS4 register 0(1) 0(1) 0(1) 0(1) 0(1) 0(1) FIFO_ PATTERN_9 FIFO_ PATTERN_8 1. This bit must be set to ‘0’ for the correct operation of the device. Table 112. FIFO_STATUS4 register description FIFO_ PATTERN_[9:8] 9.42 Word of recursive pattern read at the next reading.
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Register description 9.44 LSM6DS33 TIMESTAMP0_REG (40h) Time stamp first byte data output register (r). The value is expressed as a 24-bit word and the bit resolution is defined by setting the value in WAKE_UP_DUR (5Ch). Table 117. TIMESTAMP0_REG register TIMESTA MP0_7 TIMESTA MP0_6 TIMESTA MP0_5 TIMESTA MP0_4 TIMESTA MP0_3 TIMESTA MP0_2 TIMESTA MP0_1 TIMESTA MP0_0 Table 118. TIMESTAMP0_REG register description TIMESTAMP0_[7:0] 9.
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LSM6DS33 9.48 Register description STEP_TIMESTAMP_H (4Ah) Step counter timestamp information register (r). When a step is detected, the value of TIMESTAMP_REG2 register is copied in STEP_TIMESTAMP_H. Table 125. STEP_TIMESTAMP_H register STEP_ TIMESTA MP_H_7 STEP_ TIMESTA MP_H_6 STEP_ TIMESTA MP_H_5 STEP_ TIMESTA MP_H_4 STEP_ TIMESTA MP_H_2 STEP_ TIMESTA MP_H_3 STEP_ TIMESTA MP_H_0 STEP_ TIMESTA MP_H_1 Table 126. STEP_TIMESTAMP_H register description STEP_TIMESTAMP_H[7:0] 9.
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Register description LSM6DS33 Table 132. FUNC_SRC register description Pedometer step recognition on delta time status. Default value: 0 STEP_COUNT (0: no step recognized during delta time; 1: at least one step recognized during _DELTA_IA delta time) Significant motion event detection status. Default value: 0 SIGN_ MOTION_IA (0: significant motion event not detected; 1: significant motion event detected) Tilt event detection status.
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LSM6DS33 9.53 Register description TAP_THS_6D (59h) Portrait/landscape position and tap function threshold register (r/w). Table 135. TAP_THS_6D register D4D_EN SIXD_THS SIXD_THS TAP_THS 1 0 4 TAP_THS 3 TAP_THS 2 TAP_THS 1 TAP_THS 0 Table 136. TAP_THS_6D register description 4D orientation detection enable (Z-axis position detection is disabled). D4D_EN Default value: 0 (0: disabled; 1: enabled) SIXD_THS[1:0] TAP_THS[4:0] Threshold for D6D function.
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Register description 9.55 LSM6DS33 WAKE_UP_THS (5Bh) Single and double-tap function threshold register (r/w). Table 140. WAKE_UP_THS register SINGLE_ DOUBLE INACTIVITY WK_THS5 WK_THS4 WK_THS3 WK_THS2 WK_THS1 WK_THS0 _TAP Table 141. WAKE_UP_THS register description 9.56 SINGLE_DOUBLE_TAP Single/double-tap event enable. Default: 0 (0: only single-tap event enabled; 1: both single and double-tap events enabled) INACTIVITY Inactivity event enable.
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LSM6DS33 9.57 Register description FREE_FALL (5Dh) Free-fall function duration setting register (r/w). Table 144. FREE_FALL register FF_DUR4 FF_DUR3 FF_DUR2 FF_DUR1 FF_DUR0 FF_THS2 FF_THS1 FF_THS0 Table 145. FREE_FALL register description Free-fall duration event. Default: 0 For the complete configuration of the free fall duration, refer to FF_DUR5 in WAKE_UP_DUR (5Ch) configuration Free fall threshold setting. Default: 000 For details refer to Table 146. FF_DUR[4:0] FF_THS[2:0] Table 146.
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Register description LSM6DS33 Table 148. MD1_CFG register description (continued) Routing of free-fall event on INT1. Default value: 0 (0: routing of free-fall event on INT1 disabled; 1: routing of free-fall event on INT1 enabled) INT1_FF Routing of tap event on INT1. Default value: 0 INT1_DOUBLE (0: routing of double-tap event on INT1 disabled; _TAP 1: routing of double-tap event on INT1 enabled) 9.59 INT1_6D Routing of 6D event on INT1.
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LSM6DS33 10 Embedded functions register mapping Embedded functions register mapping The table given below provides a list of the registers for the embedded functions avaialble in the device and the corresponding addresses. Embedded functions registers are accessible when FUNC_CFG_EN is set to ‘1’ in FUNC_CFG_ACCESS (01h). Table 151.
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Embedded functions registers description LSM6DS33 11 Embedded functions registers description 11.1 PEDO_THS_REG (0Fh) Table 152. PEDO_THS_REG register default values PEDO_4G - - THS_ MIN4 THS_ MIN3 THS_ MIN2 THS_ MIN1 THS_ MIN0 Table 153. PEDO_THS_REG register description PEDO_ 4G This bit sets the internal full scale used in pedometer functions. Using this bit, saturation is avoided (e.g. FAST walk). 0: internal full scale = 2 g.
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LSM6DS33 11.3 Embedded functions registers description PEDO_DEB_REG (14h) Table 156. PEDO_DEB_REG register default values DEB_ TIME4 DEB_ TIME3 DEB_ TIME2 DEB_ TIME1 DEB_ TIME0 DEB_ STEP2 DEB_ STEP1 DEB_ STEP0 0 0 0 0 0 1 1 0 Table 157.
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Soldering information 12 LSM6DS33 Soldering information The LGA package is compliant with the ECOPACK®, RoHS and "Green" standard. It is qualified for soldering heat resistance according to JEDEC J-STD-020. Leave "Pin 1 Indicator" unconnected during soldering. Land pattern and soldering recommendations are available at www.st.com/mems.
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LSM6DS33 13 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 13.1 LGA-16 package information Figure 16. LGA 3x3x0.
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Package information 13.2 LSM6DS33 LGA-16 packing information Figure 17. Carrier tape information for LGA-16 package Figure 18.
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LSM6DS33 Package information Figure 19. Reel information for carrier tape of LGA-16 package Table 160. Reel dimensions for carrier tape of LGA-16 package Reel dimensions (mm) A (max) 330 B (min) 1.5 C 13 ±0.25 D (min) 20.2 N (min) 60 G 12.4 +2/-0 T (max) 18.
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Revision history 14 LSM6DS33 Revision history Table 161. Document revision history Date Revision 18-Feb-2015 1 Initial release 17-Jul-2015 2 Updated registers in Section 9: Register description 27-Jul-2015 3 First public release 09-Oct-2015 4 Updated package representation on page 1 Added PEDO_THS_REG (0Fh) and PEDO_DEB_REG (14h) Added Section 13.
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