LIS3MDL Digital output magnetic sensor: ultra-low-power, high-performance 3-axis magnetometer Datasheet - production data Description The LIS3MDL is an ultra-low-power highperformance three-axis magnetic sensor. The LIS3MDL has user-selectable full scales of ±4/ 8/ 12/16 gauss. The self-test capability allows the user to check the functioning of the sensor in the final application. LGA-12 (2.0x2.0x1.0 mm) The device may be configured to generate interrupt signals for magnetic field detection.
Contents LIS3MDL Contents 1 2 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Magnetic and electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Magnetic characteristics . . . . . . . . . . . . . . .
LIS3MDL 7 8 Contents Registers description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.1 WHO_AM_I (0Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.2 CTRL_REG1 (20h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.3 CTRL_REG2 (21h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.4 CTRL_REG3 (22h) . . . . . . . . . . . . . . . . . .
List of tables LIS3MDL List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. 4/33 Device summary . . . . . . . . . . . . . . .
LIS3MDL List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 SPI slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . .
Block diagram and pin description LIS3MDL 1 Block diagram and pin description 1.1 Block diagram Figure 1. Block diagram X+ Y+ CHARGE AMPLIFIER Z+ I (M) CS SCL/SPC I2C CONTROL LOGIC A/D CONVERTER MUX SDA/SDI/SDO SPI SDO/SA1 ZYX- TRIMMING CIRCUITS 1.2 CLOCK INTERRUPT GENERATOR CONTROL LOGIC Pin description X CS 10 Res Z SDA/SDI/SDO Figure 2.
LIS3MDL Block diagram and pin description Table 2.
Magnetic and electrical specifications LIS3MDL 2 Magnetic and electrical specifications 2.1 Magnetic characteristics @ Vdd = 2.5 V, T = 25 °C unless otherwise noted(a) Table 3. Mechanical characteristics Symbol Parameter Test conditions Min. Typ.(1) Max.
LIS3MDL 2.2 Magnetic and electrical specifications Temperature sensor characteristics @ Vdd = 2.5 V, T = 25 °C unless otherwise noted(b). Table 4. Temperature sensor characteristics Symbol Parameter Test conditions TSDr Temperature sensor output change vs. temperature TODR Temperature refresh rate(2) Top Min. - Operating temperature range Typ.(1) Max. Unit 8 LSB/°C ODR Hz -40 +85 °C 1. Typical specifications are not guaranteed. 2.
Magnetic and electrical specifications LIS3MDL 2.4 Communication interface characteristics 2.4.1 SPI - serial peripheral interface Subject to general operating conditions for Vdd and Top. Table 6. SPI slave timing values Value (1) Symbol Parameter Unit Min.
LIS3MDL Magnetic and electrical specifications Sensor I2C - inter IC control interface 2.4.2 Subject to general operating conditions for Vdd and Top. Table 7. I2C slave timing values Symbol I2C standard mode (1) Parameter f(SCL) SCL clock frequency I2C fast mode (1) Min. Max. Min. Max. 0 100 0 400 tw(SCLL) SCL clock low time 4.7 1.3 tw(SCLH) SCL clock high time 4.0 0.6 tsu(SDA) SDA setup time 250 100 th(SDA) SDA data hold time 0 ns 0 0.
Magnetic and electrical specifications 2.5 LIS3MDL Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 8. Absolute maximum ratings Symbol Vdd Vdd_IO Vin Note: Ratings Maximum value Unit Supply voltage -0.3 to 4.
LIS3MDL Terminology and functionality 3 Terminology and functionality 3.1 Sensitivity Sensitivity describes the gain of the sensor and can be determined, for example, by applying a magnetic field of 1 gauss to it. 3.2 Zero-gauss level Zero-gauss level offset describes the deviation of an actual output signal from the ideal output if no magnetic field is present. 3.3 Factory calibration The IC interface is factory calibrated for sensitivity (So) and Zero-gauss level (TyOff).
Application hints 4 LIS3MDL Application hints SCL/SPC SDA/SDI/SDO Figure 5. LIS3MDL electrical connections Z X 12 11 2 (TOP VIEW) 9 8 3 Y CS 10 1 SDO/SA1 DRDY C 1 =100 nF 4 TOP VIEW DIRECTION OF DETECTABLE MAGNETIC FIELDS 55 6 7 INT C 2 =1 µF C 3 =100 nF GND Vdd 4.1 Vdd_IO External capacitors The LIS3MDL requires one external capacitor (C1 = 100 nF) connected between pin 4 and GND.
LIS3MDL 4.3 Application hints High-current wiring effects High current in wiring and printed circuit traces can cause errors in magnetic field measurements for compassing. Conductor-generated magnetic fields will add to the Earth’s magnetic field, causing errors in compass heading computation. Keep currents higher than 10 mA a few millimeters away from the sensor IC.
Digital interfaces 5 LIS3MDL Digital interfaces The registers embedded in the LIS3MDL may be accessed through both the I2C and SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire interface mode. The serial interfaces are mapped to the same pads. To select/exploit the I2C interface, the CS line must be tied high (i.e. connected to Vdd_IO). Table 9. Serial interface pin description Pin name CS 5.
LIS3MDL 5.1.1 Digital interfaces I2C operation The transaction on the bus is started through a START (ST) signal. A START condition is defined as a HIGH-to-LOW transition on the data line while the SCL line is held HIGH. After this has been transmitted by the master, the bus is considered busy.
Digital interfaces LIS3MDL Table 13. Transfer when master is writing multiple bytes to slave Master ST SAD + W SUB Slave SAK DATA DATA SAK SP SAK SAK Table 14. Transfer when master is receiving (reading) one byte of data from slave Master ST SAD + W Slave SUB SAK SR SAD + R SAK NMAK SAK SP DATA Table 15.
LIS3MDL Digital interfaces Figure 6. Read and write protocol CS SPC SDI DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 RW MS AD5 AD4 AD3 AD2 AD1 AD0 SDO DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 AM10129V1 CS is the serial port enable and it is controlled by the SPI master. It goes low at the start of the transmission and goes back high at the end. SPC is the serial port clock and it is controlled by the SPI master. It is stopped high when CS is high (no transmission).
Digital interfaces 5.2.1 LIS3MDL SPI read Figure 7. SPI read protocol CS SPC SDI RW MS AD5 AD4 AD3 AD2 AD1 AD0 SDO DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 AM10130V1 The SPI read command is performed with 16 clock pulses. A multiple byte read command is performed by adding blocks of 8 clock pulses to the previous one. bit 0: READ bit. The value is 1. bit 1: MS bit. When 0, does not increment address; when 1, increments the address in multiple reads. bit 2-7: address AD(5:0).
LIS3MDL 5.2.2 Digital interfaces SPI write Figure 9. SPI write protocol CS SPC SDI D I7 D I6 D I5 D I4 DI3 DI2 DI1 DI0 RW MS AD5 AD 4 AD 3 AD2 AD 1 AD0 AM10132V1 The SPI Write command is performed with 16 clock pulses. A multiple byte write command is performed by adding blocks of 8 clock pulses to the previous one. bit 0: WRITE bit. The value is 0. bit 1: MS bit. When 0, does not increment the address; when 1, increments the address in multiple writes. bit 2 -7: address AD(5:0).
Digital interfaces 5.2.3 LIS3MDL SPI read in 3-wire mode 3-wire mode is entered by setting bit SIM to ‘1’ (SPI serial interface mode selection) in CTRL_REG3 (22h). When 3-wire mode is used, the SDO/SA1 pin has to be connected to GND or Vdd_IO. Figure 11. SPI read protocol in 3-wire mode CS SPC SDI/O D O7 D O6 D O5 DO4 DO3 DO2 DO1 DO0 RW MS AD5 AD 4 AD 3 AD2 AD1 AD 0 AM10134V1 The SPI read command is performed with 16 clock pulses: bit 0: READ bit. The value is 1. bit 1: MS bit.
LIS3MDL 6 Register mapping Register mapping The table below provides a list of the 8-bit registers embedded in the device and their respective addresses. Table 16.
Registers description LIS3MDL 7 Registers description 7.1 WHO_AM_I (0Fh) Table 17. WHO_AM_I register 0 0 1 1 1 1 0 1 Device identification register. 7.2 CTRL_REG1 (20h) Table 18. CTRL_REG1 register TEMP_EN OM1 OM0 DO2 DO1 DO0 FAST_ODR ST Table 19. CTRL_REG1 description TEMP_EN Temperature sensor enable. Default value: 0 (0: temperature sensor disabled; 1: temperature sensor enabled) OM[1:0] X and Y axes operative mode selection.
LIS3MDL Registers description Table 21. X and Y axes operating mode selection OM1 OM0 Operating mode for X and Y axes 0 0 Low-power mode 0 1 Medium-performance mode 1 0 High-performance mode 1 1 Ultra-high-performance mode Table 22. Output data rate configuration DO2 7.3 DO1 DO0 ODR [Hz] 0 0 0 0.625 0 0 1 1.25 0 1 0 2.5 0 1 1 5 1 0 0 10 1 0 1 20 1 1 0 40 1 1 1 80 CTRL_REG2 (21h) Table 23.
Registers description 7.4 LIS3MDL CTRL_REG3 (22h) Table 26. CTRL_REG3 register 0(1) 0(1) 0(1) LP 0(1) SIM MD1 MD0 1. These bits must be set to ‘0’ for correct functioning of the device Table 27. CTRL_REG3 description LP Low-power mode configuration. Default value: 0 If this bit is ‘1’, DO[2:0] is set to 0.625 Hz and the system performs, for each channel, the minimum number of averages. Once the bit is set to ‘0’, the magnetic data rate is configured by the DO bits in CTRL_REG1 (20h) register.
LIS3MDL Registers description Table 31. Z-axis operating mode selection OMZ1 7.6 OMZ0 Operating mode for Z-axis 0 0 Low-power mode 0 1 Medium-performance mode 1 0 High-performance mode 1 1 Ultra-high-performance mode CTRL_REG5 (24h) Table 32. CTRL_REG5 register FAST_READ BDU 0(1) 0(1) 0(1) 0(1) 0(1) 0(1) 1. These bits must be set to ‘0’ for correct functioning of the device Table 33. CTRL_REG5 description 7.
Registers description LIS3MDL Table 35. STATUS_REG description (continued) 7.8 ZYXDA X-, Y- and Z-axis new data available. Default value: 0 (0: a new set of data is not yet available; 1: a new set of data is available) ZDA Z-axis new data available. Default value: 0 (0: new data for the Z-axis is not yet available; 1: new data for the Z-axis is available) YDA Y-axis new data available.
LIS3MDL Registers description Table 37. INT_CFG description 7.13 XIEN Enable interrupt generation on X-axis. Default value: 0 0: disable interrupt request; 1: enable interrupt request YIEN Enable interrupt generation on Y-axis. Default value: 0 0: disable interrupt request; 1: enable interrupt request ZIEN Enable interrupt generation on Z-axis. Default value: 0 0: disable interrupt request; 1: enable interrupt request IEA Interrupt active configuration on INT.
Registers description 7.14 LIS3MDL INT_THS_L(32h), INT_THS_H(33h) Interrupt threshold. Default value: 0. The value is expressed in 16-bit unsigned. Even if the threshold is expressed in absolute value, the device detects both positive and negative thresholds. Table 40. INT_THS_L_M THS7 THS6 THS5 THS4 THS3 THS2 THS1 THS0 THS9 THS8 Table 41. INT_THS_H_M 0(1) THS14 THS13 THS12 THS11 1.
LIS3MDL 8 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 8.1 VFLGA-12 package information Table 42. VFLGA 2x2x1 12LD pitch 0.5 mm package mechanical data mm Dim. Min. Typ. Max. A1 1 A2 0.785 A3 0.200 D1 1.850 2.000 2.
Revision history 9 LIS3MDL Revision history Table 43.
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