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TOP221-227

TOPSwitch-II

Family

Three-terminal Off-line PWM Switch

Figure 1. Typical Flyback Application.

easier. The standard 8L PDIP package option reduces cost in

lower power, high efficiency applications. The internal lead

frame of this package uses six of its pins to transfer heat from

the chip directly to the board, eliminating the cost of a heat sink.

TOPSwitch incorporates all functions necessary for a switched

mode control system into a three terminal monolithic IC: power

MOSFET, PWM controller, high voltage start up circuit, loop

compensation and fault protection circuitry.

Product Highlights

• Lowest cost, lowest component count switcher solution

• Cost competitive with linears above 5W

• Very low AC/DC losses – up to 90% efficiency

• Built-in Auto-restart and Current limiting

• Latching Thermal shutdown for system level protection

• Implements Flyback, Forward, Boost or Buck topology

• Works with primary or opto feedback

• Stable in discontinuous or continuous conduction mode

• Source connected tab for low EMI

• Circuit simplicity and Design Tools reduce time to market

Description

The second generation TOPSwitch-II family is more cost

effective and provides several enhancements over the first

generation TOPSwitch family. The TOPSwitch-II family extends

the power range from 100W to 150W for 100/115/230 VAC

input and from 50W to 90W for 85-265 VAC universal input.

This brings TOPSwitch technology advantages to many new

applications, i.e. TV, Monitor, Audio amplifiers, etc. Many

significant circuit enhancements that reduce the sensitivity to

board layout and line transients now make the design even

PI-1951-091996

CONTROL

TOPSwitch

6 W

10 W

15 W

20 W

TOP221Y

TOP222Y

TOP223Y

TOP224Y

TOP225Y

TOP226Y

TOP227Y

9 W

15 W

25 W

30 W

TOP221P or TOP221G

TOP222P or TOP222G

TOP223P or TOP223G

TOP224P or TOP224G

OUTPUT POWER TABLE

TO-220 (Y) Package

8L PDIP (P) or 8L SMD (G) Package

MAX

5,6

PART

ORDER

NUMBER

Single Voltage Input

100/115/230 VAC

±15%

Wide Range Input

85 to 265 VAC

Single Voltage Input

100/115/230 VAC

±15%

Wide Range Input

85 to 265 VAC

MAX

5,6

7 W

15 W

30 W

45 W

60 W

75 W

90 W

MAX

4,6

12 W

25 W

50 W

75 W

100 W

125 W

150 W

MAX

4,6

Notes: 1. Package outline: TO-220/3 2. Package Outline: DIP-8 or SMD-8 3. 100/115 VAC with doubler input 4. Assumes appropriate

heat sinking to keep the maximum TOPSwitch junction temperature below 100 °C. 5. Soldered to 1 sq. in.( 6.45 cm

), 2 oz. copper clad

(610 gm/m

) 6. P

MAX

is the maximum practical continuous power output level for conditions shown. The continuous power capability

in a given application depends on thermal environment, transformer design, efficiency required, minimum specified input voltage, input

storage capacitance, etc. 7. Refer to key application considerations section when using TOPSwitch-II in an existing TOPSwitch design.

PART

ORDER

NUMBER

July 2001

Summary of content (20 pages)

PAGE 1
® TOP221-227 ® TOPSwitch-II Family Three-terminal Off-line PWM Switch Product Highlights • • • • • • • • • • Lowest cost, lowest component count switcher solution Cost competitive with linears above 5W Very low AC/DC losses – up to 90% efficiency Built-in Auto-restart and Current limiting Latching Thermal shutdown for system level protection Implements Flyback, Forward, Boost or Buck topology Works with primary or opto feedback Stable in discontinuous or continuous conduction mode Source connected tab fo
PAGE 2
TOP221-227 VC 0 CONTROL DRAIN ZC SHUTDOWN/ AUTO-RESTART SHUNT REGULATOR/ ERROR AMPLIFIER + + 1 5.7 V 4.7 V INTERNAL SUPPLY ÷8 - 5.7 V + - IFB THERMAL SHUTDOWN POWER-UP RESET S Q R Q VI LIMIT CONTROLLED TURN-ON GATE DRIVER OSCILLATOR DMAX CLOCK SAW - S Q + R Q LEADING EDGE BLANKING PWM COMPARATOR MINIMUM ON-TIME DELAY RE SOURCE PI-1935-091696 Figure 2. Functional Block Diagram. Pin Functional Description DRAIN Pin: Output MOSFET drain connection.
PAGE 3
TOP221-227 TOPSwitch-II Family Functional Description TOPSwitch is a self biased and protected linear control currentto-duty cycle converter with an open drain output. High efficiency is achieved through the use of CMOS and integration of the maximum number of functions possible. CMOS process significantly reduces bias currents as compared to bipolar or discrete solutions. Integration eliminates external power resistors used for current sensing and/or supplying initial startup bias current.
PAGE 4
TOP221-227 TOPSwitch-II Family Functional Description (cont.) Control Voltage Supply CONTROL pin voltage VC is the supply or bias voltage for the controller and driver circuitry. An external bypass capacitor closely connected between the CONTROL and SOURCE pins is required to supply the gate drive current. The total amount of capacitance connected to this pin (CT) also sets the autorestart timing as well as control loop compensation. VC is regulated in either of two modes of operation.
PAGE 5
TOP221-227 VIN VIN DRAIN 0 VOUT 0 IOUT 0 1 2 • • • 8 1 2 • • • 8 1 VC VC(reset) 0 1 IC 2 8 1 2 • • • 0 1 8 1 • • • 2 1 3 1 PI-2030-042397 Figure 6. Typical Waveforms for (1) Normal Operation, (2) Auto-restart, and (3) Power Down Reset. compensated to minimize variation of the effective peak current limit due to temperature related changes in output MOSFET RDS(ON).
PAGE 6
TOP221-227 L1 3.3 µH D2 UF5401 +5 V + R3 47 kΩ C2 330 µF 10 V C1 2.2 nF 1 kV VR1 RTN D1 UF4005 R2 100 Ω D3 1N4148 Wide-Range DC Input T1 D C3 100 µF 10 V U1 TOP221P CONTROL TOPSwitch-II - + C4 100 µF 16 V C S R1 10 Ω C5 47 µF 10 V U2 PC817A 12 V Non-Isolated PI-2115-040401 Figure 7. Schematic Diagram of a 4 W TOPSwitch-II Standby Power Supply using an 8 lead PDIP. Application Examples Following are just two of the many possible TOPSwitch implementations.
PAGE 7
TOP221-227 L1 3.3 µH D2 MUR420 +12 V C2 330 µF 35 V VR1 P6KE200 C3 220 µF 35 V RTN L2 22 mH D1 BYV26C BR1 400 V C1 47 µF 400 V C6 0.1 µF 250 VAC J1 TOPSwitch-II R2 220 Ω T1 C R3 6.8 Ω S L R1 100 Ω C4 0.1 µF U1 D TOP224P CONTROL F1 3.15 A D3 1N4148 C5 47 µF U2 PC817A C7 1 nF 250 VAC Y1 VR2 1N5241B 11 V N PI-2019-033197 Figure 8. Schematic Diagram of a 20 W Universal Input TOPSwitch-II Power Supply using an 8 lead PDIP.
PAGE 8
TOP221-227 Key Application Considerations General Guidelines • Keep the SOURCE pin length very short. Use a Kelvin connection to the SOURCE pin for the CONTROL pin bypass capacitor. Use single point grounding techniques at the SOURCE pin as shown in Figure 9. • Minimize peak voltage and ringing on the DRAIN voltage at turn-off. Use a Zener or TVS Zener diode to clamp the drain voltage below the breakdown voltage rating of TOPSwitch under all conditions, including start-up and overload.
PAGE 9
TOP221-227 TO-220 PACKAGE Bias/Feedback Return C High Voltage Return S Kelvin-connected auto-restart/bypass capacitor C5 and/or compensation network D DRAIN C5 SOURCE Bias/Feedback Input CONTROL C5 PC Board Do not bend SOURCE pin. Keep it short. Kelvin-connected auto-restart/bypass capacitor C5 Bias/Feedback Input and/or compensation network Bias/Feedback Return Bend DRAIN pin forward if needed for creepage.
PAGE 10
TOP221-227 ABSOLUTE MAXIMUM RATINGS(1) DRAIN Voltage ............................................ -0.3 to 700 V DRAIN Current Increase (∆ID) in 100 ns except during blanking time ......................................... 0.1 x ILIMIT(MAX)(2) CONTROL Voltage ..................................... - 0.3 V to 9 V CONTROL Current ............................................... 100 mA Storage Temperature ..................................... -65 to 150 °C Notes: 1. All voltages referenced to SOURCE, TA = 25 °C.
PAGE 11
TOP221-227 Conditions Parameter Symbol (Unless Otherwise Specified) See Figure 14 SOURCE = 0 V; TJ = -40 to 125 °C Min Typ Max Units SHUTDOWN/AUTO-RESTART (cont.) Auto-restart Threshold Voltage S1 open VC(AR) 5.7 V UV Lockout Threshold Voltage S1 open 4.4 4.7 Auto-restart Hysteresis Voltage S1 open 0.6 1.0 TOP221-222 2 5 9 TOP223-227 2 5 8 Auto-restart Duty Cycle S1 open Auto-restart Frequency 5.0 V 1.
PAGE 12
TOP221-227 Conditions Parameter Symbol (Unless Otherwise Specified) See Figure 14 SOURCE = 0 V; TJ = -40 to 125 °C Min Typ Max Units CIRCUIT PROTECTION (cont.) Current Limit Delay tILD Thermal Shutdown Temperature Power-up Reset Threshold Voltage VC(RESET) IC = 4 mA 100 ns °C IC = 4 mA 125 135 S2 open 2.0 3.3 4.3 V OUTPUT ON-State Resistance RDS(ON) OFF-State Current IDSS Breakdown Voltage BVDSS Rise Time tR Fall Time tF 12 TOP221 TJ = 25 °C 31.2 36.
PAGE 13
TOP221-227 Conditions Parameter Symbol (Unless Otherwise Specified) See Figure 14 SOURCE = 0 V; TJ = -40 to 125 °C Min Typ Max Units OUTPUT (cont.) DRAIN Supply Voltage Shunt Regulator Voltage VC(SHUNT) See Note C 36 IC = 4 mA 5.5 Shunt Regulator Temperature Drift CONTROL Supply/ Discharge Current V 5.7 6.0 ±50 ICD1 ICD2 ppm/°C Output TOP221-224 0.6 1.2 1.6 MOSFET Enabled TOP225-227 0.7 1.4 1.8 0.5 0.8 1.1 Output MOSFET Disabled V mA NOTES: A.
PAGE 14
TOP221-227 t1 HV 90% 90% DRAIN VOLTAGE t D= 1 t2 10% PI-1939-091996 t2 CONTROL Pin Current (mA) 120 100 80 60 40 Dynamic 1 = Impedance Slope 20 0V 0 0 PI-2039-040401 tLEB IINIT(MIN) @ 85 VAC 10 ∆ID IINIT(MIN) @ 265 VAC DRAIN CURRENT ILIMIT(MAX) @ 25 °C ILIMIT(MIN) @ 25 °C 0 1 2 3 4 5 6 7 8 Time (µs) Figure 12. Self-protection Current Limit Envelope. D 7/01 8 100 ns 0 14 6 Figure 11. TOPSwitch CONTROL Pin I-V Characteristic. tLEB (Blanking Time) 1.3 1.2 1.1 1.0 0.9 0.
PAGE 15
TOP221-227 470 Ω 5W S2 D CONTROL 470 Ω C TOPSwitch S1 S 0.1 µF 40 V 47 µF 0-50 V NOTES: 1. This test circuit is not applicable for current limit or output characteristic measurements. 2. For P package, short all SOURCE and SOURCE (HV RTN) pins together. PI-1964-110696 Figure 14. TOPSwitch General Test Circuit. Curve Tracer C B E D CONTROL TOPSwitch C S 6.5 V 4.
PAGE 16
TOP221-227 BENCH TEST PRECAUTIONS FOR EVALUATION OF ELECTRICAL CHARACTERISTICS The following precautions should be followed when testing TOPSwitch by itself outside of a power supply. The schematic shown in Figure 14 is suggested for laboratory testing of TOPSwitch. When the DRAIN supply is turned on, the part will be in the Auto-restart mode. The CONTROL pin voltage will be oscillating at a low frequency from 4.7 to 5.7 V and the DRAIN is turned on every eighth cycle of the CONTROL pin oscillation.
PAGE 17
TOP221-227 Typical Performance Characteristics (cont.) OUTPUT CHARACTERISTICS DRAIN Capacitance (pF) PI-1940-033001 1000 2 Scaling Factors: TOP227 1.00 TOP226 0.83 TOP225 0.67 TOP224 0.50 TOP223 0.33 TOP222 0.17 TOP221 0.09 1 0 Scaling Factors: TOP227 1.00 TOP226 0.83 TOP225 0.67 TOP224 0.50 TOP223 0.33 TOP222 0.17 TOP221 0.09 100 10 2 4 6 8 10 0 200 DRAIN Voltage (V) 400 600 DRAIN Voltage (V) DRAIN CAPACITANCE POWER 500 PI-1942-033001 0 Scaling Factors: TOP227 1.00 TOP226 0.
PAGE 18
TOP221-227 TO-220/3 DIM inches mm A B C D E F .460-.480 .400-.415 .236-.260 .240 - REF. .520-.560 11.68-12.19 .028-.038 .045-.055 G H J K L M N O P .090-.110 .165-.185 .045-.055 .095-.115 .015-.020 .705-.715 .146-.156 .103-.113 J 10.16-10.54 5.99-6.60 6.10 - REF. 13.21-14.22 .71-.97 1.14-1.40 2.29-2.79 4.19-4.70 1.14-1.40 2.41-2.92 .38-.51 17.91-18.16 B K P C O A N L D 3.71-3.96 2.62-2.87 E F Notes: 1.
PAGE 19
TOP221-227 SMD-8 Heat Sink is 2 oz. Copper As Big As Possible D S .004 (.10) -E- 8 inches mm A B C G H J1 J2 J3 J4 K L M P α 0.370-0.385 0.245-0.255 0.125-0.135 0.004-0.012 0.036-0.044 0.060 (NOM) 0.048-0.053 0.032-0.037 0.007-0.011 0.010-0.012 0.100 BSC 0.030 (MIN) 0.372-0.388 0-8° 9.40-9.78 6.22-6.48 3.18-3.43 0.10-0.30 0.91-1.12 1.52 (NOM) 1.22-1.35 0.81-0.94 0.18-0.28 0.25-0.30 2.54 BSC 0.76 (MIN) 9.45-9.86 0-8° 5 1 E S .010 (.25) P B .420 .046 .060 .080 .086 .186 .286 -D- A M .060 .
PAGE 20
TOP221-227 Revision Notes Date 1) Updated package references. C D 12/97 7/01 2) Corrected Spelling. 3) Corrected Storage Temperature θJC and updated nomenclature in parameter table. 4) Added G package references to Self-Protection Current Limit parameter. 5) Corrected font sizes in figures. For the latest updates, visit our Web site: www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability.