User manual

Pulse Catch Input

Mode 50

UP Counters

Installation and

Safety Guidelines

7–8

Pulse Catch Input

DL205 High Speed Counter

Interface Manual, 2nd Ed, Rev. A

The following RLL example shows how to set the Pulse Catch Input, Mode 50, in

V–memory location V7633.

DirectSOFT32 Display

K50

SP0

Load Mode 50 in Accumulator

OUT

V7633

Transfer Contents of

Accumulator to V7633

Two commands are needed to put the values into V-memory. The value must first be

loaded into the accumulator of the CPU, then the CPU must transfer the value to the

memory location. In this case, 50 is to be placed in V7633. This value is loaded into

the accumulator, LD K50. The CPU then writes this data to the memory location

V7633, once it reads the OUT command, OUT V7633. Notice that an SP0 contact is

used in this rung. This relay is on for the first scan only. This will load the values into

memory initially, thereby keeping the scan time to a minimum.

Up to four(4) pulse catch inputs can be used with the DL240/250–1/260 CPUs and

one (1) pulse catch input for the DL230 CPU. The following steps will discuss the

programming for each channel which has an interrupt device wired to it.

The table below gives a description for each of the V-memory locations that must be

configured for each I/O point which are selected to have high speed interrupt

capability.

V–Memory Description

V7633 Primary Mode (Pulse Catch=50)

V7634 Point 00

V7635 Point 01

V7636 Point 02

V7637 Point 03

Step 2:

How Many Pulse

Catch Inputs

Step 3:

Configure the

V-Memory