Specifications

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2-43 Event-Trigger SOCB Pulse Generator .................................................................................. 70
3-1 Simplified ePWM Module.................................................................................................. 72
3-2 EPWM1 Configured as a Typical Master, EPWM2 Configured as a Slave ........................................ 73
3-3 Control of Four Buck Stages. Here F
PWM1
≠ F
PWM2
≠ F
PWM3
≠ F
PWM4
.................................................. 74
3-4 Buck Waveforms for Figure 3-3 (Note: Only three bucks shown here) ............................................. 75
3-5 Control of Four Buck Stages. (Note: F
PWM2
= N x F
PWM1
) ............................................................. 77
3-6 Buck Waveforms for Figure 3-5 (Note: F
PWM2
= F
PWM1)
) .............................................................. 78
3-7 Control of Two Half-H Bridge Stages (F
PWM2
= N x F
PWM1
) ........................................................... 80
3-8 Half-H Bridge Waveforms for Figure 3-7 (Note: Here F
PWM2
= F
PWM1
) .............................................. 81
3-9 Control of Dual 3-Phase Inverter Stages as Is Commonly Used in Motor Control ................................ 83
3-10 3-Phase Inverter Waveforms for Figure 3-9 (Only One Inverter Shown) ........................................... 84
3-11 Configuring Two PWM Modules for Phase Control .................................................................... 86
3-12 Timing Waveforms Associated With Phase Control Between 2 Modules .......................................... 87
3-13 Control of a 3-Phase Interleaved DC/DC Converter ................................................................... 88
3-14 3-Phase Interleaved DC/DC Converter Waveforms for Figure 3-13 ................................................ 89
3-15 Controlling a Full-H Bridge Stage (F
PWM2
= F
PWM1)
..................................................................... 91
3-16 ZVS Full-H Bridge Waveforms ........................................................................................... 92
4-1 Time-Base Period Register (TBPRD).................................................................................... 96
4-2 Time-Base Phase Register (TBPHS) .................................................................................... 96
4-3 Time-Base Counter Register (TBCTR) .................................................................................. 96
4-4 Time-Base Control Register (TBCTL) ................................................................................... 97
4-5 Time-Base Status Register (TBSTS) .................................................................................... 99
4-6 Counter-Compare A Register (CMPA) .................................................................................. 99
4-7 Counter-Compare B Register (CMPB) ................................................................................. 100
4-8 Counter-Compare Control Register (CMPCTL) ....................................................................... 101
4-9 Compare A High Resolution Register (CMPAHR) ................................................................... 102
4-10 Action-Qualifier Output A Control Register (AQCTLA) ............................................................... 102
4-11 Action-Qualifier Output B Control Register (AQCTLB) ............................................................... 103
4-12 Action-Qualifier Software Force Register (AQSFRC) ................................................................ 104
4-13 Action-Qualifier Continuous Software Force Register (AQCSFRC) ................................................ 105
4-14 Dead-Band Generator Control Register (DBCTL) .................................................................... 106
4-15 Dead-Band Generator Rising Edge Delay Register (DBRED) ...................................................... 108
4-16 Dead-Band Generator Falling Edge Delay Register (DBFED) ..................................................... 108
4-17 PWM-Chopper Control Register (PCCTL) ............................................................................. 108
4-18 Trip-Zone Select Register (TZSEL) .................................................................................... 110
4-19 Trip-Zone Control Register (TZCTL) ................................................................................... 111
4-20 Trip-Zone Enable Interrupt Register (TZEINT) ........................................................................ 112
4-21 Trip-Zone Flag Register (TZFLG)....................................................................................... 112
4-22 Trip-Zone Clear Register (TZCLR) ..................................................................................... 113
4-23 Trip-Zone Force Register (TZFRC) ..................................................................................... 114
4-24 Event-Trigger Selection Register (ETSEL) ............................................................................ 115
4-25 Event-Trigger Prescale Register (ETPS) .............................................................................. 116
4-26 Event-Trigger Flag Register (ETFLG) .................................................................................. 118
4-27 Event-Trigger Clear Register (ETCLR) ................................................................................ 118
4-28 Event-Trigger Force Register (ETFRC) ................................................................................ 120
List of Figures6 SPRU791F – November 2004 – Revised July 2009
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