Technical data

13.3 Several CP 5430 TF/CP 5431 FMS Modules on a
SINEC L2 Bus
Dynamic clock masters can be configured on an L2 bus. The L2 address
determines which CP 5430 TF/CP 5431 FMS assumes the clock master
function. A double definition is not possible.
The clock is programmed in the Edit->Clock_Init screen.
The values entered in the screen correspond to the defaults.
Clock master (Y/N):
Y The CP 5430 TF/CP 5431 FMS can become the clock master if it has
the highest priority and can transmit clock synchronization frames.
Clock Master Editor
Clock master
Sync cycle
N
10
sec.
:
:
CP Type:
Source:
F
1
F
2
F
3
F
4
F
5
F
6
F
7
F
8
OK
SELECT
Fig. 13.4 Edit -> Clock Init Screen
Clock Services C8976060/02
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