Technical data

13.6 Accuracy
The hardware clock of the CP 5430 TF/CP 5431 FMS has a maximum
deviation of 11.94
s/day
or 8.3
ms/min
. This deviation is based on a
calculation involving the quartz inaccuracy and temperature fluctuation.
➣
Absolute accuracy
The absolute accuracy of the clock chip on the CP 5430 TF/CP 5431
FMS is in the worst case +/- 11.94 sec per day.
For this reason, it is necessary to compensate for this deviation in the
CP 5430 TF/CP 5431 FMS hardware clock by receiving synchronization
frames.
The time is kept on the hardware clock of the CP 5430 TF/CP 5431
FMS with a resolution of 10 ms.
To achieve a system-wide clock accuracy in the programmable
controllers, a time difference of 20 ms must not be exceeded. This is
achieved by time of day synchronization.
➣
Relative accuracy
If the times on the SINEC H1 relative to each other should not deviate
by more than 20 ms, the relationship between the Ethernet address (ID)
and cycle time of the synchronization frame must be borne in mind.
Once it is running, if the CP sends a synchronization frame, the
following deviations are possible providing the CP is only functioning as
clock master.
Cycle time 1 sec 10 sec 60 sec
Deviation 0.28 ms/s 2.77 ms/10s 16.6 ms/min
Table 13.1 Accuracy
Clock Services C8976060/02
Volume 1 13 - 18