Technical data

4.1.2 Data Exchange between the CPU and CP 5430 TF/CP 5431
FMS
The following section explains how the CP 5430 TF/CP 5431 FMS receives
data for transmission from the CPU and how it passes on data it has
received to the CPU.
The following programmable controllers of the SIMATIC S5 family are
supported:
➣
S5-115U with CPU 942, 943, 944, 941B, 942B, 943B, 944B, 945
➣
S5-115H
➣
S5-135U (single and multiprocessor system) with CPU 922, 928, 928B
➣
S5-155U (single and multiprocessor system) with CPU 922, 928, 928B,
946/947, 948
➣
S5-155H.
Depending on the type of data transmission, the CPU and CPs in the same
PLC exchange data in different ways:
➣
Using the I/Os
➣
Using job buffers and the dual-port RAM
Data exchange via I/Os
With data transmission using GP/DP/ZP (refer to Chapters 9 and 10 and
11) the data exchange takes place using the I/O address area. Depending
on the address, this area in the STEP 5 control program can either be
addressed via the process image of inputs and outputs (PII and PIQ) or
directly.
☞
This data exchange is only possible using the base interface
number of the CP (see Fig. 4.3). R In the multiprocessor
mode, data exchange via I/Os is only possible with CPU 1
(other CPUs have no access to the base interface).
B8976060/02 Technical Description and Installation of the CP 5430 TF/CP 5431 FMS
4 - 7 Volume 1