Data Sheet

11Version 1.0
11.0 MemoryMap
11.1 Flash
11.2 R AM
11.3 ROMandeFuses
Table 5 – Flash memory map
Table 6 – RAM memory map
Table 7 – Miscellaneous memory
Name Description Startaddress Size
NVS Non–volatile RAM area. Used by the NVS API 0x9000 0x7000
Firmware Slot 0 First rmware slot. Factory rmware is ashed here 0x10000 0x180000
OTA info Information about the current active rmware 0x190000 0x1000
Firmware Slot 1 Second rmware slot 0x1A0000 0x180000
File system 504KB le system on devices with 4MB ash 0x380000 0x7F000
Cong Cong area for LoRa, Sigfox and LTE 0x3FF000 0x1000
Name Description Size
On–chip SRAM Internal RAM memory used by the 2 xtensa CPUs 520KB
Fast RTC RAM
Fast RAM area accessible by the xtensa cores during
boot and sleep modes
8KB
Slow RTC RAM
Slow RAM area accessible by the Ultra–Low Power
Coprocessor during deep sleep
8KB
External pSRAM External QSPI RAM memory clocked @ 40MHz 4MB
Name Description Size
On–chip ROM Contains core functions and boot code. 448KB
eFuse
256 bits are used for the system (MAC address and
chip conguration) and the remaining 768 bits are
reserved for customer applications, including Flash–
Encryption and Chip–ID
1kbit