Data Sheet
Table Of Contents
- 1PYGATE main
- PYGATE p.02 Content
- PYGATE p.03
- PYGATE p.04
- PYGATE p.05
- PYGATE p.06
- PYGATE p.07
- PYGATE p.08
- PYGATE p.09
- PYGATE p.10
- PYGATE p.11
- PYGATE p.12
- PYGATE p.13
- PYGATE p.14
- PYGATE p.15
- PYGATE p.16
- PYGATE p.17
- PYGATE p.18
- PYGATE p.19
- PYGATE p.20
- PYGATE p.21
- PYGATE p.22
- PYGATE p.23
- PYGATE p.24
- PYGATE p.25
- PYGATE p.26
- PYGATE p.27
- PYGATE p.28
10
Version 1.1
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6.3 Module (WiPy3, GPy or LoPy4) socket pinout
Table 4 - J5 socket to a Pycom module
Pin
Pin
Type
Name
Description
1 RESET
Output Pycom Module reset, active low
Module UART RX used for
communication with PC and to program
module in bootloader mode.
Module UART TX used for
communication with PC and to program
module in bootloader mode.
If tied to GND during boot, the decice will
enter bootloader mode.
Connected to the on-board RGB LED
LoRa packets processor SPI chip select
Output
Input
Input/Output
Input
2 UART_RX
3 UART_TX
4 RC0
5 HOST_CSN
6 FEM_EN
Input
Power enable of RF Front-End Module
Reserved
Reserved
Reserved
Reset of IQ RF Transceivers
Floating
Floating
Floating
Input
7 NC
8 NC
9 NC
10 SX1257_RST
11 HOST_MOSI
Input
LoRa packets processor SPI Master
Output Slave Input
LoRa packets processor SPI clock
Input
12 HOST_SCK
13
SX1308_RST
Input
LoRa packets processor RESET
To make Pycom module to enter the safe
boot mode.
Output
14 SAFE_BOOT