Specifications

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SLWS142J − JANUARY 2003 − REVISED AUGUST 2007
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Transmit Input Mode Bits Pins Port Pins Used Number of Divided Clocks for I and Q, or I
20 16 15..0 8
16,12 16 15..0 4
20 8 15..8 24
TDM(not splitiQ) IQ
16,12 8 15..8 16
TDM(not splitiQ) IQ
Data
8 8 15..8 8
Data
20 4 15..12 40
16 4 15..12 32
12 4 15..12 24
8 4 15..12 16
20 16 15..0 8
16,12 16 15..0 4
20 8 15..8 12
TDM(splitiQ) IQ Data
16,12 8 15..8 8
TDM(splitiQ) IQ Data
8 8 15..8 4
20 4 15..12 20
16 4 15..12 16
TDM(parIQ, splitiQ) 8 16 15..0 4
14.2.4 Real or IQ Multiplexed
The GC5016 may be configured to have one input port for each channel. For complex data, I is followed by Q. The
Frame Strobe is set high and low, marking the start of the transmit input frame. The 1−>0 transitions of Frame Strobe
and clock transition mark time 0 (tinf_fs_dly = 0) of the input data sequence. The Real mode starts out the same as
IQ multiplexed but only the I data sample times are used.