Specifications

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SLWS142J − JANUARY 2003 − REVISED AUGUST 2007
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Table 3. DUC Output Formats
Modes Output Ports CMD5016 Keyword Values
Rate Real
or IQ
Sum AO BO CO DO tout_rate tout_cmplx tout_nsig
The following modes assume no external sum IO with standard 16 bit resolution (tout_sumio=0 and tout_res=0)
full real none AI BI CI DI 1 0 4
full real pairs (AI+BI) (CI+DI) off off 1 0 2
full real all (AI+BI+CI+DI) off off off 1 0 1
full IQ pairs (AI+BI) (AQ+BQ) (CI+DI) (CQ+DQ) 1 1 2
full IQ all (AI+BI+CI+DI) (AQ+BQ+CQ+DQ) off off 1 1 1
half IQ none AI, AQ BI, BQ CI, CQ DI, DQ 0 1 4
half IQ pairs (AI+BI), (AQ+BQ) (CI+DI), (CQ+DQ) off off 0 1 2
half IQ all (AI+BI+CI+DI),
(AQ+BQ+CQ+DQ)
off off off
The following modes assume external sum IO is used with standard 16 bit resolution (tout_sumio=1 and tout_res=0)
full real all extI+(AI+BI+CI+DI) off extI (input port) off 1 0 1
full IQ all extI+ (AI+BI+CI+DI) extQ+(AQ+BQ+CQ+DQ) extI (input port) extQ (input port) 1 1 1
half IQ all extI+ (AI+BI+CI+DI),
extQ+(AQ+BQ+CQ+DQ)
off extI, extQ
(input port)
off 0 1 1
The following modes assume external sum IO is used with wide 22 bit resolution (tout_sumio=1 and tout_res=1)
full real all 16 MSBs of
extI+(AI+BI+CI+DI)
6 LSBs of
extI+(AI+BI+CI+DI)
16 MSBs of extI
(input port)
6 LSBs of extI
(input port)
1 0 1
half IQ all 16 MSBs of
extI+ (AI+BI+CI+DI),
extQ+(AQ+BQ+CQ+DQ)
6 LSBs of
extI+ (AI+BI+CI+DI),
extQ+(AQ+BQ+CQ+DQ)
16 MSBs of
extI, extQ
(input port)
6 LSBs of
extI, extQ
(input port)
0 1 1
The following modes are for splitIQ, no external sum IO, and standard resolution (split_IQ=1, tout_sumio=0, tout_res=0)
full real none ABI CDI off off 1 0 2
full real all (ABI+CDI) off off off 1 0 1
full IQ none ABI ABQ CDI CDQ 1 1 2
full IQ all (ABI+CDI) ABQ+CDQ off off 1 1 1
half IQ none (ABI, ABQ) CDI, CDQ off off 0 1 2
half IQ all ABI+ABQ, CDI+CDQ off off off 0 1 1
The following modes are for splitIQ, using external sum IO, and standard resolution (split_IQ=1, tout_sumio=1, tout_res=0)
full real all extI+(ABI+CDI) off extI (input port) off 1 0 1
full IQ all extI+(ABI+CDI) extQ+(ABQ+CDQ) extQ (input port) off 1 1 1
half IQ all extI+(ABI+ABQ),
extQ+(CDI+CDQ)
off extI, extQ
(input port)
off 0 1 1
The following modes are for splitIQ, using external sum IO, and wide resolution (split_IQ=1, tout_sumio=1, tout_res=1)
full real all 16 MSBs of
extI+(ABI+CDI)
16 MSBs of
extI+(ABI+CDI)
16 MSBs of
extI (input port)
16 MSBs of
extI (input port)
1 0 1
half IQ all 16 MSBs of
extI+(ABI+ABQ),
extQ+(CDI+CDQ)
6 LSBs of
extI+(ABI+ABQ),
extQ+(CDI+CDQ)
16 MSBs of
extI, extQ
(input port)
6 LSBs of
extI, extQ
(input port)
0 1 1
The following modes are for double rate output, no external sum IO, standard resolution (split_IQ=1, tout_rate=2, tout_sumio=0, tout_res=0)
doub
le
real none ABIeven ABIodd CDIeven CDIodd 2 0 2
doub
le
real all ABIeven+CDIeven ABIodd+CDIodd off off 2 0 1
doub
le
IQ all ABIeven+CDIeven ABQeven+CDQeven ABIodd+
CDIodd
ABQodd+
CDQodd
2 1 1
The following mode is for double rate output, with external sum IO, and standard resolution (split_IQ=1, tout_rate=2, tout_sumio=1, tout_res=0)
doub
le
real all extIeven +ABIeven+CDIeven extIodd+
ABIodd+CDIodd
extIeven
(input port)
extIodd
(input port)
2 0 1