Specifications

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SLWS142J − JANUARY 2003 − REVISED AUGUST 2007
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Rcv DESCRIPTIONDEFAULTTYPENAMEXmt
D D splitiqAB channel
pair
0 If set, channel A and B are splitIQ mode, I data is processed in ChA, the Q data is
processed in ChB.
D D splitiqCD channel
pair
0 If set, channel C and D are splitIQ mode, I data is processed in ChC, the Q data is
processed in ChD.
D D splitiq global 0 If set, complex IQ data is split so the I data goes to one filter and Q data goes to another.
This applies to both pairs of channels AB and CD.
D D syncmode global 0 Setting to combine channel and global sync options, adds one shot startup sequence
at end of file, if proper mode is selected
X M tinf_cmplx channel NA Transmit input data is complex (1) or real (0). If splitiq is on tinf_cmplx must be real.
X D tinf_fs_dly channel 3 Transmit input frame strobe delay. Delays internal strobe identifying the MSB from the
output frame strobe. 4 bits
X D tinf_tdm global 0 TDM’d transmit input data is expected on port AI(1), or normal (0).
X D tout_cmplx global 1 Transmit output data is complex (1) or real (0).
X D tout_nsig global NA Number of transmit output signals. Defines how channels are summed together. The
number of input signals is derived from channels in transmit mode that are powered and
whether they are in splitiq or not.
X D tout_rate global 1 Transmit output rate is half (0) for IQ time multiplexed, full (1) or double (2). If double,
splitiq must also be set.
X D tout_res global 1 Transmit output resolution is normal (0) for 16 bits or less, high resolution (1) up to 22
bits, or complementary signaling (2).
X D tout_sumin global 0 Sumin port active (1) or not (0).
M M freq channel Frequency. determines the fractional phase value with Fck, to be loaded into the 48bit
frequency registers freq_msb, freq_mid, and freq_lsb.
M M fck global The chip clock rate. It is used to compute estimated power as well as to convert freq.
17.2 DDC Mode Pseudo-Fields
mode AB(CD) receive − identifies DDC mode
rin_rate, rin_cmplx − determines the Receive Input Formatter mode, double rate processing
splitiq, splitiqAB, splitiqCD − determine the 2channel or 4 channel mode
freq, fck, bypass_mix − determine the complex mixer freq_msb, freq_mid, freq_lsb settings
bypass_cic, cic_dec − determines the dual CIC filter decimation
bypass_fir, fir_dec, fir_diff, fir_nchan, fir_coef − determine the PFIR mode, and filter taps
gain, overall_gain − manual gain settings
agc_cf, agc_mode, agc_tc − agc gain settings
pwr_mtr_on −setup of receive Power Meter
routf_tdm − receive output format control for PortD TDM mode