Specifications


SLWS142J − JANUARY 2003 − REVISED AUGUST 2007
www.ti.com
68
Table 12 lists the control registers for cicAB.
Table 12. Control Registers for cicAB
PAGE ADDRESS REGISTER DESCRIPTION
80 10 A CIC mode
80 11 A phase
80 12 A frequency (LSB)
80 13 A frequency (mid)
80 14 A frequency (MSB)
80 15 A mixer
80 16 A NCO sync and dither control
80 17 A CIC count and sync
80 18 B CIC mode
80 19 B phase
80 1a B frequency (LSB)
80 1b B frequency (mid)
80 1c B frequency (MSB)
80 1d B mixer
80 1e B NCO sync and dither control
80 1f B CIC count and sync
81 10 Sum tree sum selection
81 11 Sum tree multiplexing
81 12 Receive sensitivity reduction path A
81 13 Receive sensitivity reduction path B
81 14 Receive sensitivity reduction path C
81 15 Receive sensitivity reduction path D
Table 13 lists the control registers for cicCD.
Table 13. Control Registers for cicCD
PAGE ADDRESS REGISTER DESCRIPTION
a0 10 C CIC mode
a0 11 C phase
a0 12 C frequency (LSB)
a0 13 C frequency (mid)
a0 14 C frequency (MSB)
a0 15 C mixer
a0 16 C NCO sync and dither control
a0 17 C CIC count and sync
a0 18 D CIC mode
a0 19 D phase
a0 1a D frequency (LSB)
a0 1b D frequency (mid)
a0 1c D frequency (MSB)
a0 1d D mixer
a0 1e D NCO sync and dither control
a0 1f D CIC count and sync
a1 10 Receive input formatter
a1 11 General timer
a1 12 Receive syncs
a1 13 Transmit output multiplexing
a1 14 Transmit output rounding and hold
a1 15 Transmit checksum