Product data

TDA8007BHL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9.1 — 18 June 2012 21 of 51
NXP Semiconductors
TDA8007BHL
Multiprotocol IC card interface
Fig 13. Minimum time between two read operations in register URR - multiplexed mode TDA8007BHL/C3
I/O
bit RBF
bit FE
fce903
INT
RD
bit CRED
t
SB(FE)
t
SB(RBF)
t
RD(URR)
t
RD(URR)
t
W(RD)
Fig 14. Minimum time between two write operations in register UTR - multiplexed mode TDA8007BHL/C3
I/O
bit TBE
fce902
INT
WR
bit CRED
t
W(WR)
t
WR(UTR)
Fig 15. Minimum time between two write operations in register TOC - multiplexed mode TDA8007BHL/C3
fce904
WR
bit CRED
t
W(WR)
t
WR(TOC)