Product data
TDA8007BHL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9.1 — 18 June 2012 24 of 51
NXP Semiconductors
TDA8007BHL
Multiprotocol IC card interface
8.2.3 Card registers
When cards 1, 2 or 3 are selected, the following registers may be used for programming
some specific parameters.
8.2.3.1 Programmable Divider Register (PDR)
The programmable divider registers PDR1, PDR2 and PDR3 are used for counting the
cards clock cycles forming the ETU (see Figure 16
).
These are auto-reload 8-bit counters.
[1] Register value at reset: all bits are cleared after reset.
8.2.3.2 UART Configuration Registers (UCR) 2
The UART configuration registers 2 UCR12, UCR22 and UCR32, relate the UART
configuration.
[1] Register value at reset: all bits are cleared after reset.
Table 21. Register PDR1,PRDR2, PDR3 (address 02h; read and write)
7 6 5 4 3 2 1 0
PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
Fig 16. Block diagram
PROGRAMMABLE
DIVIDER
REGISTER
(1 to 256)
PRESCALER
(31 or 32)
MULTIPLEXER
f
CLK
2f
CLK
bit CKU
fce905
ETU
Table 22. Register UCR1,UCR2, UCR3 (address 03h; read and write)
[1]
7 6 5 4 3 2 1 0
UC27 DISTBE/RBF DISAUX PDWN SAN AUTOCONV CKU PSC
Table 23. Description of UCR2 bits
Bit Symbol Description
7 UC27 not used
6 DISTBE/RBF disable TBE/RBF interrupt bit. If bit DISTBE/RBF = 1, then reception
or transmission of a character will not generate an interrupt. This
feature is useful for increasing communication speed with the card; in
this case, a copy of the bit TBE/RBF within register MSR must be
polled (and not the original) in order not to lose priority interrupts which
can occur in register USR.
5 DISAUX disable auxiliary interrupt. If bit DISAUX in register UCR2 is set, then
a change on pin INTAUX will not generate an interrupt, but bit INTAUXL
will be set. Therefore, it is necessary to read register HSR before
bit DISAUX is to be reset to avoid an interrupt by bit INTAUXL. In order
to avoid an interrupt during a change of card, it is better to set
bit DISAUX in register UCR2 for all cards.










