Product data
TDA8007BHL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9.1 — 18 June 2012 26 of 51
NXP Semiconductors
TDA8007BHL
Multiprotocol IC card interface
[1] Example: 31;12 in the table means prescaler set to 31 and PDR set to 12
8.2.3.3 Guard Time Registers (GTR)
The guard time registers GTR1, GTR2 and GTR3 are used for storing the number of
guard ETU given by the card during ATR. In transmission mode, the UART will wait this
number of ETU before transmitting the character stored in register UTR.
When register GTRx = FF:
• In protocol T = 1
TDA8007BHL/C4 operates at 10.8 ETU
• In protocol T = 0
TDA8007BHL/C4 operates at 11.8 ETU.
[1] Register value at reset: all bits are cleared after reset.
8.2.3.4 UART Configuration Registers (UCR) 1
The UART configuration registers 1 (UCR11, UCR21 and UCR31) set the parameters of
the ISO UART.
[1] Register value at reset: all bits are cleared after reset.
Table 24. Baud rate selection using values F and D
[1]
PSC = 31: f
CLK
= 3.58 MHz; PSC = 32: f
CLK
= 4.92 MHz
D F
0 1 2 3 4 5 6 9 10 11 12 13
1 31;12
9600
31;12
9600
31;18
6400
31;24
4800
31;36
3200
31;48
2400
31;60
1920
32;16
9600
32;24
6400
32;32
4800
32;48
3200
32;64
2400
2 31;6
19200
31;6
19200
31;9
12800
31;12
9600
31;18
6400
31;24
4800
31;30
3840
32;8
19200
32;12
12800
32;16
9600
32;24
6400
32;32
4800
3 31;3
38400
31;3
38400
31;6
19200
31;9
12800
31;12
9600
31;15
7680
32;4
38400
32;6
25600
32;8
19200
32;12
12800
32;16
9600
4 31;3
38400
31;6
19200
32;2
76800
32;3
51300
32;4
38400
32;6
25600
32;8
19200
5 31;3
38400
32;1
153600
32;2
76800
32;3
51300
32;4
38400
6 32;1
153600
32;2
76800
8 31;1
115200
31;1
11
5 200
31;2
57600
31;3
38400
31;4
28800
31;5
23040
32;2
76800
32;4
38400
931;3
38400
Table 25. Register GTR1, GTR2, GTR3 (address 05H; read and write)
[1]
7 6 5 4 3 2 1 0
GT7 GT6 GT5 GT4 GT3 GT2 GT1 GT0
Table 26. Register UCR11, UCR21 and UCR31 (address 06H; read and write)
[1]
7 6 5 4 3 2 1 0
UC17 FIP FC PROT T/R LCT SS CONV