Front cover Draft Document for Review May 12, 2014 12:46 pm REDP-5102-00 IBM Power System S822 Technical Overview and Introduction Outstanding performance based on POWER8 processor technology 2U scale-out rack-mount server Improved RAS features Alexandre Bicas Caldeira Bartłomiej Grabowski Volker Haug Marc-Eric Kahle Cesar Diniz Maciel Monica Sanchez ibm.
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5102edno.fm Draft Document for Review May 12, 2014 12:46 pm Note: Before using this information and the product it supports, read the information in “Notices” on page vii. First Edition (April 2014) This edition applies to the IBM Power System S822 (8284-22A) server. © Copyright International Business Machines Corporation 2014. All rights reserved. Note to U.S. Government Users Restricted Rights -- Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp.
Draft Document for Review May 12, 2014 12:46 pm 5102TOC.fm Contents Notices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix Authors . . . . . . .
5102TOC.fm iv Draft Document for Review May 12, 2014 12:46 pm 2.2 Memory subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.1 Custom DIMM (CDIMM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.2 Memory placement rules. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.3 Memory bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Draft Document for Review May 12, 2014 12:46 pm 5102TOC.fm 3.4.5 PowerVM Live Partition Mobility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 3.4.6 Active Memory Sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 3.4.7 Active Memory Deduplication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 3.4.8 Operating system support for PowerVM . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Draft Document for Review May 12, 2014 12:46 pm 5102spec.fm Notices This information was developed for products and services offered in the U.S.A. IBM may not offer the products, services, or features discussed in this document in other countries. Consult your local IBM representative for information on the products and services currently available in your area.
5102spec.fm Draft Document for Review May 12, 2014 12:46 pm Trademarks IBM, the IBM logo, and ibm.com are trademarks or registered trademarks of International Business Machines Corporation in the United States, other countries, or both. These and other IBM trademarked terms are marked on their first occurrence in this information with the appropriate symbol (® or ™), indicating US registered or common law trademarks owned by IBM at the time this information was published.
Draft Document for Review May 12, 2014 12:46 pm 5102pref.fm Preface This IBM® Redpaper™ publication is a comprehensive guide covering the IBM Power System S822 (8284-22A) server that support IBM AIX®, and Linux operating systems. The objective of this paper is to introduce the major innovative Power S822 offerings and their relevant functions: The new IBM POWER8™ processor, available at frequencies of 3.42 GHz, and 3.
5102pref.fm Draft Document for Review May 12, 2014 12:46 pm PowerVM. He is an IBM Certified Systems Expert and a coauthor of several PowerVM Redbooks®. Volker Haug is an Open Group Certified IT Specialist within IBM Systems & Technology Group in Germany supporting Power Systems clients and Business Partners. He holds a diploma degree in Business Management from the University of Applied Studies in Stuttgart.
Draft Document for Review May 12, 2014 12:46 pm 5102pref.fm Now you can become a published author, too! Here’s an opportunity to spotlight your skills, grow your career, and become a published author—all at the same time! Join an ITSO residency project and help write a book in your area of expertise, while honing your experience using leading-edge technologies.
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Draft Document for Review May 12, 2014 12:46 pm 5102ch01.fm 1 Chapter 1. General description The IBM Power System S822 (8284-22A) server uses the latest POWER8 processor technology that is designed to deliver unprecedented performance, scalability, reliability, and manageability for demanding commercial workloads. This server brings together business transaction processing with infrastructure for social and mobile solutions in UNIX and Linux operating environments.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm The Power S822 server supports a maximum of 16 DDR3 CDIMM slots. Memory features supported are 16 GB, 32 GB, and 64 GB and run at 1600 MHz, allowing for a maximum system memory of 1024 GB. The high data transfer rates that are offered by the PCIe Gen3 slots can allow higher I/O performance or consolidation of the I/O demands on to fewer adapters running at higher rates.
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5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm Figure 1-2 shows the rear view of a Power S822 system. Figure 1-2 Rear view of a Power S822 system 1.4 System features The system chassis contains one or two processor modules. Each POWER8 processor module is either 6-core, or 10-core and has a 64-bit architecture, up to 512 KB of L2 cache per core, and up to 8 MB of L3 cache per core. 1.4.
Draft Document for Review May 12, 2014 12:46 pm 5102ch01.fm Note: One of the x8 PCIe slots on the Power S822 server is used for a PCIe2 LP 4-port 1 Gb Ethernet Adapter (#5260) One fewer PCIe slot is available with the dual IOA storage backplane feature EJ0U One DVD-RAM drive Integrated features: – – – – – – Service processor EnergyScale technology Hot-swap and redundant cooling USB 3.0 and 2.0 ports Two HMC ports One system port with RJ45 connector Redundant, 1400W hot-swap power supplies 1.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm Two 10-core, 3.42 GHz processors (#EPXD) requires that twenty processor activation codes be ordered. A maximum of twenty processor activation code features (#EPY1) is required. Table 1-3 summarizes the processor features that are available for the Power S822. Table 1-3 Processor features for the Power S822 Feature code Processor module description EPX1 6-core 3.89 GHz POWER8 processor card EPXD 10-core 3.42 GHz POWER8 processor card 1.4.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm requires higher levels of cooling, they automatically speed up fans to increase airflow across the PCIe adapters. 1.5 Disk and media features Three backplane options are available for the Power S822 and provide a great deal of flexibility and capability. One of the three options must be configured: 1. Storage Backplane with 12 SFF-3 bays and one DVD bay (#EJ0T) 2.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm Feature code Description Max OS support ESDB 300 GB 15 K RPM SAS SFF-3 Disk Drive (AIX/Linux) 12 AIX, Linux ES16 387 GB 1.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm Included in the feature EJ0T or EJ0U backplanes is a slimline media bay that can optionally house a SATA DVD-RAM (#5771). The DVD drive is run by the integrated SAS controllers, and a separate PCIe adapter is not required. The Power S822 supports the RDX USB External Docking Station for Removable Disk Cartridge (#EU04). The USB External Docking Station accommodates RDX removable disk cartridge of any capacity.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm 1.6.1 EXP24S SFF Gen2-bay drawer If you need more disks than are available with the internal disk bays, you can attach additional external disk subsystems such as the EXP24S SAS HDD/SSD expansion drawer (#5887). The EXP24S SFF Gen2-bay drawer is an expansion drawer supporting up to 24 2.5-inch hot-swap SFF SAS HDDs on IBM POWER6®, IBM POWER6+™, POWER7®, POWER7+™, or POWER8 servers in 2U of 19-inch rack space.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm (HDD) from the order. RAID 1 is also offered on the 7042-CR6, 7042-CR7, and 7042-CR8 as an MES upgrade option. At the time of writing, the latest version of HMC code is V8R8.1.0. This code level also includes the LPAR function support, which allows the HMC to manage more LPARs per processor core. A core can be partitioned in up to 20 LPARs (0.05 of a core). Several HMC models are supported to manage POWER8 processor-based systems.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm 1.8 System racks The Power S822 is designed to mount in the 36U 7014-T00 (#0551), the 42U 7014-T42 (#0553), or the IBM 42U Slim Rack (7965-94Y) rack. These racks are built to the 19-inch EIA 310D standard. Order information: The racking approach for the initial order must be either a 7014-T00, 7014-T42, or 7965-94Y.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm It is hinged on the left side so it can swing out of the way for easy access to the rack drawers when necessary. The Ruggedized Rack Feature also includes hardware for bolting the rack to a concrete floor or a similar surface, and bolt-in steel filler panels for any unoccupied spaces in the rack. Weights are as follows: – – – – T00 base empty rack: 244 kg (535 lb.) T00 full rack: 816 kg (1795 lb.) Maximum weight of drawers is 572 kg (1260 lb.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm The Front Door for a 2.0 m Rack (#6069) is made of steel, with a perforated flat front surface. The perforation pattern extends from the bottom to the top of the door to enhance ventilation and provide some visibility into the rack. This door is non acoustic and has a depth of about 25 mm (1 in). The 2.0 m Rack Acoustic Door (#6249) consists of a front and rear door to reduce noise by approximately 6 dB(A).
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm 1.8.4 Feature code 0551 rack The 1.8 Meter Rack (#0551) is a 36 EIA unit rack. The rack that is delivered as #0551 is the same rack that is delivered when you order the 7014-T00 rack. The included features might vary. Certain features that are delivered as part of the 7014-T00 must be ordered separately with the #0551. 1.8.5 Feature code 0553 rack The 2.0 Meter Rack (#0553) is a 42 EIA unit rack.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm Four PDUs can be mounted vertically in the back of the T00 and T42 racks. Figure 1-5 shows placement of the four vertically mounted PDUs. In the rear of the rack, two additional PDUs can be installed horizontally in the T00 rack and three in the T42 rack. The four vertical mounting locations will be filled first in the T00 and T42 racks. Mounting PDUs horizontally consumes 1U per PDU and reduces the space available for other racked components.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm Table 1-8 shows the available wall power cord options for the PDU and iPDU features, which must be ordered separately.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm 1.8.8 Rack-mounting rules Consider the following primary rules when you mount the system into a rack: The system is designed to be placed at any location in the rack. For rack stability, start filling a rack from the bottom. Any remaining space in the rack can be used to install other systems or peripherals, if the maximum permissible weight of the rack is not exceeded and the installation rules for these devices are followed.
Draft Document for Review May 12, 2014 12:46 pm 5102ch01.fm Feature code Description Status EU03 RDX 3.0 Removable Disk Docking Station Available Option descriptions are as follows: DAT160 160 GB Tape Drives: With SAS or USB interface options and a data transfer rate up to 12 MBps (assumes 2:1 compression), the DAT160 drive is read/write compatible with DAT160, and DDS4 data cartridges. LTO Ultrium 5 Half-High 1.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm Media used in LTO Ultrium 5 Half-High 1.5 TB tape drives are compatible with Half High LTO5 tape drives installed in the IBM TS2250 and TS2350 external tape drives, IBM LTO5 tape libraries, and half-high LTO5 tape drives installed internally in IBM POWER6, POWER6+, POWER7, POWER7+, and POWER8 servers. Figure 1-6 shows the 7226 Multi-Media Enclosure.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm connect up to 128 systems to a single KVM switch. It also supports server-side USB attachments. 1.8.10 OEM rack The system can be installed in a suitable OEM rack, provided that the rack conforms to the EIA-310-D standard for 19-inch racks. This standard is published by the Electrical Industries Alliance. For detailed information, see the IBM Power Systems Hardware Information Center at the following website: http://publib.boulder.ibm.
5102ch01.fm Draft Document for Review May 12, 2014 12:46 pm The vertical distance between the mounting holes must consist of sets of three holes spaced (from bottom to top) 15.9 mm (0.625 in.), 15.9 mm (0.625 in.), and 12.67 mm (0.5 in.) on-center, making each three-hole set of vertical hole spacing 44.45 mm (1.75 in.) apart on center. Rail-mounting holes must be 7.1 mm ± 0.1 mm (0.28 in. ± 0.004 in.) in diameter. Figure 1-8 shows the top front specification dimensions.
Draft Document for Review May 12, 2014 12:46 pm 5102ch02.fm 2 Chapter 2. Architecture and technical overview This chapter discusses the overall system architecture for the Power S822. The bandwidths that are provided throughout the section are theoretical maximums used for reference. The speeds shown are at an individual component level. Multiple components and application implementation are key to achieving the best performance.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm CDIMMs Figure 2-1 on page 24 shows the logical system diagram for the one socket Power S822.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm 2.1.1 POWER8 processor overview The POWER8 processor is manufactured using the IBM 22 nm Silicon-On-Insulator (SOI) technology. Each chip is 649 mm2 and contains 4.2 billion transistors. As shown in Figure 2-3, the chip contains twelve cores, two memory controllers, PCIe Gen3 I/O controllers and an interconnection system that connects all components within the chip.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm L4 cache within the memory buffer chip that reduces the memory latency for local access to memory behind the buffer chip; the operation of the L4 cache is transparent to applications running on the POWER8 processor. Up to 128 MB of L4 cache can be available for each POWER8 processor.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Table 2-1 summarizes the technology characteristics of the POWER8 processor.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Figure 2-8 on page 32 shows a picture of the POWER8 core, with some of the functional units highlighted. Figure 2-5 POWER8 processor core 2.1.3 Simultaneous multithreading POWER8 processor advancements in multi-core and multi-thread scaling are remarkable. A significant performance opportunity comes from parallelizing workloads to enable the full potential of the microprocessor, as well as the large memory bandwidth.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm 2.1.4 Memory access On the Power S822, each POWER8 module has two memory controllers, each connected to four memory channels. Each memory channel operates at 1600 MHz and connects to a DIMM. Each DIMM on a POWER8 system has a memory buffer that is responsible for many functions that were previously on the memory controller, such as scheduling logic and energy management. The memory buffer also has 16 MB of L4 cache.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm The innovation of using eDRAM on the POWER8 processor die is significant for several reasons: Latency improvement A six-to-one latency improvement occurs by moving the L3 cache on-chip compared to L3 accesses on an external (on-ceramic) ASIC. Bandwidth improvement A 2x bandwidth improvement occurs with on-chip interconnect. Frequency and bus sizes are increased to and from each core.
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5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm The Coherent Accelerator Processor Interface (CAPI) provides the ability to attach accelerators that have coherent shared memory access with the processors in the server and share full virtual address translation with these processors, using a standard PCIe Gen3 bus.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm functions using a hardware accelerator, with a simplified programming model and efficient communication with the processor and memory resources. 2.1.9 Power management and system performance The POWER8 processor has power saving and performance enhancing features that can be used to lower overall energy usage, while yielding higher performance when needed. The following modes can be enabled and modified in order to use these features.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm For more details, see chapter 2.11, “Energy management” on page 70. 2.1.10 Comparison of the POWER8, POWER7+ and POWER7 processors Table 2-3 on page 31 shows comparable characteristics between the generations of POWER8, POWER7+, and POWER7 processors.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm 2.2.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm 2.2.2 Memory placement rules The following memory options are orderable: 16 GB CDIMM, 1600 MHz DDR3 DRAM (#EM83) 32 GB CDIMM, 1600 MHz DDR3 DRAM (#EM84) 64 GB CDIMM, 1600 MHz DDR3 DRAM (#EM85) All memory must be ordered in pairs with a minimum of 32 GB memory required for a Power S822 system.
02ch02.fm Draft Document for Review May 12, 2014 12:46 pm Figure 2-10 Memory DIMM topology for the Power S822 In general, the best approach is to install memory evenly across all processors in the system. Balancing memory across the installed processors allows memory access in a consistent manner and typically results in the best possible performance for your configuration.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Next CDIMM pair is identical and installed at C25 and C27. Next CDIMM pair is identical and installed at C20 and C22. Next CDIMM pair is identical and installed at C28 and C30. 2.2.3 Memory bandwidth The POWER8 processor has exceptional cache, memory, and interconnect bandwidths. Table 2-4 shows the maximum bandwidth estimates for a single core on the Power S822 system.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm SMP interconnect: The POWER8 processor has four 2-byte lanes working at 6.4 GHz with one spare lane (total 3 active lanes). The bandwidth formula is calculated as follows: 3 lanes * 2 Bytes * 6.4 GHz = 38.4 GBps 2.3 System Bus This section provides more information related to the internal buses.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Table 2-6 I/O bandwidth I/O I/O bandwidth (maximum theoretical) Total I/O bandwidth Power S822 - one processor: 48 GBps simplex 96 GBps duplex Power S822 - two processors: 96 GBps simplex 192 GBps duplex PCIe Interconnect: Each POWER8 processor has 48 PCIe lanes running at 8 Gbps full-duplex. The bandwidth formulas is calculates as follows: 48 lanes * 2 processors * 8 Gbps * 2 = 192 GBps 2.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Slot Description Location code Card size Installed processors required to enable Slot 5 PCIe Gen3 x16 P1-C7 Low profile 1 Slot 6a PCIe Gen3 x8 P1-C9 Low profile 1 Slot 7b PCIe Gen3 x8 P1-C10 Low profile 1 Slot 8 PCIe Gen3 x8 P1-C11 Low profile 1 Slot 9 PCIe Gen3 x8 P1-C12 Low profile 1 a. Slot 6 (P1-C9) becomes obstructed by external SAS Ports and cannot be used by PCIe devices when #EJ0U is present.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Figure 2-13 Top view diagram for a two socket Power S822 with #EJ0T backplane option Figure 2-14 Top view diagram for a two socket Power S822 with #EJ0U backplane option At least one PCIe Ethernet adapter is required on the server and therefore one of the x8 PCIe slots is used for this required adapter, identified as the P1-C10 slot.
Draft Document for Review May 12, 2014 12:46 pm 5102ch02.fm Remember: Slot 7 (P1-C10) comes with PCIe2 LP 4-port 1 Gb Ethernet Adapter (#5260) installed. In case this slot is needed, the adapter must be moved to another suitable slot or replaced by another ethernet adapter. 2.4.2 System ports The system planar has one serial port that is called system port. When an HMC is connected to the server, the integrated system port of the server is rendered non-functional.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Adapters with smaller speeds are allowed in larger sized PCIe connectors but larger speed adapters are not compatible in smaller connector sizes (i.e. a x16 adapter cannot go in an x8 PCIe slot connector). All adapters support Enhanced Error Handling (EEH). PCIe adapters use a different type of slot than PCI adapters. If you attempt to force an adapter into the wrong type of slot, you might damage the adapter or the slot.
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5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Table 2-10 Available graphics accelerator adapters Feature code CCIN Description Maximum with one processor installed Maximum with two processors installed OS support 5269 5269 PCIe LP POWER GXT145 Graphics Accelerator 5 6 AIX, Linux 2.5.4 SAS adapters 2.5.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Table 2-12 shows available RAID and SSD SAS adapters for the Power S822. Table 2-12 Available SSD SAS adapters.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm 2.5.7 Fibre Channel over Ethernet Fibre Channel over Ethernet (FCoE) allows for the convergence of Fibre Channel and Ethernet traffic onto a single adapter and a converged fabric. Figure 2-16 compares existing Fibre Channel and network connections and FCoE connections.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm 2.5.8 InfiniBand Host Channel adapter The InfiniBand Architecture (IBA) is an industry-standard architecture for server I/O and inter-server communication. It was developed by the InfiniBand Trade Association (IBTA) to provide the levels of reliability, availability, performance, and scalability necessary for present and future server systems with levels significantly better than can be achieved using bus-oriented I/O structures.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Feature code CCIN Description Maximum with one processor installed Maximum with two processors installed OS support 5227 57D2 PCIe LP 4-Port Async EIA-232 adapter 5 8 AIX, Linux 5290 57D4 PCIe LP 2-Port Async EIA-232 adapter 5 8 AIX, Linux 2.5.10 Cryptographic coprocessor The cryptographic coprocessor card is not available to the Power S822 due to the adapter size. 2.5.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Other applications like Big Data can take advantage of this approach on compression once the compressions rates are higher than the ones achieved via software and the compression processes complete in a shorter time allowing for more data density, disk savings and faster data analysis. 2.6 Internal storage The internal storage on the Power S822 server depends on the DASD/Media backplane used.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm The 2.5-inch or small form factor (SFF) SAS bays can contain SAS drives (HDD or SSD) mounted on a Gen3 tray or carrier (also knows as SFF-3). SFF-1 or SFF-2 drives do not fit in an SFF-3 bay. All SFF-3 bays support concurrent maintenance or “hot plug” capability. Additionally, as an optional for the #EJ0U backplane, the feature #EJTL adds a 6-bay 1.8-inch SSD Cage behind the server bezel.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Figure 2-18 shows the internal connections when using #EJ0T. Figure 2-18 Internal topology overview for #EJ0T DASD backplane Chapter 2.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Figure 2-19 shows the internal topology overview for the #EJ0T backplane in a split backplane configuration (optional #EJ0V).
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Figure 2-20 shows the details of the internal topology overview for the #EJ0U DASD backplane with optional #EJTL 1.8-inch SSD Cage. Figure 2-20 Internal topology overview for the #EJ0U DASD backplane The external SAS ports provided by the #EJ0U support the attachment of a single EXP24S SFF Gen2-bay Drawer (#5887). Additional disk drawers can be attached by using supported PCIe SAS adapters. 2.6.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm slots. However cache power protection hardware covers one PCIe x8 slot (P1-C9). Patented Active/Active configurations with at least two arrays is supported. The write cache, responsible for increasing write performance by caching data before it is written do the physical disks, can have its data compression capabilities activated, providing up to 7.2 GB effective cache capacity.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm designed when working with large capacity disks, once it allows to sustain data parity during the rebuild process. RAID 10 is also known as a striped set of mirrored arrays. It is a combination of RAID 0 and RAID 1. A RAID 0 stripe set of the data is created across a two-disk array for performance benefits. A duplicate of the first stripe set is then mirrored on another two-disk array for fault tolerance.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Figure 2-21 Easy Tier Diagram The Easy Tier configuration is accomplished via standard operating system SAS adapter configuration utility. On Figure 2-22 and Figure 2-23 on page 59 there are two examples of tiered array creation for AIX.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Figure 2-23 Tiered Arrays (RAID 5T2, RAID 6T2 and RAID 10T2) example on AIX Raid Manager In order to support Easy Tier make sure the server is running at least the minimum versions described below: VIOS 2.2.3.3 with interim fix IV56366 or later AIX V7.1 TL3 SP3 or later AIX V6.1 TL9 SP3 or later RHEL 6.5 or later SLES 11 SP3 or later 2.6.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm The DVD drive and media device do not have an independent SAS adapter and so cannot be assigned to an LPAR independently of the HDD/SSDs in the system. 2.7 External I/O subsystems At the time of writing there are no PCIe I/O drawers such as the feature 5802, or 5877 supported on the Power S822.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm The EXP24S SFF Gen2-bay drawer can be ordered in one of three possible mode settings, configured by manufacturing (not customer set-up), of 1, 2, or 4 sets of disk bays. With IBM AIX and Linux, the EXP24S can be ordered with four sets of six bays (mode 4), two sets of 12 bays (mode 2), or one set of 24 bays (mode 1). There are six SAS connectors on the rear of the EXP24S drawer to which to SAS adapters or controllers are attached.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm 2.8.2 IBM System Storage The IBM System Storage Disk Systems products and offerings provide compelling storage solutions with superior value for all levels of business, from entry-level to high-end storage systems. For more information a bout the various offerings, see the following website: http://www.ibm.com/systems/storage/disk The following section highlights a few of the offerings.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Additionally, the DS8000® includes a range of features that automate performance optimization and application quality of service, and also provide the highest levels of reliability and system uptime. For more information, see the following website: http://www.ibm.com/systems/storage/disk/ds8000/index.html 2.
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5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Management LAN entx eth1 eth0 entx entx entx LPAR LPAR LPAR LPAR 1 2 ... n HMC1 Service Processor HMC2 HMC Power Systems server Figure 2-25 Network connections from HMC to service processor and LPARs By default, the service processor HMC ports are configured for dynamic IP address allocation. The HMC can be configured as a DHCP server, providing an IP address at the time that the managed server is powered on.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm To achieve HMC redundancy for a POWER8 processor-based server, the server must be connected to two HMCs. The HMCs: must be running the same level of HMC code. must use different subnets to connect to the service processor. must be able to communicate with the server’s partitions over a public network to allow for full synchronization and functionality.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm For details about the software available on IBM Power Systems, visit the IBM Power Systems Software™ website: http://www.ibm.com/systems/power/software/index.html 2.10.1 AIX operating system The following sections discuss the various levels of AIX operating system support. IBM periodically releases maintenance packages (service packs or technology levels) for the AIX operating system.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Note: The POWER8 compatibility mode is supported on AIX Version 7.1 with the 7100-03 Technology Level and Service Pack 3 and later. All other prior AIX 7.1 levels and AIX 6.1 can run in POWER6, POWER6+, and POWER7 compatibility mode. The Easy Tier functionality that comes with the 18 bay storage backplane (#EJ0P) requires: – AIX Version 7.1 with the 7100-03 Technology Level and Service Pack 3 with APAR IV56367 or later – AIX Version 6.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm Note: The Easy Tier functionality that comes with the eight bay storage backplane (#EJ0U) requires VIOS 2.2.3.3 with interim fix IV56366 or later IBM regularly updates the Virtual I/O Server code. To find information about the latest updates, visit the Fix Central website: http://www.ibm.com/support/fixcentral/ 2.10.4 Java There are unique considerations when running Java on POWER8 servers.
Draft Document for Review May 12, 2014 12:46 pm 5102ch02.fm Power saver mode is not supported during system startup, although it is a persistent condition that is sustained after the boot when the system starts executing instructions. Dynamic power saver mode Dynamic power saver mode varies processor frequency and voltage based on the utilization of the POWER8 processors.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm leakage current. Processor cores that are inactive in the system (such as capacity on demand, CoD, processor cores) are kept in sleep mode. Sleep mode saves about 80% power consumption in the processor core and its associated private L2 cache. Processor chip winkle mode The most amount of energy can be saved when a whole POWER8 chiplet enters the winkle mode. In this mode the entire chiplet is turned off including the L3 cache.
Draft Document for Review May 12, 2014 12:46 pm 5102ch02.fm On POWER8 processor-based systems, several EnergyScale technologies are embedded in the hardware and do not require an operating system or external management component. Fan control, environmental monitoring and system energy management are controlled by the On Chip Controller (OCC) and associated components. The power mode can also be set up without external tools, by using the ASMI interface, as shown in Figure 2-27.
5102ch02.fm Draft Document for Review May 12, 2014 12:46 pm 2.11.3 Energy consumption estimation Often, for Power Systems, various energy-related values are important: Maximum power consumption and power source loading values These values are important for site planning and are in the hardware information center: http://pic.dhe.ibm.com/infocenter/powersys/v3r1m5/index.jsp Search for type and model number and server specifications.
Draft Document for Review May 12, 2014 12:46 pm 5102ch03.fm 3 Chapter 3. Virtualization As you look for ways to maximize the return on your IT infrastructure investments, consolidating workloads becomes an attractive proposition. IBM Power Systems combined with PowerVM technology offer key capabilities that can help you consolidate and simplify your IT environment: Improve server utilization and sharing I/O resources to reduce total cost of ownership and make better use of IT assets.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm 3.1 POWER Hypervisor Combined with features in the POWER8 processors, the IBM POWER Hypervisor delivers functions that enable other system technologies, including logical partitioning technology, virtualized processors, IEEE VLAN-compatible virtual switch, virtual SCSI adapters, virtual Fibre Channel adapters, and virtual consoles.
Draft Document for Review May 12, 2014 12:46 pm 5102ch03.fm Virtual SCSI The POWER Hypervisor provides a virtual SCSI mechanism for the virtualization of storage devices. The storage virtualization is accomplished by using two paired adapters: A virtual SCSI server adapter A virtual SCSI client adapter A Virtual I/O Server partition can define virtual SCSI server adapters. Other partitions are client partitions. The Virtual I/O Server partition is a special logical partition, as described in 3.4.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm Virtual Fibre Channel A virtual Fibre Channel adapter is a virtual adapter that provides client logical partitions with a Fibre Channel connection to a storage area network through the Virtual I/O Server logical partition. The Virtual I/O Server logical partition provides the connection between the virtual Fibre Channel adapters on the Virtual I/O Server logical partition and the physical Fibre Channel adapters on the managed system.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm 3.2 POWER processor modes Although, strictly speaking, not a virtualization feature, the POWER modes are described here because they affect various virtualization features. On Power System servers, partitions can be configured to run in several modes, including the following modes: POWER6 compatibility mode This execution mode is compatible with Version 2.05 of the Power Instruction Set Architecture (ISA).
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5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm Table 3-2 lists the differences between processors modes.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm Active Memory Expansion uses the CPU resource of a partition to compress and decompress the memory contents of this same partition.The trade-off of memory capacity for processor cycles can be an excellent choice, but the degree of expansion varies based on how compressible the memory content is, and it also depends on having adequate spare CPU capacity available for this compression and decompression.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm The knee varies depending on how compressible the memory contents are. This example demonstrates the need for a case-by-case study of whether memory expansion can provide a positive return on investment. To help you do this study, a the amepat planning tool is introduced with AIX 6.1 Technology Level 4 SP2, allowing you to sample actual workloads and estimate how expandable the partition’s memory is and how much CPU resource is needed.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm After you select the value of the memory expansion factor that you want to achieve, you can use this value to configure the partition from the managed console. Figure 3-5 shows the activation of AME for each LPAR. Active Memory Expansion Modeled Statistics: ----------------------Modeled Expanded Memory Size : 8.00 GB Expansion Factor --------1.21 1.31 1.41 1.51 1.61 True Memory Modeled Size -------------6.75 GB 6.25 GB 5.75 GB 5.50 GB 5.
Draft Document for Review May 12, 2014 12:46 pm 5102ch03.fm From the HMC, you can view whether the Active Memory Expansion feature was activated for the server. Figure 3-6 shows the available server capabilities. Figure 3-6 Server capabilities listed from the HMC Moving an LPAR: If you want to move an LPAR that has Active Memory Expansion enabled to another physical server using Live Partition Mobility, the target server must have Active Memory Expansion activated with the software key).
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm 3.4.1 PowerVM editions The two editions of PowerVM are suited for various purposes: PowerVM Standard Edition This edition provides advanced virtualization functions and is intended for production deployments and server consolidation. PowerVM Enterprise Edition This edition is suitable for large server deployments such as multi-server deployments and cloud infrastructures.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm When defining a shared processor partition, several options must be defined: The minimum, desired, and maximum processing units Processing units are defined as processing power, or the fraction of time that the partition is dispatched on physical processors. Processing units define the capacity entitlement of the partition. The shared processor pool Select one from the list with the names of each configured shared processor pool.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm The number of virtual processors can be changed dynamically through a dynamic LPAR operation. Processing mode When you create a logical partition, you can assign entire processors for dedicated use, or you can assign partial processing units from a shared processor pool. This setting defines the processing mode of the logical partition. Figure 3-7 shows a diagram of the concepts described in this section. lp lp lp lp lp lp Lin ux 0.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm number is 20 times the number of processing units that are assigned to the partition). From the POWER Hypervisor perspective, virtual processors represent dispatching objects. The POWER Hypervisor dispatches virtual processors to physical processors according to the partition’s processing units entitlement. One processing unit represents one physical processor’s processing capacity.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm within the set of micropartitions are monitored by the POWER Hypervisor, and processor capacity is managed according to user-defined attributes. If the Power Systems server is under heavy load, each micropartition within a shared processor pool is guaranteed its processor entitlement plus any capacity that it might be allocated from the reserved pool capacity if the micropartition is uncapped.
Draft Document for Review May 12, 2014 12:46 pm 5102ch03.fm Because the Virtual I/O Server is an operating system-based appliance server, redundancy for physical devices attached to the Virtual I/O Server can be provided by using capabilities such as Multipath I/O and IEEE 802.3ad Link Aggregation. Installation of the Virtual I/O Server partition is performed from a special system backup DVD that is provided to clients who order any PowerVM edition.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm Figure 3-10 shows a configuration example of an SEA with one physical and two virtual Ethernet adapters. An SEA can include up to 16 virtual Ethernet adapters on the Virtual I/O Server that share the same physical access. VIOS Client 1 Client 2 Client 3 en0 (if.) en0 (if.) en0 (if.) ent0 (virt.) ent0 (virt.) ent0 (virt.) VLAN=1 VLAN=2 VLAN=2 Hypervisor PVID=2 ent2 (virt.) PVID=1 PVID=99 ent1 (virt.) VID=2 ent0 (phy.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm smaller systems. The virtual SCSI server (target) adapter is responsible for executing any SCSI commands that it receives. It is owned by the Virtual I/O Server partition. The virtual SCSI client adapter allows a client partition to access physical SCSI and SAN attached devices and LUNs that are assigned to the client partition. The provisioning of virtual disk resources is provided by the Virtual I/O Server.
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5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm Active Memory Deduplication allows the POWER Hypervisor to dynamically map identical partition memory pages to a single physical memory page within a shared memory pool. This way enables a better utilization of the Active Memory Sharing shared memory pool, increasing the system’s overall performance by avoiding paging. Deduplication can cause the hardware to incur fewer cache misses, which also leads to improved performance.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm Feature AIX 6.1 TL8 AIX 7.1 RHEL 6.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm Table 3-5 Minimum requirements for HMC V8R8.1.0 Function Minimum requirement HMC hardware 7042-C08 (deskside), 7042-CR5 (rack-mount) or later HMC memory 2 GB VIOS level 2.2.3.3 PowerVM simplification improves, and simplify the overall end-to-end management, deployment of virtualization on Power Systems Comprehensive effort to simplify PowerVM and VIOS management.
Draft Document for Review May 12, 2014 12:46 pm 5102ch03.fm Using these options, an user can deploy a system, select a system template, and click Deploy. After deploying a system, an user can choose a partition template from the library. Figure 3-11 PowerVM new level tasks Chapter 3.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm Performance function opens the Performance and Capacity Monitoring window as shown at the top of the screen in Figure 3-12.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm Figure 3-13, shows the bottom of the screen where performance and capacity data are presented in a graphical format. Figure 3-13 HMC performance monitoring CPU, Memory assignment (bottom of the screen) 3.5 System Planning Tool The IBM System Planning Tool (SPT) helps you design systems to be partitioned with logical partitions. You can also plan for and design non-partitioned systems by using the SPT.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm Integration between the System Planning Tool and both the Workload Estimator and IBM Performance Management allows you to create a system that is based on performance and capacity data from an existing system or that is based on new workloads that you specify. You can use the SPT before you order a system to determine what you must order to support your workload.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm 3.6 IBM PowerVC IBM Power Virtualization Center (IBM PowerVC) is designed to simplify the management of virtual resources in your Power Systems environment.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm IBM PowerVP helps reduce time and complexity to find and display performance bottlenecks through a simple dashboard that shows the performance health of the system. It can help simplify both prevention and troubleshooting and thus reduce the cost of performance management.
5102ch03.fm Draft Document for Review May 12, 2014 12:46 pm 3.8 VIOS 2.2.3 features Shared Storage Pools have been enhanced to improve flexibility, scalability, and resiliency. These improvements include mirroring of the storage pool, dynamic contraction of the storage pool, dynamic disk growth within the storage pool, and scaling improvements.
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Draft Document for Review May 12, 2014 12:46 pm 5102ch04.fm 4 Chapter 4. Continuous availability and manageability This chapter provides information about IBM reliability, availability, and serviceability (RAS) design and features. This set of technologies, implemented on IBM Power Systems servers, improves your architecture’s total cost of ownership (TCO) by reducing planned and unplanned down time.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm 4.1 Reliability Highly reliable systems are built with highly reliable components. On IBM POWER processor-based systems, this basic principle is expanded upon with a clear design for reliability architecture and methodology. A concentrated, systematic, architecture-based approach is designed to improve overall system reliability with each successive generation of system offerings. 4.1.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm automatically increase output to compensate for increased heat in the central electronic complex. 4.1.3 Redundant components and concurrent repair High-opportunity components (those that most affect system availability) are protected with redundancy and the ability to be repaired concurrently.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm This chapter describes IBM POWER8 processor-based systems technologies, focused on keeping a system running. For a specific set of functions that are focused on detecting errors before they become serious enough to stop computing work, see 4.3.1, “Detecting” on page 116. 4.2.1 Partition availability priority POWER8 systems can assign availability priorities to partitions.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm Intermittent errors are generally not repeatable, often because of cosmic rays or other sources of radiation. With the instruction retry function, when an error is encountered in the core, in caches and certain logic functions, the POWER8 processor first automatically retries the instruction. If the source of the error was truly transient, the instruction succeeds and the system can continue as before.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm 4.2.3 Memory protection A memory protection architecture that provides good error resilience for a relatively small L1 cache might be inadequate for protecting the much larger system main store. Therefore, a variety of protection methods are used in all POWER processor-based systems to avoid uncorrectable errors in memory.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm POWER8 memory subsystem The POWER8 processor chip contains two memory controllers with four DMI channels per memory controller. Each channel connects to a single DIMM, A processor chip can address eight CDIMM modules. The bus transferring data between the processor and the memory uses CRC error detection with a failed operation retry mechanism and the ability to dynamically retune bus parameters when a fault occurs.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm Depending on the configuration of the system, the HMC IBM Service Focal Point™, OS Service Focal Point, or service processor will receive a notification of the failed component, and will trigger a service call. 4.2.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm The L2 and L3 cache of the POWER8 processor-based systems can hold an unmodified copy of data in a portion of main memory. In this case, an uncorrectable error simply triggers a reload of a cache line from main memory.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm PCI Enhanced Error Handling (EEH) enabled adapters respond to a special data packet that is generated from the affected PCI slot hardware by calling system firmware, which will examine the affected bus, allow the device driver to reset it, and continue without a system reboot. For Linux, EEH support extends to the majority of frequently used devices, although various third-party PCI devices might not provide native EEH support.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm mechanisms, extending from processor cores and memory to power supplies and hard drives. Service processor The service processor is a microprocessor that is powered separately from the main instruction processing complex.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm (transient) errors in the processor core. Soft failures in the processor core are transient (intermittent) errors, often because of cosmic rays or other sources of radiation, and generally are not repeatable. When an error is encountered in the core, the POWER8 processor first automatically retries the instruction. If the source of the error was truly transient, the instruction succeeds and the system continues as before.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm Fault monitoring Built-in self-test (BIST) checks processor, cache, memory, and associated hardware that is required for proper booting of the operating system, when the system is powered on at the initial installation or after a hardware configuration change (for example, an upgrade).
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm isolation registers and from the associated logic. In firmware, this data consists of return codes, function calls, and so forth. FFDC check stations are carefully positioned within server logic and data paths to ensure that potential errors can be quickly identified and accurately tracked to a FRU. This proactive diagnostic strategy is a significant improvement over the classic, less accurate reboot and diagnose service approaches.
Draft Document for Review May 12, 2014 12:46 pm 5102ch04.fm the system is enabled to perform fault determination and isolation, whether or not the system processors are operational. Boot-time BISTs can also find faults undetectable by processor-based power-on self-test (POST) or diagnostics.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm which logs the error. I/O devices can also include specific exercisers that can be invoked by the diagnostic facilities for problem recreation if required by service procedures. 4.3.3 Reporting In the unlikely event that a system hardware or environmentally induced failure is diagnosed, IBM Power Systems servers report the error through various mechanisms. The analysis result is stored in system NVRAM.
Draft Document for Review May 12, 2014 12:46 pm 5102ch04.fm system diagnostic application for transmitting error information. It performs several other functions also, but these are not used for the service infrastructure.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm 4.3.4 Notifying After a Power Systems server detects, diagnoses, and reports an error to an appropriate aggregation point, it then takes steps to notify the client, and if necessary the IBM support organization.
Draft Document for Review May 12, 2014 12:46 pm 5102ch04.fm 4.3.5 Locating and servicing The final component of a comprehensive design for serviceability is the ability to effectively locate and replace parts requiring service. POWER processor-based systems use a combination of visual cues and guided maintenance procedures to ensure that the identified part is replaced correctly, every time.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm Service labels Service providers use these labels to assist in doing maintenance actions. Service labels are in various formats and positions, and are intended to transmit readily available information to the servicer during the repair process.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm Repair and verify system Repair and verify (R&V) is a system that is used to guide a service provider, step-by-step, through the process of repairing a system and verifying that the problem was repaired. The steps are customized in the appropriate sequence for the particular repair for the specific system being repaired.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm Service processor The service processor is a controller that is running its own operating system. It is a component of the service interface card. The service processor operating system has specific programs and device drivers for the service processor hardware. The host interface is a processor support interface that is connected to the POWER processor. The service processor is always working, regardless of the main system unit’s state.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm The ASMI is accessible through the management console. It is also accessible by using a web browser on a system that is connected directly to the service processor (in this case, either a standard Ethernet cable or a crossed cable) or through an Ethernet network. ASMI can also be accessed from an ASCII terminal, but this is only available while the system is in the platform powered-off mode.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm The operator panel The service processor provides an interface to the operator panel, which is used to display system status and diagnostic information. The operator panel can be accessed in two ways: By using the normal operational front view. By pulling it out to access the switches and viewing the LCD display.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm The service processor’s error log can be accessed on the ASMI menus. You can also access the system diagnostics from a Network Installation Management (NIM) server. Alternate method: When you order a Power System, a DVD-ROM or DVD-RAM might be optional. An alternate method for maintaining and servicing the system must be available if you do not order the DVD-ROM or DVD-RAM.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm service contract. During the initial machine warranty period the access key is already installed in the machine from manufacturing. The key will be valid for the regular warranty period plus some additional time. The POWER System firmware is being relocated from the public repository to the access control repository. I/O firmware will remain on the public repository but server must be entitled for installation.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm A scheduled maintenance action will cause a platform reboot, which provides an opportunity to also upgrade to a new firmware release. The updating and upgrading of system firmware depends on several factors, such as whether the system is stand-alone or managed by a management console, the current firmware installed, and what operating systems are running on the system.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm Each IBM Power Systems server has the following levels of server firmware and power subsystem firmware: Installed level This level of server firmware or power subsystem firmware is installed and will be installed into memory after the managed system is powered off and then powered on. It is installed on the temporary side of system firmware.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm PPNNSSS_FFF_DDD NN Platform and class SSS Release indicator FFF Current fix pack DDD Last disruptive fix pack SV Low end The following example uses the convention: 01SV810_030_030 = POWER8 Entry Systems Firmware for 8284-22A An installation is disruptive if the following statements are true: The release levels (SSS) of currently installed and new firmware differ.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm Electronic Service Agent The Electronic Service Agent is software that resides on your server. It monitors events and transmits system inventory information to IBM on a periodic, client-defined timetable. The Electronic Service Agent automatically reports hardware problems to IBM. Early knowledge about potential problems enables IBM to deliver proactive service that can result in higher system availability and performance.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm For more information about how to use the power of IBM Electronic Services, contact your IBM Systems Services Representative, or visit the following website: http://www.ibm.com/support/electronic Service Event Manager Allows the user to decide which of the Serviceable Events will be called home with the Electronic Service Agent or not. It is possible to lock certain Events.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm The next window allows the user to configure the HMC that is used to manage the Serviceable Events and proceed with further configuration steps. See Figure 4-4 for the initial screen: Figure 4-4 Initial SEM screen Detailed description of the different configurable options: Registered Management Consoles Total consoles lists the number of consoles registered. Select Manage Consoles to mange the list of registered management consoles.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm View Files... Display the files associated with this event. Approve Call Home Approve the call home of this event. This option is only available if the event has not been approved already. The Help / Learn more function can be used to get more details in the other available screens for the Serviceable Event Manager. 4.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm – to prevent outages the L4 Cache has the capability to perform a bank delete so that faulty portions of the DRAM can be removed from the use 4.5.1 POWER7+ RAS features Besides the improvements in the POWER8 Systems this section lists the existing POWER7+ RAS features that are in common with the new POWER8: Power-On Reset Engine (PORE) Enables a processor to be re-initialized while the system remains running.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm 4.7 Operating system support for RAS features Table 4-2 gives an overview of features for continuous availability that are supported by the various operating systems running on power systems. In the table, the word “Most” means most functions. Table 4-2 Operating system support for RAS features RAS feature AIX 6.1 AIX 7.1 RHEL 6.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm RAS feature AIX 6.1 AIX 7.1 RHEL 6.
5102ch04.fm Draft Document for Review May 12, 2014 12:46 pm RAS feature AIX 6.1 AIX 7.1 RHEL 6.
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Draft Document for Review May 12, 2014 12:46 pm 5102bibl.fm Related publications The publications listed in this section are considered particularly suitable for a more detailed discussion of the topics covered in this paper. IBM Redbooks The following IBM Redbooks publications provide additional information about the topic in this document. Note that some publications referenced in this list might be available in softcopy only.
5102bibl.fm Draft Document for Review May 12, 2014 12:46 pm Other publications These publications are also relevant as further information sources: IBM Power Facts and Features - IBM Power Systems, IBM PureFlex and Power Blades http://www.ibm.com/systems/power/hardware/reports/factsfeatures.html IBM Power S812L server specifications http://www.ibm.com/systems/power/hardware/s812l-s822l/specs.html IBM Power S822L server specifications http://www.ibm.com/systems/power/hardware/s812l-s822l/specs.
5102bibl.fm Draft Document for Review May 12, 2014 12:46 pm Online resources These websites are also relevant as further information sources: IBM Knowledge Center http://www.ibm.com/support/knowledgecenter/ IBM Power Systems Hardware Information Center http://pic.dhe.ibm.com/infocenter/powersys/v3r1m5/index.jsp IBM System Planning Tool website http://www.ibm.com/systems/support/tools/systemplanningtool/ IBM Fix Central website http://www.ibm.
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Draft Document for Review May 12, 2014 12:46 pm Back cover ® IBM Power System S822 Technical Overview and Introduction Redpaper ™ Outstanding performance based on POWER8 processor technology This IBM® Redpaper™ publication is a comprehensive guide covering the IBM Power System S822 (8284-22A) server that support IBM AIX®, and Linux operating systems.
