User's Manual
Table Of Contents
- Contents
- Table Index
- Figure Index
- 0. Revision history
- 1. Introduction
- 2. Product concept
- 3. Application interface
- 3.1. Pin
- 3.2. Operating modes
- 3.3. Power supply
- 3.4. Power on and down scenarios
- 3.5. Charging interface
- 3.6. Power saving
- 3.7. Summary of state transitions
- 3.8. RTC backup
- 3.9. Serial interfaces
- 3.10. Audio interfaces
- 3.11. SIM card interface
- 3.12. SD card interface
- 3.13. PCM interface
- 3.14. ADC
- 3.15. Behaviors of the RI
- 3.16. Network status indication
- 3.17. Operating status indication
- 4. Antenna interface
- 5. Electrical, reliability and radio characteristics
- 6. Mechanical dimensions
- 7. Storage and manufacturing
- Appendix A: GPRS coding schemes
- Appendix B: GPRS multi-slot classes
M80 Hardware Design
M80_HD_V1.2 - 49 -
Module (DCE)
Host (DTE)
Controller
TXD
RXD
GND
TXD_AUX
RXD_AUX
GND
Figure 23: Reference design for Auxiliary UART port
3.9.4. Level match
The reference design of 3.3V level match is shown as below. If the host is a 3V system, please
change the 5.6K resistor to 15K.
MCU/ARM
TXD
RXD
1K
TXD
RXD
RTS
CTS
DTR
RI
RTS
CTS
GPIO
EINT
Voltage Level: 3.3V
GND
VBAT
GPIO
DCD
MODULE
1K
1K
1K
1K
5K6
5K6
5K6
1K
1K
Figure 24: Level match design for 3.3V system