User's Manual
Table Of Contents
- Contents
- Table Index
- Figure Index
- 0. Revision history
- 1. Introduction
- 2. Product concept
- 3. Application interface
- 3.1. Pin
- 3.2. Operating modes
- 3.3. Power supply
- 3.4. Power on and down scenarios
- 3.5. Charging interface
- 3.6. Power saving
- 3.7. Summary of state transitions
- 3.8. RTC backup
- 3.9. Serial interfaces
- 3.10. Audio interfaces
- 3.11. SIM card interface
- 3.12. SD card interface
- 3.13. PCM interface
- 3.14. ADC
- 3.15. Behaviors of the RI
- 3.16. Network status indication
- 3.17. Operating status indication
- 4. Antenna interface
- 5. Electrical, reliability and radio characteristics
- 6. Mechanical dimensions
- 7. Storage and manufacturing
- Appendix A: GPRS coding schemes
- Appendix B: GPRS multi-slot classes
M80 Hardware Design
M80_HD_V1.2 - 65 -
3.13.2. Timing
The sample rate of the PCM interface is 8 KHz and the clock source is 256 KHz, so every frame
contains 32 bits data, since M80 supports 13bit line code PCM format, the left 19 bits is invalid.
M80 support short and long synchronization format. The following diagram shows the timing of
short and long synchronization format. The synchronization length in long synchronization format
can be programmed by software from one bit to eight bits.
13 12 11 10 9 8 7 6 5 4 3 2 1
13 12 11 10 9 8 7 6 5 4 3 2 1
PCM_CLK
PCM_SYNC
PCM_OUT
PCM_IN
MSB
MSB
Figure 38: Long synchronization diagram
PCM_CLK
PCM_SYNC
PCM_OUT
PCM_IN
13 12 11 10 9 8 7 6 5 4 3 2 1
13 12 11 10 9 8 7 6 5 4 3 2 1
MSB
MSB
Figure 39: Short synchronization diagram