User's Manual

LTE Module

EC25-A User Manual

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MCU/ARM

/TXD

/RXD

VDD_EXT

10K

VCC_MCU

4.7K

10K

VDD_EXT

TXD

RXD

RTS

CTS

DTR

/RTS

/CTS

GND

GPIO DCD

Module

GPIO

EINT

VDD_EXT

4.7K

GND

1nF

Figure 21: Reference Circuit with Transistor Circuit

Transistor circuit solution is not suitable for high baud rates exceeding 460Kbps.

3.12. PCM and I2C Interface

EC25 provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the

following modes:

 Primary mode (short sync, works as both master and slave)

 Auxiliary mode (long sync, works as master only)

In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising

edge; the PCM_SYNC falling edge represents the MSB. In this mode, PCM_CLK supports 128, 256, 512,

1024 and 2048kHz for different speech codecs.

In auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising

edge; while the PCM_SYNC rising edge represents the MSB. In this mode, PCM interface operates with a

128kHz PCM_CLK and an 8kHz, 50% duty cycle PCM_SYNC only.

EC25 supports 8-bit A-law and μ-law, and also 16-bit linear data formats. The following figures show the

primary mode’s timing relationship with 8kHz PCM_SYNC and 2048kHz PCM_CLK, as well as auxiliary

mode’s timing relationship with 8kHz PCM_SYNC and 128kHz PCM_CLK.

NOTE