BG96-NA Hardware Design LTE Module Series Rev. BG96-NA_Hardware_Design_V1.0 Date: 2017-04-28 www.quectel.
LTE Module Series BG96-NA Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. Office 501, Building 13, No.99, Tianzhou Road, Shanghai, China, 200233 Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://www.quectel.com/support/salesupport.
LTE Module Series BG96-NA Hardware Design About the Document History Revision Date Author Description 1.
LTE Module Series BG96-NA Hardware Design Contents About the Document ................................................................................................................................... 2 Contents ....................................................................................................................................................... 3 Table Index ....................................................................................................................................
LTE Module Series BG96-NA Hardware Design 3.12. 3.13. 3.14. 3.15. 3.16. I2C Interfaces .......................................................................................................................... 38 Network Status Indication ........................................................................................................ 39 STATUS ................................................................................................................................... 40 Behavior of the RI ..
LTE Module Series BG96-NA Hardware Design Table Index TABLE 1: FREQUENCY BANDS OF BG96-NA MODULE .................................................................................. 9 TABLE 2: KEY FEATURES OF BG96-NA .......................................................................................................... 11 TABLE 3: I/O PARAMETERS DEFINITION ....................................................................................................... 17 TABLE 4: PIN DESCRIPTION ...................
LTE Module Series BG96-NA Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 13 FIGURE 2: PIN ASSIGNMENT (TOP VIEW)..................................................................................................... 16 FIGURE 3: SLEEP MODE APPLICATION VIA UART .......................................................................................
LTE Module Series BG96-NA Hardware Design 1 Introduction This document defines the BG96-NA module and describes its air interface and hardware interface which are connected with your application. This document can help you quickly understand module interface specifications, electrical and mechanical details, etc. Associated with application note and user guide, you can use BG96-NA module to design and set up mobile applications easily.
LTE Module Series BG96-NA Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of the operation, such as usage, service or repair of any cellular terminal or mobile incorporating BG96-NA module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product.
LTE Module Series BG96-NA Hardware Design 2 Product Concept 2.1. General Description BG96-NA module is an embedded IoT (LTE Cat M1) wireless communication module without receive diversity. It supports Half-duplex LTE-FDD wireless communication, which provides data connectivity on LTE-FDD networks. The following table shows the frequency bands of BG96-NA module.
LTE Module Series BG96-NA Hardware Design And the following conditions must be met: 1. This Modular Approval is limited to OEM installation for mobile and fixed applications only. The antenna installation and operating configurations of this transmitter, including any applicable source-based time- averaging duty factor, antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of 2.1091. 2.
LTE Module Series BG96-NA Hardware Design unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. The user’s manual or instruction manual for an intentional or unintentional radiator shall caution the user that changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment.
LTE Module Series BG96-NA Hardware Design SMS cell broadcast SMS storage: ME by default (U)SIM Interface USB Interface UART Interface Support (U)SIM card: 1.8V, 3.0V Compliant with USB 2.0 specification (slave only); the data transfer rate can reach up to 480Mbps Used for AT command communication, data transmission, GNSS NMEA output, software debugging and firmware upgrade Support USB drivers for Windows XP, Windows Vista, Windows 7, Windows 8/8.1, Window 10, Linux 2.6 or later, Android 4.0/4.2/4.4/5.
LTE Module Series BG96-NA Hardware Design 2.4. Functional Diagram The following figure shows a block diagram of BG96-NA and illustrates the major functional parts. Power management Baseband DDR+NAND flash Radio frequency Peripheral interfaces ANT_MAIN ANT_GNSS Switch Filter Tx LNA VBAT_RF PA PRx GNSS NAND DDR2 SDRAM Transceiver IQ VBAT_BB PMIC Control Control PWRKEY Baseband RESET_N STATUS 19.
LTE Module Series BG96-NA Hardware Design 2.5. Evaluation Board In order to help customers develop applications conveniently with BG96-NA, Quectel supplies the evaluation board (EVB), USB data cable, earphone, antenna and other peripherals to control or test the module.
LTE Module Series BG96-NA Hardware Design 3 Application Interfaces 3.1. General Description BG96-NA is equipped with 62-pin 1.1mm pitch SMT pads plus 40-pin ground pads and reserved pads that can be connected to customers’ cellular application platform.
LTE Module Series BG96-NA Hardware Design 3.2. Pin Assignment VBAT_RF RESERVED GND RESERVED VBAT_RF GND GND GND GND ANT_MAIN RESERVED GND 50 57 51 58 52 59 53 60 54 61 56 62 55 GND The following figure shows the pin assignment of the BG96-NA module.
LTE Module Series BG96-NA Hardware Design 3.3. Pin Description The following tables show the pin definition and description of BG96-NA. Table 3: I/O Parameters Definition Type Description IO Bidirectional DI Digital input DO Digital output PI Power input PO Power output AI Analog input AO Analog output OD Open drain Table 4: Pin Description Power Supply Pin Name Pin No. I/O Description DC Characteristics VBAT_BB 32, 33 PI Power supply for module baseband part. Vmax=4.3V Vmin=3.
LTE Module Series BG96-NA Hardware Design Turn on/off Pin Name PWRKEY RESET_N Description DC Characteristics Comment DI Turn on/off the module VIHmax=2.1V VIHmin=1.3V VILmax=0.5V The output voltage is 0.8V because of the diode drop in the Qualcomm chipset. DI Reset the module VIHmax=2.1V VIHmin=1.3V VILmax=0.5V If unused, keep this pin open. I/O Description DC Characteristics Comment OD Indicate the module’s operating status. VOHmin=1.35V VOLmax=0.45V 1.8V power domain.
LTE Module Series BG96-NA Hardware Design For 1.8V (U)SIM: Vmax=1.9V Vmin=1.7V USIM_VDD USIM_DATA USIM_CLK USIM_RST 43 45 46 44 PO IO DO DO Power supply for (U)SIM card Data signal of (U)SIM card Clock signal of (U)SIM card Reset signal of (U)SIM card For 3.0V (U)SIM: Vmax=3.05V Vmin=2.7V IOmax=50mA Either 1.8V or 3.0V is supported by the module automatically. For 1.8V (U)SIM: VILmax=0.6V VIHmin=1.2V VOLmax=0.45V VOHmin=1.35V For 3.0V (U)SIM: VILmax=1.0V VIHmin=1.95V VOLmax=0.
LTE Module Series BG96-NA Hardware Design DCD 38 DO Data carrier detection VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. RTS 37 DI Request to send VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V CTS 36 DO Clear to send VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. TXD 35 DO Transmit data VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. Receive data VILmin=-0.3V VILmax=0.
LTE Module Series BG96-NA Hardware Design Pin Name Pin No. I/O Description DC Characteristics ANT_MAIN 60 IO Main antenna interface 50Ω impedance ANT_GNSS 49 AI GNSS antenna interface 50Ω impedance If unused, keep it open. Pin No. I/O Description DC Characteristics Comment DO Power saving mode indicator VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep it open. 75 DI Force the module to boot from USB port. VILmin=-0.3V VILmax=0.6V VIHmin=1.
LTE Module Series BG96-NA Hardware Design NOTES 1. Keep all RESERVED pins and unused pins unconnected. 2. “*” means under development. 3.4. Operating Modes The table below briefly summarizes the various operating modes referred in the following chapters. Table 5: Overview of Operating Modes Mode Normal Operation Details Idle Software is active. The module has registered on network, and it is ready to send and receive data. Data Network connection is ongoing.
LTE Module Series BG96-NA Hardware Design 3.5. Power Saving 3.5.1. Sleep Mode BG96-NA is able to reduce its current consumption to a minimum value during the sleep mode. The following section describes power saving procedure of BG96-NA module. 3.5.1.1. UART Application If the host communicates with module via UART interface, the following preconditions can let the module enter into sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Drive DTR to high level.
LTE Module Series BG96-NA Hardware Design 3.5.1.2. USB Application with USB Remote Wakeup Function If the host supports USB suspend/resume and remote wakeup functions, the following three preconditions must be met to let the module enter into sleep mode. Execute AT+QSCLK=1 command to enable the sleep mode. Ensure the DTR is held in high level or keep it open. The host’s USB bus, which is connected with the module’s USB interface, enters into suspended state.
LTE Module Series BG96-NA Hardware Design The following figure shows the connection between the module and the host. Module Host VDD USB_VBUS USB_DP USB_DP USB_DM USB_DM AP_READY GPIO RI EINT GND GND Figure 5: Sleep Mode Application with RI Sending data to BG96-NA through USB will wake up the module. When BG96-NA has URC to report, RI signal will wake up the host. 3.5.1.4.
LTE Module Series BG96-NA Hardware Design Switching on the power switch to supply power to USB_VBUS will wake up the module. NOTE 1. 2. Please pay attention to the level match shown in dotted line between the module and the host. Refer to document [1] for more details about BG96-NA power management application. “*” means under development. 3.5.2. Airplane Mode When the module enters into airplane mode, the RF function does not work, and all AT commands correlative with RF function will be inaccessible.
LTE Module Series BG96-NA Hardware Design Table 6: VBAT and GND Pins Pin Name Pin No. Description Min. Typ. Max. Unit VBAT_RF 52, 53 Power supply for module RF part. 3.3 3.8 4.3 V VBAT_BB 32, 33 Power supply for module baseband part. 3.3 3.8 4.3 V GND 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 67~74, 79~82, 89~91, 100~102 Ground - - - - 3.6.2. Decrease Voltage Drop The power supply range of the module is from 3.3V to 4.3V.
LTE Module Series BG96-NA Hardware Design 3.6.3. Monitor the Power Supply AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, please refer to document [2]. 3.7. Turn on and off Scenarios 3.7.1. Turn on Module Using the PWRKEY The following table shows the pin definition of PWRKEY. Table 7: PWRKEY Pin Description Pin Name PWRKEY Pin No. 15 Description DC Characteristics Comment Turn on/off the module VIHmax=2.1V VIHmin=1.3V VILmax=0.5V The output voltage is 0.
LTE Module Series BG96-NA Hardware Design S1 PWRKEY TVS Close to S1 Figure 9: Turn on the Module Using Keystroke The turn on scenario is illustrated in the following figure. NOTE VBAT ≥100ms VIH≥1.3V PWRKEY VIL≤0.5V RESET_N TBD STATUS (OD) TBD UART Inactive Active TBD USB Inactive Active Figure 10: Timing of Turning on Module NOTE Make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is no less than 30ms.
LTE Module Series BG96-NA Hardware Design 3.7.2. Turn off Module The following procedures can be used to turn off the module: Normal power down procedure: Turn off the module using the PWRKEY pin. Normal power down procedure: Turn off the module using AT+QPOWD command. 3.7.2.1. Turn off Module Using the PWRKEY Pin Driving the PWRKEY pin to a low level voltage (the specific time is TBD), the module will execute power-down procedure after the PWRKEY is released.
LTE Module Series BG96-NA Hardware Design Table 8: RESET_N Pin Description Pin Name RESET_N Pin No. 17 Description DC Characteristics Reset the module VIHmax=2.1V VIHmin=1.3V VILmax=0.5V Comment The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button can be used to control the RESET_N. RESET_N TBD 4.
LTE Module Series BG96-NA Hardware Design The reset scenario is illustrated in the following figure. VBAT ≤460ms ≥150ms RESET_N VIH≥1.3V VIL≤0.5V Module Status Running Resetting Restart Figure 14: Timing of Resetting Module NOTES 1. 2. Use RESET_N only when turning off the module by AT+QPOWD command and PWRKEY pin failed. Ensure that there is no large capacitance on PWRKEY and RESET_N pins. 3.9.
LTE Module Series BG96-NA Hardware Design BG96-NA supports (U)SIM card hot-plug via the USIM_PRESENCE pins. The function supports low level and high level detections and is disabled by default. Please refer to document [2] about AT+QSIMDET command for details. The following figure shows a reference design for (U)SIM card interface with an 8-pin (U)SIM card connector.
LTE Module Series BG96-NA Hardware Design Figure 16: Reference Circuit of (U)SIM Card Interface with a 6-Pin (U)SIM Card Connector In order to enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in (U)SIM circuit design: Keep layout of (U)SIM card as close to the module as possible. Keep the trace length as less than 200mm as possible. Keep (U)SIM card signals away from RF and VBAT traces.
LTE Module Series BG96-NA Hardware Design figure shows a reference circuit of USB interface. Test Points Minimize these stubs Module VDD R3 NM_0R R4 NM_0R MCU ESD Array USB_VBUS USB_DM USB_DP R1 0R R2 0R Close to Module GND USB_DM USB_DP GND Figure 17: Reference Circuit of USB Application In order to meet ensure the integrity of USB data line signal, components R1, R2, R3 and R4 must be placed close to the module, and also these resistors should be placed close to each other.
LTE Module Series BG96-NA Hardware Design 3.11. UART Interfaces The module provides two UART interfaces: the UART1 interface and UART2 interface. The following are their features. The UART1 interface supports 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 and 3000000bps baud rates, and the default is 115200bps. This interface is used for data transmission and AT command communication. The UART2 interface supports 115200bps baud rate. It is used for module debugging and log output.
LTE Module Series BG96-NA Hardware Design The logic levels are described in the following table. Table 13: Logic Levels of Digital I/O Parameter Min. Max. Unit VIL -0.3 0.6 V VIH 1.2 2.0 V VOL 0 0.45 V VOH 1.35 1.8 V The module provides 1.8V UART interface. A level translator should be used if your application is equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instrument is recommended. The following figure shows a reference design.
LTE Module Series BG96-NA Hardware Design VDD_EXT MCU/ARM 4.7K VDD_EXT 1nF Module 10K RXD TXD RXD TXD 10K VCC_MCU 1nF 4.7K RTS CTS GPIO EINT GPIO GND VDD_EXT RTS CTS DTR RI DCD GND Figure 19: Reference Circuit with Transistor Circuit NOTE Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps. 3.12. I2C Interfaces BG96-NA provides one I2C interface.
LTE Module Series BG96-NA Hardware Design 3.13. Network Status Indication BG96-NA provides one network indication pin: NETLIGHT. The pin is used to drive a network status indication LED. The following tables describe the pin definition and logic level changes of NETLIGHT in different network status. Table 15: Pin Definition of Network Status Indicator Pin Name Pin No. I/O Description Comment NETLIGHT 21 DO Indicate the module’s network activity status. 1.
LTE Module Series BG96-NA Hardware Design 3.14. STATUS The STATUS pin is an open drain output for indicating the module’s operation status. It can be connected to a GPIO of DTE with a pulled up resistor, or an LED indication circuit as below. When the module is turned on normally, the STATUS will present a low state. Otherwise, the STATUS will present high-impedance state. Table 17: Pin Definition of STATUS Pin Name STATUS Pin No.
LTE Module Series BG96-NA Hardware Design The default behaviors of RI are shown as below. Table 18: Default Behavior of RI State Response Idle RI keeps at high level. URC RI outputs 120ms low pulse when new URC returns. The RI behavior can be changed by AT+QCFG=“urc/ri/ring” command. Please refer to document [2] for details. 3.16. USB_BOOT Interface BG96-NA provides a USB_BOOT pin.
LTE Module Series BG96-NA Hardware Design 4 GNSS Receiver 4.1. General Description BG96-NA includes a fully integrated global navigation satellite system solution that supports Gen8C-Lite of Qualcomm (GPS, GLONASS, BeiDou/Compass, Galileo and QZSS). BG96-NA supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1Hz data update rate via USB interface by default. By default, BG96-NA GNSS engine is switched off. It has to be switched on via AT command.
LTE Module Series BG96-NA Hardware Design Accuracy (GNSS) @open sky XTRA* enabled TBD s CEP-50 Autonomous @open sky TBD m NOTES 1. 2. 3. 4. Tracking sensitivity: the lowest GNSS signal value at the antenna port on which the module can keep on positioning for 3 minutes. Reacquisition sensitivity: the lowest GNSS signal value at the antenna port on which the module can fix position again within 3 minutes after loss of lock.
LTE Module Series BG96-NA Hardware Design 5 Antenna Interfaces BG96-NA antenna interfaces include a main antenna interface and a GNSS antenna interface. The antenna interfaces have an impedance of 50 ohm. 5.1. Main Antenna Interface 5.1.1. Pin Definition The pin definition of main antenna interface is shown below. Table 21: Pin Definition of the RF Antenna Interface Pin Name Pin No. I/O Description Comment ANT_MAIN 60 IO Main antenna interface 50 ohm impedance 5.1.2.
LTE Module Series BG96-NA Hardware Design Main antenna Module R1 0R ANT_MAIN C1 C2 NM NM Figure 23: Reference Circuit of RF Antenna Interface NOTE Place the π-type matching components (R1, C1, C2) as close to the antenna as possible. 5.1.4. Reference Design of RF Layout For user’s PCB, the characteristic impedance of all RF traces should be controlled as 50 ohm.
LTE Module Series BG96-NA Hardware Design Figure 25: Coplanar Waveguide Line Design on a 2-layer PCB Figure 26: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 27: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 4 as Reference Ground) BG96-NA_Hardware_Design Confidential / Released 46 / 64
LTE Module Series BG96-NA Hardware Design In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design: Use impedance simulation tool to control the characteristic impedance of RF traces as 50 ohm. The GND pins adjacent to RF pins should not be hot welded, and should be fully connected to ground.
LTE Module Series BG96-NA Hardware Design A reference design of GNSS antenna interface is shown as below. GNSS Antenna Module 100pF ANT_GNSS NM NM Figure 28: Reference Circuit of GNSS Antenna Interface NOTES 1. 2. An external LDO can be selected to supply power according to the active antenna requirement. If the module is designed with a passive antenna, then the VDD circuit is not needed. 5.3. Antenna Installation 5.3.1.
LTE Module Series BG96-NA Hardware Design 5.3.2. Recommended RF Connector for Antenna Installation If RF connector is used for antenna connection, it is recommended to use the UF.L-R-SMT connector provided by HIROSE. Figure 29: Dimensions of the UF.L-R-SMT Connector (Unit: mm) U.FL-LP serial connectors listed in the following figure can be used to match the UF.L-R-SMT. Figure 30: Mechanicals of UF.
LTE Module Series BG96-NA Hardware Design The following figure describes the space factor of mated connector. Figure 31: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com.
LTE Module Series BG96-NA Hardware Design 6 Electrical, Reliability and Radio Characteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 26: Absolute Maximum Ratings Parameter Min. Max. Unit VBAT_RF/VBAT_BB -0.3 4.7 V USB_VBUS -0.3 5.5 V Peak Current of VBAT_BB 0 TBD A Peak Current of VBAT_RF 0 TBD A Voltage at Digital Pins -0.3 2.3 V 6.2.
LTE Module Series BG96-NA Hardware Design Parameter Description Conditions IVBAT Peak supply current (during transmission slot) USB_VBUS USB detection Min. 3.0 Typ. Max. Unit TBD TBD A 5.0 5.25 V 6.3. Operating Temperature The operating temperature is listed in the following table. Table 28: Operating Temperature Parameter Min. Typ. Max. Unit Operation Temperature Range1) -35 +25 +75 ºC Extended Temperature Range2) -40 +85 ºC NOTES 1. 2.
LTE Module Series BG96-NA Hardware Design 6.5. RF Output Power The following table shows the RF output power of BG96-NA module. Table 29: Conducted RF Output Power Frequency Max. LTE-FDD B2/B4B12/B13 Min. 23dBm±2.7dB TBD 6.6. RF Receiving Sensitivity The following table shows the conducted RF receiving sensitivity of BG96-NA module. Table 30: BG96-NA Conducted RF Receiving Sensitivity Frequency Primary Diversity SISO 3GPP LTE-FDD B2 TBD Not Supported TBD -100.
LTE Module Series BG96-NA Hardware Design 7 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm. 7.1. Mechanical Dimensions of the Module 22.50±0.1 26.50±0.1 2.3±0.
LTE Module Series BG96-NA Hardware Design 22.50 7.45 0.92 0.92 7.15 1.10 1.95 0.55 1.10 1.66 1.50 5.10 1.00 1.70 8.50 0.85 26.50 1.90 1.10 0.85 1.00 1.70 0.70 0.50 1.65 1.15 1.00 1.70 0.55 1.50 40x1.0 62x0.7 62x1.15 40x1.
LTE Module Series BG96-NA Hardware Design 7.2. Recommended Footprint 9.95 9.95 7.15 7.45 1.95 0.55 1.10 11.80 9.70 4.25 0.20 7.65 5.95 2.55 0.85 0.85 29.00 2.55 4.25 1.90 2.55 11.80 9.60 0.85 4.25 5.95 5.95 7.65 2.55 0.85 4.25 5.95 62x0.7 62x2.35 40x1.00 1.00 40x1.00 Figure 34: Recommended Footprint (Top View) NOTE For easy maintenance of the module, please keep about 3mm between the module and other components in the host PCB.
LTE Module Series BG96-NA Hardware Design 7.3. Design Effect Drawings of the Module Figure 35: Top View of the Module Figure 36: Bottom View of the Module NOTE These are design effect drawings of BG96-NA module. For more accurate pictures, please refer to the module that you get from Quectel.
LTE Module Series BG96-NA Hardware Design 8 Storage, Manufacturing and Packaging 8.1. Storage BG96-NA is stored in a vacuum-sealed bag. The storage restrictions are shown as below. 1. Shelf life in the vacuum-sealed bag: 12 months at <40ºC/90%RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be: Mounted within 72 hours at the factory environment of ≤30ºC/60%RH. Stored at <10%RH. 3.
LTE Module Series BG96-NA Hardware Design 8.2. Manufacturing and Welding Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.18mm. For more details, please refer to document [5].
LTE Module Series BG96-NA Hardware Design 9 Appendix A References Table 31: Related Documents SN Document Name Remark [1] Quectel_BG96_Power_Management_Application_Note BG96 Power Management Application Note [2] Quectel_BG96_AT_Commands_Manual BG96 AT Commands Manual [3] Quectel_BG96_GNSS_AT_Commands_Manual BG96 GNSS AT Commands Manual [4] Quectel_RF_Layout_Application_Note RF Layout Application Note [5] Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide Table 32: T
LTE Module Series BG96-NA Hardware Design DTX Discontinuous Transmission EFR Enhanced Full Rate ESD Electrostatic Discharge FDD Frequency Division Duplex FR Full Rate GMSK Gaussian Minimum Shift Keying GSM Global System for Mobile Communications HR Half Rate HSPA High Speed Packet Access HSDPA High Speed Downlink Packet Access HSUPA High Speed Uplink Packet Access I/O Input/Output Inorm Normal Current LED Light Emitting Diode LNA Low Noise Amplifier LTE Long Term Evolution M
LTE Module Series BG96-NA Hardware Design QPSK Quadrature Phase Shift Keying RF Radio Frequency RHCP Right Hand Circularly Polarized Rx Receive SISO Single Input Single Output SMS Short Message Service TDD Time Division Duplexing TX Transmitting Direction UL Uplink UMTS Universal Mobile Telecommunications System URC Unsolicited Result Code (U)SIM (Universal) Subscriber Identity Module Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value VIHmax Maxi
LTE Module Series BG96-NA Hardware Design VSWR Voltage Standing Wave Ratio WCDMA Wideband Code Division Multiple Access BG96-NA_Hardware_Design Confidential / Released 63 / 64
LTE Module Series BG96-NA Hardware Design 10 Appendix B GPRS Coding Schemes Table 33: Description of Different Coding Schemes Scheme CS-1 CS-2 CS-3 CS-4 Code Rate 1/2 2/3 3/4 1 USF 3 3 3 3 Pre-coded USF 3 6 6 12 Radio Block excl.USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 - Coded Bits 456 588 676 456 Punctured Bits 0 132 220 - Data Rate Kb/s 9.05 13.4 15.6 21.
LTE Module Series BG96-NA Hardware Design 11 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots.
LTE Module Sires BG96-NA Hardware Design 12 Appendix D EDGE Modulation and Coding Schemes Table 35: EDGE Modulation and Coding Schemes Coding Schemes Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot CS-1: GMSK / 9.05kbps 18.1kbps 36.2kbps CS-2: GMSK / 13.4kbps 26.8kbps 53.6kbps CS-3: GMSK / 15.6kbps 31.2kbps 62.4kbps CS-4: GMSK / 21.4kbps 42.8kbps 85.6kbps MCS-1 GMSK C 8.80kbps 17.60kbps 35.20kbps MCS-2 GMSK B 11.2kbps 22.4kbps 44.8kbps MCS-3 GMSK A 14.
