Product Info
Table Of Contents
- About the Document
- Contents
- Table Index
- Figure Index
- Introduction
- Product Concept
- Application Interfaces
- GNSS Receiver
- Antenna Interfaces
- Electrical, Reliability and RadioCharacteristics
- Mechanical Dimensions
- Storage, Manufacturing and Packaging
- Appendix A References
LTE Module Series
EG61-NA Hardware Design
EG61-NA_Hardware_Design 42 / 77
A common mode choke L1 is recommended to be added in series between the module and
customer’sMCU in order to suppress EMI spurious transmission. Meanwhile, the 0Ω resistors (R3 and R4)
should beadded in series between the module and the test points so as to facilitate debugging, and the
resistors are
not mounted by default. In order to ensure the integrity of USB data line signal, L1/R3/R4 components
must be placed close to the module, and also these resistors should be placed close to each other.
Theextra stubs of trace must be as short as possible.
The following principles should be complied with when design the USB interface, so as to meet USB 2.0
specification.
It is important to route the USB signal traces as differential pairs with total grounding. The impedance
of USB differential trace is 90Ω.
Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is
important to route the USB differential traces in inner-layer with ground shielding onnot only upper
and lower layers but also right and left sides.
Pay attention to the influence of junction capacitance of ESD protection component on USB data
lines. Typically, the capacitance value should be less than 2pF.
Keep the ESD protection components to the USB connector as close as possible.
1. EG61-NA module can only be used as a slave device.
2. “*” means under development.
3.11. UART Interfaces
The module provides two UART interfaces: the main UART interface and thedebug UART interface. The
following shows their features.
The main UART interface supports 9600bps, 19200bps, 38400bps, 57600bps, 115200bps,
230400bps, 460800bps and 921600bpsbaud rates, and the default is 115200bps. The interface can
be used for data transmission and AT command communication.
The debug UART interface supports 115200bpsbaud rate. It is used forLinux console and log output.
The following tables show the pin definition of the two UART interfaces.
NOTES