Product Info

LTE Module Series
AG35-Quecopen
Hardware Design
AG35-QuecOpen_Hardware_Design 10 / 137
Figure Index
FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 20
FIGURE 2: PIN ASSIGNMENT (TOP VIEW) .................................................................................................... 22
FIGURE 3: SLEEP MODE CURRENT CONSUMPTION DIAGRAM ................................................................ 41
FIGURE 4: SLEEP MODE APPLICATION WITH USB REMOTE WAKEUP .................................................... 41
FIGURE 5: SLEEP MODE APPLICATION WITHOUT USB REMOTE WAKEUP ............................................. 42
FIGURE 6: SLEEP MODE APPLICATION WITHOUT SUSPEND FUNCTION ................................................ 43
FIGURE 7: POWER SUPPLY LIMITS DURING BURST TRANSMISSION ...................................................... 45
FIGURE 8: STAR STRUCTURE OF THE POWER SUPPLY ............................................................................ 45
FIGURE 9: REFERENCE CIRCUIT OF POWER SUPPLY .............................................................................. 46
FIGURE 10: TURN ON THE MODULE USING DRIVING CIRCUIT ................................................................. 47
FIGURE 11: TURN ON THE MODULE USING KEYSTROKE .......................................................................... 47
FIGURE 12: TIMING OF TURNING ON MODULE ........................................................................................... 48
FIGURE 13: TIMING OF TURNING OFF MODULE ......................................................................................... 49
FIGURE 14: SHUT DOWN THE MODULE USING DRIVING CIRCUIT ........................................................... 50
FIGURE 15: TIMING OF TURNING OFF MODULE VIA SHDN_N ................................................................... 50
FIGURE 16: REFERENCE CIRCUIT OF RESET_N BY USING DRIVING CIRCUIT ...................................... 51
FIGURE 17: REFERENCE CIRCUIT OF RESET_N BY USING BUTTON ...................................................... 52
FIGURE 18: TIMING OF RESETTING MODULE ............................................................................................. 52
FIGURE 19: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR
................................................................................................................................................................... 53
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FIGURE 20: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR . 54
FIGURE 21: REFERENCE CIRCUIT OF USB APPLICATION ......................................................................... 55
FIGURE 22: REFERENCE CIRCUIT WITH TRANSLATOR CHIP ................................................................... 59
FIGURE 23: REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT .............................................................. 60
FIGURE 24: PRIMARY MODE TIMING ............................................................................................................ 62
FIGURE 25: AUXILIARY MODE TIMING .......................................................................................................... 62
FIGURE 26: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC .................................... 64
FIGURE 27: REFERENCE CIRCUIT DESIGN FOR SD CARD APPLICATION ............................................... 66
FIGURE 28: REFERENCE CIRCUIT DESIGN FOR EMMC APPLICATION .................................................... 67
FIGURE 29: SPI TIMING ................................................................................................................................... 69
FIGURE 30: SIMPLIFIED BLOCK DIAGRAM FOR ETHERNET APPLICATION ............................................. 71
FIGURE 31: REFERENCE CIRCUIT OF SGMII INTERFACE WITH PHY APPLICATION .............................. 71
FIGURE 32: REFERENCE CIRCUIT FOR CONNECTION WITH AF20 MODULE .......................................... 74
FIGURE 33: REFERENCE CIRCUIT OF THE NETWORK STATUS INDICATOR ........................................... 77
FIGURE 34: REFERENCE CIRCUITS OF STATUS ......................................................................................... 78
FIGURE 35: REFERENCE CIRCUIT OF USB_BOOT INTERFACE ................................................................ 79
FIGURE 36: REFERENCE CIRCUIT OF RF ANTENNA INTERFACES ........................................................... 88
FIGURE 37: MICROSTRIP DESIGN ON A 2-LAYER PCB ............................................................................... 89
FIGURE 38: COPLANAR WAVEGUIDE DESIGN ON A 2-LAYER PCB ........................................................... 89
FIGURE 39: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCE GROUND)
................................................................................................................................................................... 90
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