Product Info

LTE Module Series
AG35-QuecOpen
Hardware Design
AG35-Quecopen_Hardware_Design 35 / 137
The following table lists the multiplexing pins and their respective alternate functions of AG35-Quecopen.
Table 5: Alternate Functions of Multiplexing Pins
Pin Name Pin No.
Mode 1
(Default)
Mode 2 Mode 3 Mode 4 Reset
1)
Status in
Booting
Wake-up
Interrupt
2)
Remark
GPIO1 59 GPIO_38 -- -- -- B-PD,L Low level YES BOOT_CONFIG_12
GPIO2 61 GPIO_75 -- -- -- B-PD,L Low level YES
GPIO3 62 GPIO_74 -- -- -- B-PD,L Low level YES
GPIO4 144 GPIO_25 -- -- -- B-PD,L Low level YES BOOT_CONFIG_2
GPIO5 147 GPIO_24 -- -- -- B-PD,L Low level NO BOOT_CONFIG_1
GPIO6 150 GPIO_42 -- -- -- B-PD,L Low level YES
Recommended to be
“output”. Please refer to
NOTE 2 for details.
GPIO7 159 GPIO_58 -- -- -- B-PD,L Low level NO
BOOT_CONFIG_11.
Recommended to be
“output”. Please refer to
NOTE 2 for details.
GPIO8 143 GPIO_41 -- -- -- B-PD,L Low level NO
Recommended to be
“output”. Please refer to
NOTE 2 for details.
BT_EN* 3 BT_EN*
PMU_
GPIO_02
-- -- B-PD,L Low level NO