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SC66 Hardware Design

Smart LTE Module Series

Rev: SC66_Hardware_Design_V1.0

Date: 2019-03-08

Status: Preliminary

www.quectel.com

Summary of content (139 pages)

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SC66 Hardware Design Smart LTE Module Series Rev: SC66_Hardware_Design_V1.0 Date: 2019-03-08 Status: Preliminary www.quectel.
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Smart LTE Module Series SC66 Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. 7th Floor, Hongye Building, No.1801 Hongmei Road, Xuhui District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://www.quectel.com/support/sales.
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Smart LTE Module Series SC66 Hardware Design About the Document History Revision Date Author Description 1.
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Smart LTE Module Series SC66 Hardware Design Contents About the Document ................................................................................................................................... 2 Contents ....................................................................................................................................................... 3 Table Index .................................................................................................................................
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Smart LTE Module Series SC66 Hardware Design 3.19. Touch Panel Interfaces ............................................................................................................. 71 3.20. Camera Interfaces..................................................................................................................... 73 3.20.1. Design Considerations ................................................................................................... 79 3.21. Sensor Interfaces .......................
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Smart LTE Module Series SC66 Hardware Design 9 Storage, Manufacturing and Packaging ........................................................................................ 128 9.1. Storage .................................................................................................................................... 128 9.2. Manufacturing and Soldering .................................................................................................. 129 9.3. Packaging ................................
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Smart LTE Module Series SC66 Hardware Design Table Index TABLE 1: SC66-CE* FREQUENCY BANDS ..................................................................................................... 15 TABLE 2: SC66-A* FREQUENCY BANDS ....................................................................................................... 16 TABLE 3: SC66-J* FREQUENCY BANDS ........................................................................................................ 16 TABLE 4: SC66-E* FREQUENCY BANDS .
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Smart LTE Module Series SC66 Hardware Design TABLE 42: WI-FI/BT FREQUENCY................................................................................................................. 100 TABLE 43: PIN DEFINITION OF GNSS ANTENNA ........................................................................................ 100 TABLE 44: GNSS FREQUENCY ..................................................................................................................... 101 TABLE 45: ANTENNA REQUIREMENTS.........
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Smart LTE Module Series SC66 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 24 FIGURE 2: PIN ASSIGNMENT (TOP VIEW)..................................................................................................... 26 FIGURE 3: VOLTAGE DROP SAMPLE.............................................................................................................
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Smart LTE Module Series SC66 Hardware Design GROUND) .................................................................................................................................................. 99 FIGURE 37: REFERENCE CIRCUIT DESIGN FOR WI-FI/BT ANTENNA INTERFACE ................................ 100 FIGURE 38: REFERENCE CIRCUIT DESIGN FOR GNSS PASSIVE ANTENNA ......................................... 101 FIGURE 39: REFERENCE CIRCUIT DESIGN FOR GNSS ACTIVE ANTENNA .....................................
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Smart LTE Module Series SC66 Hardware Design 1 Introduction This document defines the SC66 module and describes its air interface and hardware interface which are connected with customers’ applications. This document can help customers quickly understand module interface specifications, electrical and mechanical details as well as other related information of SC66 module. Associated with application note and user guide, customers can use SC66 module to design and set up mobile applications easily.
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Smart LTE Module Series SC66 Hardware Design OEM/Integrators Installation Manual Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in mobile or fixed applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations 4. For FCC Part 15.
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Smart LTE Module Series SC66 Hardware Design with another transmitter), then the FCC/IC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC/IC authorization.
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Smart LTE Module Series SC66 Hardware Design (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement." The device could automatically discontinue transmission in case of absence of information to transmit, or operational failure.
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Smart LTE Module Series SC66 Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating SC66 module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product.
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Smart LTE Module Series SC66 Hardware Design 2 Product Concept 2.1. General Description SC66 is a series of Smart LTE module based on Qualcomm platform and Android operating system, and provides industrial grade performance. Its general features are listed below:       Support worldwide LTE-FDD, LTE-TDD, DC-HSDPA, DC-HSUPA, HSPA+, HSDPA, HSUPA, WCDMA, TD-SCDMA, EVDO/CDMA, EDGE and GPRS coverage Support short-range wireless communication via Wi-Fi 802.11a/b/g/n/ac and BT5.
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Smart LTE Module Series SC66 Hardware Design BT5.0 2402MHz~2480MHz GNSS GPS: 1575.42MHz±1.023MHz GLONASS: 1597.5MHz~1605.8MHz BeiDou: 1561.098MHz±2.046MHz Table 2: SC66-A* Frequency Bands Type Frequency Bands LTE-FDD B2/B4/B5/B7/B12/B13/B14/B17/B25/B26/B66/B71 LTE-TDD B41(200M) WCDMA B2/B4/B5 Wi-Fi 802.11a/b/g/n/ac 2402MHz~2482MHz; 5180MHz~5825MHz BT 5.0 2402MHz~2480MHz GNSS GPS: 1575.42MHz±1.023MHz GLONASS: 1597.5MHz~1605.8MHz BeiDou: 1561.098MHz±2.
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Smart LTE Module Series SC66 Hardware Design Table 4: SC66-E* Frequency Bands Type Frequency Bands LTE-FDD B1/B2/B3/B4/B5/B7/B8/B20/B28(A+B) LTE-TDD B38/B39/B40/B41(200M) WCDMA B1/B2/B4/B5/B8 GSM B2/B3/B5/B8 Wi-Fi 802.11a/b/g/n/ac 2402MHz~2482MHz; 5180MHz~5825MHz BT 5.0 2402MHz~2480MHz GNSS GPS: 1575.42MHz±1.023MHz GLONASS: 1597.5MHz~1605.8MHz BeiDou: 1561.098MHz±2.
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Smart LTE Module Series SC66 Hardware Design Table 6: SC66-MW*(2*2 MIMO WIFI) Frequency Bands Type Frequency Bands LTE-FDD / LTE-TDD / WCDMA / TD-SCDMA / CDMA / GSM / Wi-Fi 802.11a/b/g/n/ac 2402MHz~2482MHz; 5180MHz~5825MHz BT 5.0 2402MHz~2480MHz GNSS / NOTE “*” means under development. SC66-A、SC66-J、SC66-E、SC66-MW support WIFI_MIMO SC66 is an SMD type module which can be embedded into applications through its 324 pins (including 152 LCC pads and 172 LGA pads).
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Smart LTE Module Series SC66 Hardware Design 2.2. Key Features The following table describes the detailed features of SC66 module. Table 7: SC66 Key Features Features Details Application Processor Customized 64-bit ARM v8-compliant applications processorCustomized 64-bit ARM v8-compliant applications processor  Kryo Gold: quad high-performance cores targeting 2.2 GHz  Kryo Silver: quad low-power cores targeting 1.
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Smart LTE Module Series SC66 Hardware Design  WCDMA: Max 384Kbps (DL)/Max 384Kbps (UL) TD-SCDMA Features Support CCSA Release 3 TD-SCDMA  Max 4.2Mbps (DL)/Max 2.2Mbps (UL) CDMA2000 Features Support 3GPP2 CDMA2000 1X Advanced, CDMA2000 1x EV-DO Rev.A  EVDO: Max 3.1Mbps (DL)/Max 1.8 Mbps (UL)  1X Advanced: Max 307.2Kbps (DL)/Max 307.2Kbps (UL) GSM Features R99 CSD: 9.6kbps, 14.4kbps GPRS Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max 107Kbps (DL), 85.
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Smart LTE Module Series SC66 Hardware Design Audio Codec EVRC, EVRC-B, EVRC-WB; G.711, G.729A/AB; GSM-FR, GSM-EFR, GSM-HR; AMR-NB, AMR-WB, AMR-eAMR, AMR-BeAMR USB Interface Compliant with USB 3.1 and 2.0 specifications, with transmission rates up to 10Gbps on USB 3.1 and 480Mbps on USB 2.0.
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Smart LTE Module Series SC66 Hardware Design 2. 2) Within extended temperature range, the module remains the ability to establish and maintain a voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce in their value and exceed the specified tolerances.
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Smart LTE Module Series SC66 Hardware Design Power Power Signal Function ANT_WIFI/BT ANT_WIFI/BT V DD_ RF VOL_UP MICs SPK EAR FEM FEM Codec Headset SD_VDD SD_PU_VDD PM660L LDO3B_2P8 38.4MHZ LDO7B_3P125 XO PWM WCN VPH_PWR BBCLK VRTC PM-3003A RFCLK USIM1_VDD USIM2_VDD LDO11A_1P8 38.4 M XO LDO13A_1P8 LDO14A_1P8 ADCs LPDDR eMMC PM660 HK ADC &MPPs Air Interface Porcessors Baseband Connectivity PWRKEY VOL DOWN VBUS MEM Multimedia BATTERY 13.
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Smart LTE Module Series SC66 Hardware Design Power Power Signal Function ANT_ GNSS ANT_ MAIN ANT_DRX ANT_WIFI/BT ANT_WIFI/BT C1 V DD_ RF SAW VOL_UP MICs APT SPK EAR LNA SAW FEM FEM SAW 0欧姆跳贴 SD_VDD SAW Duplexs Codec PA Headset SD_PU_VDD Switch Switch PM660L Tranceiver LDO3B_2P8 38.4MHZ LDO7B_3P125 XO PWM WCN VPH_PWR BBCLK VRTC PM-3003A RFCLK USIM1_VDD USIM2_VDD LDO11A_1P8 38.
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Smart LTE Module Series SC66 Hardware Design 3 Application Interfaces 3.1. General Description SC66 is equipped with 324-pin 1.0mm pitch SMT pads that can be embedded into cellular application platform. The following chapters provide the detailed description of pins/interfaces listed below.
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Smart LTE Module Series SC66 Hardware Design 3.2. Pin Assignment The following figure shows the pin assignment of SC66 module.
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Smart LTE Module Series SC66 Hardware Design 3.3. Pin Description Table 8: I/O Parameters Definition Type Description IO Bidirectional DI Digital input DO Digital output PI Power input PO Power output AI Analog input AO Analog output OD Open drain The following tables show the SC66’s pin definition and electrical characteristics. Table 9: Pin Description Power Supply Pin Name VBAT Pin No. 36,37, 38 I/O Description Comment PI/P O Power supply for the module Vmax=4.4V Vmin=3.
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Smart LTE Module Series SC66 Hardware Design O internal RTC circuit When VBAT is not connected : VI=2.1V~3.25V LDO13A_1 P8 9 PO 1.8V output power supply Vnorm=1.8V IOmax=20mA Power supply for external GPIO’s pull up circuits and level shift circuit. LDO7B_3P 125 157 PO 3.125V output power supply Vnorm=3.125V IOmax=150mA Power supply only for DP switch Vnorm=1.8V IOmax=150mA Power supply for I/O VDD of cameras, LCDs and TP etc. Vnorm=1.8V IOmax=150mA Power supply for Sensors. Add a 1.
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Smart LTE Module Series SC66 Hardware Design 43，47， 56，62， 87，98， 101，112， 125，128， 130，133， 135，148， 150，159， 160，163， 166，170， 173，176， 182，193， 195，219， 225，243， 257~323 Audio Interfaces Pin Name Pin No. I/O Description DC Characteristics MIC_BIAS 167 AO Microphone bias voltage VO=1.6V~2.
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Smart LTE Module Series SC66 Hardware Design positive input for headset MIC3_P 169 AI Microphone positive input for second mic EAR_P 53 AO Earpiece positive output EAR_M 52 AO Earpiece negative output SPK_P 55 AO Speaker positive output SPK_M 54 AO Speaker negative output HPH_R 51 AO Headphone right channel output Second mic input It should be connected to main GND HPH_REF 50 AI Headphone reference ground HPH_L 49 AO Headphone left channel output HS_DET 48 AI Headset in
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Smart LTE Module Series SC66 Hardware Design USB1_HS_ DP USB_SS2_T X_P USB_SS2_T X_M USB_SS2_ RX_P USB_SS2_ RX_M USB_SS1_ RX_P USB_SS1_ RX_M USB_SS1_T X _P 32 165 164 162 161 171 172 174 IO USB 2.0 differential data bus (plus) IO USB 3.1 differential transmit (plus) IO USB 3.1 differential transmit (minus) IO USB 3.1 differential receive (plus) IO USB 3.1 differential receive (minus) IO USB 3.1 differential receive (plus) IO IO USB 3.1 differential receive (minus) USB 3.
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Smart LTE Module Series SC66 Hardware Design through 10K resistor. SS_DIR_IN SS_DIR_OU T 21 CC status detection pin When USB TYPE-C is used, it should be connected to SS_DIR_OUT. When uUSB is used, it should be connected to GND. DO CC status output pin When USB TYPE-C is used, it should be connected to SS_DIR_IN. When uUSB is used, it should be kept open. I/O Description DI 226 (U)SIM Interfaces Pin Name Pin No.
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Smart LTE Module Series SC66 Hardware Design pull-up to 1.8V. If unused, keep this pin open. USIM2_RST 207 USIM2_CLK 208 USIM2_DATA 209 USIM2_VDD 210 DO (U)SIM2 card reset signal VOLmax=0.4V VOHmin= 0.8 × USIM2_VDD DO (U)SIM2 card clock signal VOLmax=0.4V VOHmin= 0.8 × USIM2_VDD IO (U)SIM2 card data signal VILmax= 0.2 × USIM2_VDD VIHmin= 0.7 × USIM2_VDD VOLmax=0.4V VOHmin= 0.8 × USIM2_VDD PO (U)SIM2 card power supply I/O Description DC Characteristics DO DEBUG transmit data.
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Smart LTE Module Series SC66 Hardware Design LPI_UART_2_T XD 60 DO UART2 transmit data VOLmax=0.45V VOHmin=1.35V LPI_UART_2_R XD 61 DI UART2 receive data VILmax=0.63V VIHmin=1.17V I/O Description DC Characteristics SD Card Interface Pin Name SD_CLK SD_CMD Pin o. 70 69 DO IO SD_DATA0 68 IO SD_DATA1 67 IO High speed digital clock signal of SD card Comment 1.8V SD card: VOLmax=0.45V VOHmin=1.4V 2.95V SD card: VOLmax=0.368V VOHmin=2.
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Smart LTE Module Series SC66 Hardware Design TP0_RST 138 DO Reset signal of touch panel (TP0) VOLmax=0.45V VOHmin=1.35V 1.8V power domain. Active low. TP0_INT 139 DI Interrupt signal of touch panel (TP0) VILmax=0.63V VIHmin=1.17V 1.8V power domain. TP0_I2C_SCL 140 OD I2C clock signal of touch panel (TP0) 1.8V power domain. TP0_I2C_SDA 206 OD I2C data signal of touch panel (TP0) 1.8V power domain. Pin Name Pin No.
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Smart LTE Module Series SC66 Hardware Design Pin Name Pin No.
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Smart LTE Module Series SC66 Hardware Design CSI0_CLK_N 78 AI MIPI clock signal of front camera (negative) CSI0_CLK_P 77 AI MIPI clock signal of front camera (positive) CSI0_LN0_N 80 AI MIPI lane 0 data signal of front camera (negative) CSI0_LN0_P 79 AI MIPI lane 0 data signal of front camera (positive) CSI0_LN1_N 82 AI MIPI lane 1 data signal of front camera (negative) CSI0_LN1_P 81 AI MIPI lane 1 data signal of front camera (positive) CSI0_LN2_N 84 AI MIPI lane 2 data signal of
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Smart LTE Module Series SC66 Hardware Design DCAM_RST 180 DO Reset signal of depth camera 1.8V power domain DCAM_PWDN 181 DO Power down signal of depth camera 1.8V power domain CAM_I2C_SDA 1 197 OD I2C data signal of depth camera 1.8V power domain CAM_I2C_SCL1 196 OD I2C data signal of depth camera 1.8V power domain. Keypad Interfaces Pin Name Pin No. I/O Description DC Characteristics PWRKEY 39 DI Turn on/off the module 1.
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Smart LTE Module Series SC66 Hardware Design ANT_DRX 149 AI Diversity antenna interface ANT_GNSS 134 AI GNSS antenna interface ANT_WIFI/BT 129 IO Wi-Fi/BT antenna interface ANT_WIFI_MIM O 324 IO Wi-Fi_MIMO antenna interface Pin Name Pin No.
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Smart LTE Module Series SC66 Hardware Design HALL_INT 218 IO GPIO GPIO_22 204 IO GPIO GPIO_23 205 IO GPIO GPIO_12 228 IO GPIO GPIO_13 227 IO GPIO GPIO_14 230 IO GPIO GPIO_15 229 IO GPIO GPIO_61 234 IO GPIO GPIO_03B 11 IO GPIO GPIO_08B 13 IO GPIO GPIO_04B 14 IO GPIO GPIO_05B 15 IO GPIO GPIO_11A 211 IO GPIO GPIO_13A 233 IO GPIO Pin Name Pin No.
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Smart LTE Module Series SC66 Hardware Design Pin Name Pin No.
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Smart LTE Module Series SC66 Hardware Design Pin Name Pin No. RESERVED 17,21 3， 214， 215， 216， 217， 222， 235 I/O Description DC Characteristics Comment Keep these pins open. Reserved pins 3.4. Power Supply 3.4.1. Power Supply Pins SC66 provides three VBAT pins、VDD_RF pins and one VPH_PWR pin. VBAT pins are dedicated for connection with an external power supply.
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Smart LTE Module Series SC66 Hardware Design To decrease voltage drop, a bypass capacitor of about 100µF with low ESR (ESR=0.7Ω) should be used, and a multi-layer ceramic chip capacitor (MLCC) array should also be reserved due to its ultra-low ESR. It is recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array, and place these capacitors close to VBAT/VDD_RF pins. The width of VBAT trace should be no less than 3mm.
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Smart LTE Module Series SC66 Hardware Design MIC29502WU U1 DC_IN VBAT 470uF ADJ GND OUT 4 5 100nF 51K 3 R1 1 C2 C1 EN 2 IN R2 220K 1% R3 100k 1% R4 470R C3 C4 470uF 100nF Figure 5: Reference Circuit of Power Supply NOTES 1. 2. 3. It is recommended to switch off the power supply for module in abnormal state, and then switch on the power to restart the module. The module supports battery charging function by default.
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Smart LTE Module Series SC66 Hardware Design 3.5. Turn on and off Scenarios 3.5.1. Turn on Module Using the PWRKEY The module can be turned on by driving PWRKEY pin to a low level for at least 1.6s. PWRKEY pin is pulled to 1.8V internally. It is recommended to use an open drain/collector driver to control the PWRKEY. A simple reference circuit is illustrated in the following figure. PWRKEY R3 1K >1.6s R1 Q1 4.
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Smart LTE Module Series SC66 Hardware Design In addition, when VBAT is powered on, the module will be powered on automatically. The reference circuit is shown below: CBL_PWR_N (Pin22) 1K SC66 Figure 8: Automatic Boot Reference Circuit NOTE Make sure that VBAT is stable before pulling down PWRKEY pin. The recommended time between them is no less than 30ms. PWRKEY cannot be pulled down all the time. 3.5.2.
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Smart LTE Module Series SC66 Hardware Design 3.6. VRTC Interface The RTC (Real Time Clock) can be powered by an external power source through VRTC when the module is powered down and there is no power supply for the VBAT. The external power source can be rechargeable battery (such as button cells) according to application demands. The following reference circuit design when an external battery is utilized for powering RTC. VRTC 0R 100nF Figure 10: RTC Powered by Rechargeable Button Cell NOTES 1. 2. 2.
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Smart LTE Module Series SC66 Hardware Design 3.7. Power Output SC66 supports output of regulated voltages for peripheral circuits. During application, it is recommended to use parallel capacitors (33pF and 10pF) in the circuit to suppress high frequency noise. Table 10: Power Description Pin Name Default Voltage (V) Drive Current (mA) Idle LDO13A_1P8 1.8 20 Keep LDO11A_1P8 1.8 150 / LDO3B_2P8 2.8 600 / LDO7B_3P125 3.125 150 / LDO14A_1P8 1.8 150 Keep SD_VDD 2.
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Smart LTE Module Series SC66 Hardware Design   Constant current mode (CC mode): When the battery voltage is increased to between the maximum pre-charge voltage and 4.35V (3.6V~4.5V programmable, 4.35V by default), the system will switch to CC mode. The charging current is programmable from 0mA~3000mA. The default charging current is 500mA for USB charging and 2A for adapter. Constant voltage mode (CV mode): When the battery voltage reaches the final value 4.
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Smart LTE Module Series SC66 Hardware Design Adapter or USB USB _VBUS VBAT VBAT BAT_PLUS NTC BAT_THERM GND BAT_MINUS D1 Battery D2 ESD ESD C1 C2 100uF 1uF C3 33pF GND Module Figure 11: Reference Design for Battery Charging Circuit SC66 offers a fuel gauge algorithm that is able to accurately estimate the battery’s state by current and voltage monitor techniques.
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Smart LTE Module Series SC66 Hardware Design 3.9. USB Interface SC66 provides two USB interfaces,The interface is compatible with the USB 3.1/2.0 specification, and can be used for USB OTG,TYPE-C,DP function. USB 3.1 has a maximum speed of 10Gbps, USB 2.0 supports up to 480Mbps with full speed (12Mbps) down compatibility. USB interface can be used for AT command transmission, data transmission, software debugging and software upgrading. SC66 also supports USB on-go(OTG) function.
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Smart LTE Module Series SC66 Hardware Design USB_SS2_RX_P 162 AI USB_SS2_TX_M 164 AO USB_SS2_TX_P 165 AO UUSB_TYPEC 23 AI uUSB&USB TYPE-C configure slection pin USB_CC2 223 AI USB TYPE-C Configure2 USB_CC1 SS_DIR_IN SS_DIR_OUT 224 21 226 SC66_Hardware_Design AI DI DO When USB TYPE-C is used, it should be connected to VPH_PWR through 10K resistor. When uUSB is used, it should be connected to GND through 10K resistor.
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Smart LTE Module Series SC66 Hardware Design The following is a reference design for TYPE-C interface: USB_VBUS USB1_HS_DP VBUS D+ D- USB1_HS_DM Module USB_CC1 USB_CC2 CC1 CC2 0R SS_DIR_OUT SS_DIR_IN USB Type-C C6 USB _SS1_RX_P USB _SS1_RX_M USB _SS1_TX_P USB _SS1_TX_M USB _SS2_RX_P USB _SS2_RX_M USB _SS2_TX_P USB _SS2_TX_M UUSB_TYPEC A2 C7 A3 C8 B11 C9 B10 C10 B2 C11 B3 C12 C13 A10 A11 RX1+ RX1TX1+ TX1RX2+ RX2TX2+ TX2- 10K VPH_PWR Figure 12: USB Type-C Interface Reference Desi
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Smart LTE Module Series SC66 Hardware Design   For USB3.1，the Rx-to-Tx spacing should be three times the line width, Rx-and-Tx to other signals spacing should be four times the line width;For USB2.0, the DP-to-DM spacing shouled be three times the line width, DP-and-DM to other signals spacing should be four times line width. For DisplayPort, The routing length difference between DP_AUX_N and DP_AUX_P should be less than 7mm. Table 13: USB Trace Length Inside the Module Pin No.
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Smart LTE Module Series SC66 Hardware Design Table 14: The Differences between USB Mode and DisplayPort Mode Module Pin Name USB Mode DisplayPort Mode USB_SS2_RX_P/M USB_SS2_RX_P/M DP_LANE0_P/M USB_SS2_TX_P/M USB_SS2_TX_P/M DP_LANE1_P/M USB_SS1_RX_P/M USB_SS1_RX_P/M DP_LANE3_P/M USB_SS1_TX_P/M USB_SS1_TX_P/M DP_LANE2_P/M DP_AUX_P/N SBU1/2 AUX_P/N USB1_HS_DP/DM USB1_HS_DP/DM USB1_HS_DP/M USB_CC1/CC2 USB_CC1/CC2 HOTPLUG_DET/Vconn VBUS VBUS VBUS GND GND GND The design of Display
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Smart LTE Module Series SC66 Hardware Design Figure 13: Display Port interfaces 3.9.3. Host SC66 supports two groups of USB, and USB1 is part of TYPE-C compatibility, USB2 is a separate part that supports only the Host mode. Table 15: USB2 configuration Pin Name Pin No.
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Smart LTE Module Series SC66 Hardware Design The following table shows the pin definition of UART interfaces. Table 16: Pin Definition of UART Interfaces Pin Name Pin No. I/O DEBUG_TXD 5 DO DEBUG_RXD 6 DI UART1_TXD 7 DO Description Comment 1.8 power domain UART for Debug 1.8 power domain 1.8 power domain UART1 UART1_RXD 8 DI 1.8 power domain UART6_RXD 198 DI UART6 Receive data 1.8 power domain UART6_TXD 199 DO UART6 Send data 1.
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Smart LTE Module Series SC66 Hardware Design LDO11A_1P8 VCCB VCCA C1 100 pF U1 OE C2 100pF VDD_3.3V GND UART 6_ CTS A1 B1 CTS_3.3V UART 6_ RTS A2 B2 RTS_3.3V TXS0104EPWR UART6_ TXD A3 B3 TXD_3.3V UART6_ RXD A4 B4 RXD_3.3V Figure 15: Reference Circuit with Level Translator Chip (for UART6) The following figure is an example of connection between SC66 and PC.
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Smart LTE Module Series SC66 Hardware Design SC66 provides two (U)SIM interfaces which both meet ETSI and IMT-2000 requirements. Dual SIM Dual Standby is supported by default. Both 1.8V and 2.95V (U)SIM cards are supported, and the (U)SIM interfaces are powered by the dedicated low dropout regulators from SC66 module. Table 17: Pin Definition of (U)SIM Interfaces Pin Name Pin No. I/O Description Comment Active Low. Need external pull-up to 1.8V. If unused, keep this pin open.
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Smart LTE Module Series SC66 Hardware Design LDO13A_1P8 USIM_ VDD R1 R2 100K 10K C1 (U)SIM Card Connector 100nF USIM_ VDD Module USIM_ RST R3 USIM_ CLK USIM_ DET R4 22R 22R USIM_ DATA R5 22R C2 VCC RST CLK C3 22pF 22pF GND VPP IO D1 C4 22pF ESD Figure 17: Reference Circuit for (U)SIM Interface with an 8-pin (U)SIM Card Connector If there is no need to use USIM_DET, please keep it open. The following is a reference circuit for (U)SIM interface with a 6-pin (U)SIM card connector.
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Smart LTE Module Series SC66 Hardware Design   In order to offer good ESD protection, it is recommended to add a TVS diode array with parasitic capacitance not exceeding 50pF. The 22Ω resistors should be added in series between the module and (U)SIM card so as to suppress EMI spurious transmission and enhance ESD protection. Please note that the (U)SIM peripheral circuit should be close to the (U)SIM card connector.
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Smart LTE Module Series SC66 Hardware Design SD_PU_VDD LDO13A_1P8 R1 R2 R3 R4 R5 SD_VDD R6 120K R7 SD_CLK SD_DATA0 SD_DATA1 SD_DET NM_51K NM_51K NM_10K NM_51K NM_51K 1 R8 33R 33R R9 33R R10 33R R11 5 P5-CLK 6 P6-VSS R12 33R 33R 7 P7-DAT0 8 P8-DAT1 R13 1K 9 DETECTIVE SD_DATA2 SD_DATA3 SD_CMD P1-DAT2 2 P2-CD/DAT3 3 P3-CMD 4 P4-VDD 10 Module D1 D2 D3 D4 D5 D6 D7 C1 C2 D8 11 GND GND 12 GND 13 GND 4.
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Smart LTE Module Series SC66 Hardware Design 67 SD_DATA1 24.33 66 SD_DATA2 24.21 65 SD_DATA3 24.25 3.13. GPIO Interfaces SC66 has abundant GPIO interfaces with power domain of 1.8V. The pin definition is listed below.
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Smart LTE Module Series SC66 Hardware Design MAG_INT 254 GPIO_70 B-PD:nppukp Wakeup ALPS_INT 253 GPIO_71 B-PD:nppukp Wakeup HALL_INT 218 GPIO_75 B-PD:nppukp Wakeup GPIO_22 204 GPIO_22 B-PD:nppukp Wakeup GPIO_23 205 GPIO_23 B-PD:nppukp GPIO_12 228 GPIO_12 B-PD:nppukp GPIO_13 227 GPIO_13 B-PD:nppukp GPIO_14 230 GPIO_14 B-PD:nppukp GPIO_15 229 GPIO_15 B-PD:nppukp GPIO_61 234 GPIO_61 B-PD:nppukp GPIO_03B 11 GPIO_03B B-PD:nppukp GPIO_08B 13 GPIO_08B B-PD:nppukp
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Smart LTE Module Series SC66 Hardware Design Table 21: Pin Definition of I2C Interfaces Pin Name Pin No I/O Description TP0_I2C_SCL 140 OD TP I2C clock TP0_I2C_SDA 206 OD TP I2C data CAM_I2C_SCL0 75 OD CAM I2C clock CAM_I2C_SDA0 76 OD CAM I2C data CAM_I2C_SCL1 196 OD CAM I2C clock CAM_I2C_SDA1 197 OD CAM I2C data SENSOR_I2C_SCL 131 OD Sensor I2C clock Comment Used for TP0 Used for main and front camera Used for depth camera Used for sensor SENSOR_I2C_SDA 132 OD Sensor
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Smart LTE Module Series SC66 Hardware Design LPI_MI2S_SCLK 212 DO LPI_I2S serial clock signal I2S serial clock LPI_MI2S_WS 156 DO LPI_I2S word selection signal I2S word selection (L/R) LPI_MI2S_DATA0 154 IO LPI_I2S Data0 signal I2S serial data0 channel LPI_MI2S_DATA1 155 IO LPI_I2S Data1 signal I2S serial data1 channel 3.16. SPI Interfaces SC66 provides SPI interfaces which only support master mode. Table 23: Pin Definition of SPI Interfaces Pin Name Pin No.
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Smart LTE Module Series SC66 Hardware Design The resolution of the ADC is up to 15 bits. 3.18. LCM Interfaces SC66 video output interface (LCM interface) is based on MIPI_DSI standard and supports 8 groups of high-speed differential data transmission and WQXGA display (resolution: 2560*1600),Support double screen display, default DSI+DP (type-c), optional DSI0+DSI1. Note that DSI1 does not support screens with command mode. Table 25: Pin Definition of LCM Interfaces Pin Name Pin No.
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Smart LTE Module Series SC66 Hardware Design DSI0_LN2_N 122 AO LCD0 MIPI lane 2 data signal (negative) DSI0_LN2_P 121 AO LCD0 MIPI lane 2 data signal (positive) DSI0_LN3_N 124 AO LCD0 MIPI lane 3 data signal (negative) DSI0_LN3_P 123 AO LCD0 MIPI lane 3 data signal (positive) DSI1_CLK_N 103 AO LCD1 MIPI clock signal (negative) DSI1_CLK_P 102 AO LCD1 MIPI clock signal (positive) DSI1_LN0_N 105 AO LCD1 MIPI lane 0 data signal (negative) DSI1_LN0_P 104 AO LCD1 MIPI lane 0 data s
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Smart LTE Module Series SC66 Hardware Design VPH_PWR LCM0 _LED+ 背光驱动 LCM0_LED- PWM_OUT （PIN152） C1 2.2uF Module Figure 20: LCM0 external backlight drive reference circuit VPH_PWR LCM1 _LED+ 背光驱动 PWM_OUT LCM1_LED- （PIN238） C1 2.
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Smart LTE Module Series SC66 Hardware Design LDO3B_2P8 LDO11A_1P8 1 2 3 4 5 6 LCM0 _ LED+ LCM0 _LEDLCD0_TE LCD0_ RST ADC0 6 5 2 DSI0_LN3_N 1 6 2 DSI0_LN2_N 1 6 2 DSI0_LN1_N 1 6 2 1 6 2 DSI0_ CLK_N FL4 4 3 5 DSI0_ CLK_P FL3 4 3 5 DSI0_LN0_P DSI0_LN0_N FL2 4 3 5 DSI0_LN1_P C3 1uF 4 3 5 DSI0_LN2_P C2 100nF FL1 3 1 DSI0_LN3_P C1 4.
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Smart LTE Module Series SC66 Hardware Design LDO3B_2P8 LDO11A_1P8 1 2 3 4 5 6 LCM1 _ LED+ LCM1 _LED- LCD1_RST ADC1 6 5 2 DSI1_LN3_N 1 6 2 DSI1_LN2_N 1 6 2 DSI1_LN1_N 1 6 2 1 6 2 DSI1_ CLK_N FL4 4 3 5 DSI1_ CLK_P FL3 4 3 5 DSI1_LN0_P DSI1_LN0_N FL2 4 3 5 DSI1_LN1_P C3 1uF 4 3 5 DSI1_LN2_P C2 100nF FL1 3 1 DSI1_LN3_P C1 4.
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Smart LTE Module Series SC66 Hardware Design corresponding power supply and interrupt pins. The pin definition of touch panel interfaces is illustrated below. Table 26: Pin Definition of Touch Panel Interfaces Pin Name Pin No I/O Description Comment GPIO_03B 11 PO TP VDD power supply enable pin Use external LDO power supply LDO11A_1P8 10 PO 1.8V output power supply Pull-up power supply of I2C Vnorm=1.
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Smart LTE Module Series SC66 Hardware Design VPH_PWR CTP_VDD LDO_IC GPIO_03B C2 R1 C1 Module 2.2uF 100K LDO11A_1P8 R1 CTP_VDD R2 2.2K 2.2K 1 SDA 1.8V 2 SCL 1.8V 3 RESET 1.8V 4 INT 1.8V TP0_I2C_SDA TP0_I2C_SCL TP0_RST TP0_INT D1 D2 D3 5 GND 6 VDD 2.8V D4 C1 Module C2 D5 4.7uF 100nF TP Figure 24: Reference Circuit Design for Touch Panel Interfaces 3.20.
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Smart LTE Module Series SC66 Hardware Design Table 27: Pin Definition of Camera Interfaces Pin Name Pin No. I/O Description GPIO_08B 13 DO 后置摄像头 DVDD 供电 LDO 使能管脚 GPIO_05B 15 DO 前置摄像头 DVDD 供电 LDO 使能管脚 Vnorm=1.8V IOmax=150mA LDO11A_1P8 10 PO 输出 1.8V；给摄像头的 DOVDD 供电 Vnorm=2.8V IOmax=600mA LDO3B_2P8 12 PO 输出 2.
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Smart LTE Module Series SC66 Hardware Design CSI1_LN2_P 94 AI 后摄 MIPI 数据 2 正 CSI1_LN3_N 97 AI 后摄 MIPI 数据 3 负 CSI1_LN3_P 96 AI 后摄 MIPI 数据 3 正 CSI2_CLK_N 184 AI 景深 MIPI 时钟负 CSI2_CLK_P 183 AI 景深 MIPI 时钟正 CSI2_LN0_N 186 AI 景深 MIPI 数据 0 负 CSI2_LN0_P 185 AI 景深 MIPI 数据 0 正 CSI2_LN1_N 188 AI 景深 MIPI 数据 1 负 CSI2_LN1_P 187 AI 景深 MIPI 数据 1 正 CSI2_LN2_N 190 AI 景深 MIPI 数据 2 负 CSI2_LN2_P 189 AI 景深 MIPI 数据 2 正 CSI2_LN3_N 192 AI 景深 MIPI 数据 3 负 CSI2_LN3_P 191 AI 景深 MIPI 数据
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Smart LTE Module Series SC66 Hardware Design CAM_I2C_SCL1 196 景深摄像头 I2C 时钟信号 OD The following is a reference circuit design for two-camera applications. VPH_PWR VPH_PWR DVDD_REAR DVDD_FRONT LDO_IC LDO_IC GPIO_08B R1 Module 100K GPIO_5B C2 C1 R2 Module 2.2uF 100K C4 C3 2.2uF VPH_PWR AVDD LDO_IC GPIO_04B R3 Module 100K C6 C5 2.
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Smart LTE Module Series SC66 Hardware Design 4.7uF 4.7uF 1uF 1uF LDO3B_2P8 AFVDD AVDD AVDD DVDD DVDD_REAR DOVDD LDO11A_1P8 2.2K Rear camera connector M CAM_ RST MCAM_PWDN MCAM_MCLK CAM_I2C_SDA0 CAM_ I2C_SCL0 CSI1_LN3_P CSI1_LN3_N CSI1_LN2_P CSI1_LN2_N CSI1_LN1_P CSI1_LN1_N CSI1_LN0_P CSI1_LN0_N CSI1_ CLK_P CSI1_ CLK_N 2.2K EMI EMI EMI EMI EMI 4.
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Smart LTE Module Series SC66 Hardware Design The following is a reference circuit design for three-camera applications. 4.7uF 4.7uF 1u F 1uF LDO3B_1P8 AVDD 2.2K EMI EMI EMI EMI DVDD_FRONT 1uF DOVDD AVDD 4.7 uF DVDD 1uF Front camera connector S CAM_ RST SCAM _ PWDN SCAM _ MCLK EMI CSI0_ CLK_P CSI0_ CLK_N CSI0_LN0_P EMI CSI0_LN0_N CSI0_LN1_P CSI0_LN1_N EMI CSI2_LN0_P CSI2_LN0_N CSI2_CLK_P CSI2_CLK_N DCAM_RST DCAM_PWDN DCAM_MCLK DCAM_I2C_SDA1 DCAM_I2C_SCL1 EMI 4.7 uF 1uF EMI EMI 2.
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Smart LTE Module Series SC66 Hardware Design NOTE CSI2 data lines CSI1_LN2_P, CSI_LN2_N, CSI_LN3_P and CSI_LN3_N can be multiplexed into MIPI signals for the fourth camera in four-camera application. 3.20.1. Design Considerations       Special attention should be paid to the pin definition of LCM/camera connectors. Assure the SC66 and the connectors are correctly connected. MIPI are high speed signal lines, supporting maximum data rate up to 2.1Gbps.
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Smart LTE Module Series SC66 Hardware Design 121 DSI0_LN2_P 26.53 124 DSI0_LN3_N 27.31 123 DSI0_LN3_P 27.30 103 DSI1_CLK_N 23.20 102 DSI1_CLK_P 23.54 105 DSI1_LN0_N 27.89 -0.01 0.34 0.14 104 DSI1_LN0_P 28.03 107 DSI1_LN1_N 30.21 106 DSI1_LN1_P 29.91 109 DSI1_LN2_N 33.56 -0.30 0.16 108 DSI1_LN2_P 33.40 111 DSI1_LN3_N 37.35 110 DSI1_LN3_P 37.33 89 CSI1_CLK_N 16.00 88 CSI1_CLK_P 15.98 91 CSI1_LN0_N 14.94 90 CSI1_LN0_P 14.96 93 CSI1_LN1_N 12.
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Smart LTE Module Series SC66 Hardware Design 185 CSI2_LN0_P 15.35 188 CSI2_LN1_N 7.29 187 CSI2_LN1_P 7.26 190 CSI2_LN2_N 3.73 -0.03 0.52 189 CSI2_LN2_P 4.25 192 CSI2_LN3_N 6.77 191 CSI2_LN3_P 7.04 78 CSI0_CLK_N 25.37 0.27 -0.03 77 CSI0_CLK_P 25.34 80 CSI0_LN0_N 23.33 79 CSI0_LN0_P 23.23 82 CSI0_LN1_N 22.19 -0.10 0.36 81 CSI0_LN1_P 22.55 84 CSI0_LN2_N 20.06 83 CSI0_LN2_P 20.04 86 CSI0_LN3_N 18.33 CSI0_LN3_P 18.05 -0.02 85 -0.28 3.21.
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Smart LTE Module Series SC66 Hardware Design used for sensors. It cannot be used for touch panel, NFC, I2C keyboard. SENSOR_I2C_SDA 132 OD I2C data signal of external sensor ALPS_INT 253 DI Interrupt signal of optical sensor MAG_INT 254 DI Interrupt signal of direction sensor (compass) ACCL_INT 252 DI Interrupt signal of acceleration sensor GYRO_INT 255 DI Interrupt signal of gyroscopic sensor HALL_INT 218 DI Interrupt signal of Hall sensor 3.22.
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Smart LTE Module Series SC66 Hardware Design SPK_N 54 AO Speaker negative output HPH_R 51 AO Headphone right channel output HPH_REF 50 AI Headphone reference ground HPH_L 49 AO Headphone left channel output HS_DET 48 AI Headset insertion detection      High level by default. The module offers three audio input channels, including one differential input pair and two single-ended channels. The three sets of MICs are integrated with internal bias voltage.
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Smart LTE Module Series SC66 Hardware Design C4 F1 MIC_ BIAS 100nF R1 MIC_ GND C1 33pF 2 3 0R R2 Module GND OUT 4 MIC3_P 0R 1 VDD GND C2 D1 MEMS-MIC 33pF Figure 29: Reference Circuit Design for MEMS-type Microphone 3.22.2.
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Smart LTE Module Series SC66 Hardware Design 3.22.3. Reference Circuit Design for Headphone Interface R1 MIC_GND 0R MIC2_P F1 HPH_L HS_DET R2 20K F3 HPH_R HPH_REF Module 1 5 4 3 6 2 F2 F4 C3 C4 33pF 33pF 33pF C5 D1 D2 D3 D4 R3 0R ESD Figure 31: Reference Circuit Design for Headphone Interface 3.22.4. Reference Circuit Design for Loudspeaker Interface F1 SPK_P EARP F2 EA SPK_N RN C1 C2 33pF 33pF D1 D2 Module Figure 32: Reference Circuit Design for Loudspeaker Interface 3.
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Smart LTE Module Series SC66 Hardware Design The severity degree of the RF interference in the voice channel during GSM transmitting largely depends on the application design. In some cases, EGSM900 TDD noise is more severe; while in other cases, DCS1800 TDD noise is more obvious. Therefore, a suitable capacitor can be selected based on the test results. Sometimes, even no RF filtering capacitor is required.
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Smart LTE Module Series SC66 Hardware Design 4 Wi-Fi and BT SC66 module provides two shared antenna interface ANT_WIFI/BT and ANT_WIFI_MIMO for Wi-Fi and Bluetooth (BT) functions(SC66-CE and SC66-W just support ANT_WIFI/BT). The interface impedance is 50Ω. External antennas such as PCB antenna, sucker antenna and ceramic antenna can be connected to the module via the interface, so as to achieve Wi-Fi and BT functions. 4.1. Wi-Fi Overview SC66 module supports 2.
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Smart LTE Module Series SC66 Hardware Design 802.11g 54Mbps 14dBm±2.5dB 802.11n HT20 MCS0 15dBm±2.5dB 802.11n HT20 MCS7 13dBm±2.5dB 802.11n HT40 MCS0 14dBm±2.5dB 802.11n HT40 MCS7 13dBm±2.5dB 802.11a 6Mbps 15dBm±2.5dB 802.11a 54Mbps 13dBm±2.5dB 802.11n HT20 MCS0 15dBm±2.5dB 802.11n HT20 MCS7 13dBm±2.5dB 802.11n HT40 MCS0 15dBm±2.5dB 802.11n HT40 MCS7 13dBm±2.5dB 802.11ac VHT20 MCS0 14dBm±2.5dB 802.11ac VHT20 MCS8 13dBm±2.5dB 802.11ac VHT40 MCS0 13dBm±2.5dB 802.
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Smart LTE Module Series SC66 Hardware Design 5GHz 802.11n HT20 MCS7 -72dBm 802.11n HT40 MCS0 -87dBm 802.11n HT40 MCS7 -68dBm 802.11a 6Mbps -90dBm 802.11a 54Mbps -70dBm 802.11n HT20 MCS0 -88dBm 802.11n HT20 MCS7 -69dBm 802.11n HT40 MCS0 -86dBm 802.11n HT40 MCS7 -66dBm 802.11ac VHT20 MCS8 -68dBm 802.11ac VHT40 MCS9 -64dBm 802.11ac VHT80 MCS9 -60dBm Reference specifications are listed below:   IEEE 802.11n WLAN MAC and PHY, October 2009 + IEEE 802.
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Smart LTE Module Series SC66 Hardware Design Table 33: BT Data Rate and Versions Version Data rate Maximum Application 1.2 1Mbit/s > 80Kbit/s 2.0+EDR 3Mbit/s > 80Kbit/s 3.0+HS 24Mbit/s Reference to 3.0+HS 4.0 24Mbit/s Reference to 4.0 LE 5.0 48Mbit/S Reference to 5.0 LE Throughput Comment Reference specifications are listed below:    Bluetooth Radio Frequency TSS and TP Specification 1.2/2.0/2.0 + EDR/2.1/2.1+ EDR/3.0/3.
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Smart LTE Module Series SC66 Hardware Design 5 GNSS SC66 module integrates a Qualcomm IZat™ GNSS engine (Gen 9) which supports multiple positioning and navigation systems including GPS, GLONASS and BeiDou. With an embedded LNA, the module provides greatly improved positioning accuracy. 5.1. GNSS Performance The following table lists the GNSS performance of SC66 module in conduction mode.
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Smart LTE Module Series SC66 Hardware Design 5.2. GNSS RF Design Guidelines Bad design of antenna and layout may cause reduced GNSS receiving sensitivity, longer GNSS positioning time, or reduced positioning accuracy. In order to avoid these, please follow the design rules listed below:      Maximize the distance between the GNSS RF part and the GPRS RF part (including trace routing and antenna layout) to avoid mutual interference.
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Smart LTE Module Series SC66 Hardware Design 6 Antenna Interfaces SC66 provides five antenna interfaces for main antenna, Rx-diversity/MIMO antenna, GNSS antenna, Wi-Fi/BT antenna and WIFI_MIMO antenna. respectively. The antenna ports have an impedance of 50Ω. 6.1. Main/Rx-diversity Antenna Interfaces The pin definition of main/Rx-diversity antenna interfaces is shown below. Table 36: Pin Definition of Main/Rx-diversity Antenna Interfaces Pin Name Pin No.
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Smart LTE Module Series SC66 Hardware Design LTE-FDD B1 2110~2170 1920~1980 MHz LTE-FDD B3 1805~1880 1710~1785 MHz LTE-FDD B5 824~849 869~894 MHz LTE-FDD B8 925~960 880~915 MHz LTE-TDD B34 2010~2025 2010~2025 MHz LTE-TDD B38 2570~2620 2570~2620 MHz LTE-TDD B39 1880~1920 1880~1920 MHz LTE-TDD B40 2300~2400 2300~2400 MHz LTE-TDD B41 1) 2555~2655 2555~2655 MHz Table 38: SC66-A* Module Operating Frequencies 频段下行上行单位 WCDMA B2 1930~1990 1850~1910 MHz WCDMA B4 2110~
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Smart LTE Module Series SC66 Hardware Design LTE-FDD B66 2110~2200 1710~1780 MHz LTE-FDD B71 617~652 663~698 MHz LTE-TDD B41 2) 2496~2690 2496~2690 MHz Table 39: SC66-J* Module Operating Frequencies 频段下行上行单位 WCDMA B1 2110~2170 1920~1980 MHz WCDMA B6 877~883 832~838 MHz WCDMA B8 925~960 880~915 MHz WCDMA B19 877~888 832~843 MHz LTE-FDD B8 925~960 880~915 MHz LTE-FDD B11 1476~1496 1428~1448 MHz LTE-FDD B18 860~875 815~830 MHz LTE-FDD B19 875~890 830~845 MHz
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Smart LTE Module Series SC66 Hardware Design Table 40: SC66-E* Module Operating Frequencies 频段下行上行单位 GSM850 869~894 824~849 MHz EGSM900 925~960 880~915 MHz DCS1800 1805~1880 1710~1785 MHz PCS1900 1930~1990 1850~1910 MHz WCDMA B1 2110~2170 1920~1980 MHz WCDMA B2 1930~1990 1850~1910 MHz WCDMA B4 2110~2155 1710~1755 MHz WCDMA B5 871~892 826~847 MHz WCDMA B8 925~960 880~915 MHz LTE-FDD B1 2110~2170 1920~1980 MHz LTE-FDD B2 1930~1990 1850~1910 MHz LTE-FDD B3 1
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Smart LTE Module Series SC66 Hardware Design NOTE 1) The bandwidth of LTE-TDD B41 for SC66-CE and SC66-J is 120MHz (2535MHz~2655MHz), and the corresponding channel ranges from 40040 to 41240. 2) The bandwidth of LTE-TDD B41 for SC66-A and SC66-E is 200MHz（2496MHZ~2690MHz）, and the corresponding channel ranges from 39650~41589. 6.1.1. Main and Rx-diversity Antenna Interfaces Reference Design A reference circuit design for main and Rx-diversity antenna interfaces is shown as below.
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Smart LTE Module Series SC66 Hardware Design impedance control. The following are reference designs of microstrip line or coplanar waveguide line with different PCB structures.
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Smart LTE Module Series SC66 Hardware Design Figure 38: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 4 as Reference Ground) In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design:      Use impedance simulation tool to control the characteristic impedance of RF traces to 50Ω. The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully connected to ground.
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Smart LTE Module Series SC66 Hardware Design NOTE 1) SC66-CE and SC66-W do not support ANT_WIFI_MIMO Table 42: Wi-Fi/BT Frequency Type Frequency Unit 802.11a/b/g/n/ac 2402~2482 5180~5825 MHz BT5.0 2402~2480 MHz A reference circuit design for Wi-Fi/BT antenna interface is shown as below. A π-type matching circuit is recommended to be reserved for better RF performance. The capacitors are not mounted by default and resistors are 0Ω.
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Smart LTE Module Series SC66 Hardware Design GNSS_LNA_EN 202 DO LNA enable control For test purpose only. If unused, keep it open. Table 44: GNSS Frequency Type Frequency Unit GPS 1575.42±1.023 MHz GLONASS 1597.5~1605.8 MHz BeiDou 1561.098±2.046 MHz 6.3.1. Recommended Circuit for Passive Antenna GNSS antenna interface supports passive ceramic antennas and other types of passive antennas. A reference circuit design is given below.
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Smart LTE Module Series SC66 Hardware Design 6.3.2. Recommended Circuit for Active Antenna The active antenna is powered by a 56nH inductor through the antenna's signal path. The common power supply voltage ranges from 3.3V to 5.0V. Although featuring low power consumption, the active antenna still requires stable and clean power supplies. It is recommended to use high performance LDO as the power supply. A reference design of GNSS active antenna is shown below.
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Smart LTE Module Series SC66 Hardware Design Input Impedance (Ω): 50 Polarization Type: Vertical Cable Insertion Loss: < 1dB Frequency range: 1559MHz~1609MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive Antenna Gain: > 0dBi Active Antenna Noise Figure: < 1.5dB (Typ.) Active Antenna Gain: > -2dBi Active Antenna Embedded LNA Gain: < 17dB (Typ.) Active Antenna Total Gain: < 17dBi (Typ.
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Smart LTE Module Series SC66 Hardware Design Figure 43: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector. Figure 44: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com.
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Smart LTE Module Series SC66 Hardware Design 7 Electrical, Reliability and Radio Characteristics 7.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 46: Absolute Maximum Ratings Parameter Min Max Unit VBAT -0.5 6 V USB_VBUS -0.5 16 V 0 3 A 2.3 V Current on VBAT Voltage on Digital Pins -0.3 7.2.
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Smart LTE Module Series SC66 Hardware Design IVBAT Peak supply current (during transmission slot) Maximum power control level at EGSM900 USB_VBUS VRTC Power supply voltage of backup battery. 1.8 3.0 A 3.6 5.0 10 V 2.0 3.0 3.25 V 7.3. Operation and Storage Temperatures The operation and storage temperatures are listed in the following table. Table 48: Operation and Storage Temperatures Parameter Min Typ.
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Smart LTE Module Series SC66 Hardware Design 7.4. Current Consumption Table 49: SC66-CE* Current Consumption Parameter Description Conditions OFF state Power down 70 uA Sleep (USB disconnected) @DRX=2 4.3 mA Sleep (USB disconnected) @DRX=5 3.4 mA Sleep (USB disconnected) @DRX=9 3.3 mA Sleep (USB disconnected) @DRX=6 3.98 mA Sleep (USB disconnected) @DRX=8 3.2 mA Sleep (USB disconnected) @DRX=9 3.08 mA BC0 CH283 @Slot Cycle Index=1 4.67 mA BC0 CH283 @Slot Cycle Index=7 3.
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Smart LTE Module Series SC66 Hardware Design EGSM900 @PCL 5 280 mA EGSM900 @PCL 12 140 mA EGSM900 @PCL 19 120 mA DCS1800 @PCL 0 200 mA DCS1800 @PCL 7 150 mA DCS1800 @PCL 15 130 mA B1 @max power 600 mA B8 @max power 650 mA EGSM900 (1UL/4DL) @PCL 5 300 mA EGSM900 (2UL/3DL) @PCL 5 460 mA EGSM900 (3UL/2DL) @PCL 5 590 mA EGSM900 (4UL/1DL) @PCL 5 630 mA DCS1800 (1UL/4DL) @PCL 0 220 mA DCS1800 (2UL/3DL) @PCL 0 320 mA DCS1800 (3UL/2DL) @PCL 0 430 mA DCS1800 (4UL/1DL) @P
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Smart LTE Module Series SC66 Hardware Design LTE data transfer LTE-FDD B1 @max power 550 mA LTE-FDD B3 @max power 550 mA LTE-FDD B5 @max power 550 mA LTE-FDD B8 @max power 580 mA LTE-TDD B34 @max power 300 mA LTE-TDD B38 @max power 350 mA LTE-TDD B39 @max power 280 mA LTE-TDD B40 @max power 330 mA LTE-TDD B41 @max power 350 mA Table 50: SC66-A* Current Consumption Param eter Description Conditions Power down OFF state uA Sleep (USB disconnected) @DRX=6 mA Sleep (USB disc
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Smart LTE Module Series SC66 Hardware Design WCDMA data transfer LTE data transfer B2 (HSDPA) @max power mA B4 (HSDPA) @max power mA B5 (HSDPA) @max power mA B2 (HSUPA) @max power mA B4 (HSUPA) @max power mA B5(HSUPA) @max power mA LTE-FDD B2 @max power mA LTE-FDD B4 @max power mA LTE-FDD B5 @max power mA LTE-FDD B7 @max power mA LTE-TDD B12 @max power mA LTE-TDD B13 @max power mA LTE-TDD B14 @max power mA LTE-TDD B17 @max power mA LTE-TDD B25 @max power mA LTE-TDD B26 @max
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Smart LTE Module Series SC66 Hardware Design state WCDMA supply current LTE-FDD supply current LTE-TDD supply current Sleep (USB disconnected) @DRX=6 mA Sleep (USB disconnected) @DRX=8 mA Sleep (USB disconnected) @DRX=9 mA Sleep (USB disconnected) @DRX=6 mA Sleep (USB disconnected) @DRX=8 mA Sleep (USB disconnected) @DRX=9 mA Sleep (USB disconnected) @DRX=6 mA Sleep (USB disconnected) @DRX=8 mA Sleep (USB disconnected) @DRX=9 mA B1 @max power mA B6 @max power mA B8 @max power mA
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Smart LTE Module Series SC66 Hardware Design LTE-FDD B5 @max power mA LTE-FDD B8 @max power mA LTE-FDD B11 @max power mA LTE-FDD B18 @max power mA LTE-TDD B19 @max power mA LTE-TDD B21 @max power mA LTE-TDD B26 @max power mA LTE-TDD B28 @max power mA LTE-TDD B41 @max power mA Table 52: SC66-E* Current Consumption Param eter Description Conditions Power down OFF state uA Sleep (USB disconnected) @DRX=2 mA Sleep (USB disconnected) @DRX=5 mA Sleep (USB disconnected) @DRX=9 mA Sle
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Smart LTE Module Series SC66 Hardware Design LTE-TDD supply current Sleep (USB disconnected) @DRX=6 mA Sleep (USB disconnected) @DRX=8 mA Sleep (USB disconnected) @DRX=9 mA GSM850 @PCL 5 mA GSM850 @PCL 12 mA GSM850 @PCL 19 mA EGSM900 @PCL 5 mA EGSM900 @PCL 12 mA EGSM900 @PCL 19 mA DCS1800 @PCL 0 mA DCS1800 @PCL 7 mA DCS1800 @PCL 15 mA PCS1900 @PCL 0 mA PCS1900 @PCL 7 mA PCS1900 @PCL 15 mA B1 @max power mA B2 @max power mA B4 @max power mA B5 @max power mA B8 @max powe
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Smart LTE Module Series SC66 Hardware Design EGSM900 (2UL/3DL) @PCL 5 mA EGSM900 (3UL/2DL) @PCL 5 mA EGSM900 (4UL/1DL) @PCL 5 mA DCS1800 (1UL/4DL) @PCL 0 mA DCS1800 (2UL/3DL) @PCL 0 mA DCS1800 (3UL/2DL) @PCL 0 mA DCS1800 (4UL/1DL) @PCL 0 mA PCS1900 (1UL/4DL) @PCL 0 mA PCS1900 (2UL/3DL) @PCL 0 mA PCS1900 (3UL/2DL) @PCL 0 mA PCS1900 (4UL/1DL) @PCL 0 mA GSM850 (1UL/4DL) @PCL 8 mA GSM850 (2UL/3DL) @PCL 8 mA GSM850 (3UL/2DL) @PCL 8 mA GSM850 (4UL/1DL) @PCL 8 mA EGSM900 (1UL/4DL) @P
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Smart LTE Module Series SC66 Hardware Design WCDMA data transfer PCS1900 (3UL/2DL) @PCL 2 mA PCS1900 (4UL/1DL) @PCL 2 mA B1 (HSDPA) @max power mA B2 (HSDPA) @max power mA B4 (HSDPA) @max power mA B5 (HSDPA) @max power mA B8 (HSDPA) @max power mA B1 (HSUPA) @max power mA B2 (HSUPA) @max power mA B4 (HSUPA) @max power mA B5 (HSUPA) @max power mA B8 (HSUPA) @max power mA LTE-FDD B1 @max power mA LTE-FDD B2 @max power mA LTE-FDD B3 @max power mA LTE-FDD B4 @max power mA LTE-FDD
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Smart LTE Module Series SC66 Hardware Design 7.5. RF Output Power The following table shows the RF output power of SC66 module.
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Smart LTE Module Series SC66 Hardware Design WCDMA B5 24dBm+1/-3dB <-49dBm LTE-FDD B2 23dBm±2dB <-39dBm LTE-FDD B4 23dBm±2dB <-39dBm LTE-FDD B5 23dBm±2dB <-39dBm LTE-FDD B7 23dBm±2dB <-39dBm LTE-FDD B12 23dBm±2dB <-39dBm LTE-FDD B13 23dBm±2dB <-39dBm LTE-FDD B14 23dBm±2dB <-39dBm LTE-FDD B17 23dBm±2dB <-39dBm LTE-FDD B25 23dBm±2dB <-39dBm LTE-FDD B66 23dBm±2dB <-39dBm LTE-TDD B71 23dBm±2dB <-39dBm LTE-TDD B41 23dBm±2dB <-39dBm Frequency Max Min WCDMA B1 24dBm+1/-3
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Smart LTE Module Series SC66 Hardware Design LTE-FDD B11 23dBm±2dB <-39dBm LTE-FDD B18 23dBm±2dB <-39dBm LTE-FDD B19 23dBm±2dB <-39dBm LTE-FDD B21 23dBm±2dB <-39dBm LTE-TDD B26 23dBm±2dB <-39dBm LTE-TDD B28 23dBm±2dB <-39dBm LTE-TDD B41 23dBm±2dB <-39dBm Frequency Max Min GSM850 33dBm±2dB 5dBm±5dB EGSM900 33dBm±2dB 5dBm±5dB DCS1800 30dBm±2dB 0dBm±5dB PCS1900 30dBm±2dB 0dBm±5dB WCDMA B1 24dBm+1/-3dB <-49dBm WCDMA B2 24dBm+1/-3dB <-49dBm WCDMA B4 24dBm+1/-3dB <-49d
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Smart LTE Module Series SC66 Hardware Design LTE-FDD B7 23dBm±2dB <-39dBm LTE-FDD B8 23dBm±2dB <-39dBm LTE-FDD B20 23dBm±2dB <-39dBm LTE-FDD B28 23dBm±2dB <-39dBm LTE-TDD B38 23dBm±2dB <-39dBm LTE-TDD B39 23dBm±2dB <-39dBm LTE-TDD B40 23dBm±2dB <-39dBm LTE-TDD B41 23dBm±2dB <-39dBm In GPRS 4 slots TX mode, the maximum output power is reduced by 3dB. This design conforms to the GSM specification as described in Chapter 13.16 of 3GPP TS 51.010-1. 7.6.
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Smart LTE Module Series SC66 Hardware Design TD-SCDMA B34 -109dBm / / -108dBm TD-SCDMA B39 -109dBm / / -108dBm LTE-FDD B1 (10M) -98dBm -98.5dBm -101.2dBm -96.3dBm LTE-FDD B3 (10M) -98dBm -98.5dBm -101.2dBm -93.3dBm LTE-FDD B5 (10M) -98dBm -99dBm -101.5dBm -94.3dBm LTE-FDD B8 (10M) -98dBm -99dBm -101.5dBm -93.3dBm LTE-TDD B34 (10M) -98dBm -98dBm -101dBm -96.3dBm LTE-TDD B38 (10M) -97.5dBm -98dBm -100.5dBm -96.3dBm LTE-TDD B39 (10M) -98dBm -98dBm -101dBm -96.
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Smart LTE Module Series SC66 Hardware Design LTE-FDD B25 (10M) / / / -92.8dBm LTE-FDD B66 (10M) / / / -95.8dBm LTE-TDD B71 (10M) / / / -93.5dBm LTE-TDD B41 (10M) / / / -94.3dBm Table 59: SC66-J* RF Receiving Sensitivity Frequency Receive Sensitivity (Typ.) 3GPP (SIMO) Primary Diversity SIMO WCDMA B1 / / / -106.7dBm WCDMA B6 / / / -106.7dBm WCDMA B8 / / / -103.7dBm WCDMA B19 / / / -106.7dBm LTE-FDD B1 (10M) / / / -96.3dBm LTE-FDD B3 (10M) / / / -93.
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Smart LTE Module Series SC66 Hardware Design Table 60: SC66-E* RF Receiving Sensitivity Frequency Receive Sensitivity (Typ.) 3GPP (SIMO) Primary Diversity SIMO GSM850 / / / -102.4dBm EGSM900 / / / -102.4dBm DCS1800 / / / -102.4dBm PCS1900 / / / -102.4dBm WCDMA B1 / / / -106.7dBm WCDMA B2 / / / -104.7dBm WCDMA B4 / / / -106.7dBm WCDMA B5 / / / -104.7dBm WCDMA B8 / / / -103.7dBm LTE-FDD B1 (10M) / / / -96.3dBm LTE-FDD B2 (10M) / / / -94.
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Smart LTE Module Series SC66 Hardware Design 7.7. Electrostatic Discharge The module is not protected against electrostatic discharge (ESD) in general. Consequently, it should be subject to ESD handling precautions that are typically applied to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module.
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Smart LTE Module Series SC66 Hardware Design 8 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the tolerances for dimensions without tolerance values are ±0.05mm. 8.1.
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Smart LTE Module Series SC66 Hardware Design Figure 46: Module Bottom Dimensions (Top View) SC66_Hardware_Design 125 / 118
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Smart LTE Module Series SC66 Hardware Design 8.2. Recommended Footprint Figure 47: Recommended Footprint (Top View) NOTES 1. 2. For easy maintenance of the module, keep about 3mm between the module and other components on host PCB. All RESERVED pins should be kept open and MUST NOT be connected to ground.
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Smart LTE Module Series SC66 Hardware Design 8.3. Top and Bottom View of the Module Figure 48: Top View of the Module Figure 49: Bottom View of the Module NOTE These are renderings of SC66 module. For authentic dimension and appearance, please refer to the module that you receive from Quectel.
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Smart LTE Module Series SC66 Hardware Design 9 Storage, Manufacturing and Packaging 9.1. Storage SC66 is stored in a vacuum-sealed bag. It is rated at MSL 3, and its storage restrictions are shown as below. 1. Shelf life in the vacuum-sealed bag: 12 months at <40ºC/90%RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be:   Mounted within 168 hours at the factory environment of ≤30ºC/60%RH. Stored at <10%RH. 3.
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Smart LTE Module Series SC66 Hardware Design 9.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.18mm~0.20mm.
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Smart LTE Module Series SC66 Hardware Design Reflow Zone Max slope 2 to 3°C/sec Reflow time (D: over 220°C) 40 to 60 sec Max temperature 240°C ~ 245°C Cooling down slope 1 to 4°C/sec Reflow Cycle Max reflow cycle 1 9.3. Packaging SC66 is packaged in tape and reel carriers. Each reel is 330mm in diameter and contains 200 modules. The following figures show the package details, measured in mm.
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Smart LTE Module Series SC66 Hardware Design Figure 52: Reel Dimensions Table 63: Reel Packaging Model Name SC66 MOQ for MP Minimum Package: 200pcs Minimum Package×4=800pcs 200 Size: 398mm × 383mm × 83mm N.W: 1.92kg G.W: 3.67kg Size: 420mm × 350mm × 405mm N.W: 8.18kg G.W: 15.
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Smart LTE Module Series SC66 Hardware Design 10 Appendix A References Table 64: Related Documents SN Document Name Remark [1] Quectel_Smart_EVB-G2_User_Guide EVB User Guide for SC66 [2] Quectel_SC66_GPIO_Configuration GPIO Configuration of SC66 [3] Quectel_RF_Layout_Application_Note RF Layout Application Note [4] Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide [5] Quectel_SC66_Reference_Design Reference Design for SC66 Table 65: Terms and Abbreviations Abbreviation
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Smart LTE Module Series SC66 Hardware Design GMSK Gaussian Minimum Shift Keying GPS Global Positioning System GPU Graphics Processing Unit GSM Global System for Mobile Communications HR Half Rate HSDPA High Speed Down Link Packet Access HSPA High Speed Packet Access I/O Input/Output IQ Inphase and Quadrature LCD Liquid Crystal Display LCM LCD Module LED Light Emitting Diode LNA Low Noise Amplifier LRA Linear Resonant Actuator MIPI Mobile Industry Processor Interface PCB Print
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Smart LTE Module Series SC66 Hardware Design RTC Real Time Clock Rx Receive SMS Short Message Service TE Terminal Equipment TX Transmitting Direction UART Universal Asynchronous Receiver & Transmitter UMTS Universal Mobile Telecommunications System (U)SIM (Universal) Subscriber Identity Module Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value VI Voltage Input VIHmin Minimum Input High Level Voltage Value VILmax Maximum Input Low Level Voltage Value
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Smart LTE Module Series SC66 Hardware Design 11 Appendix B GPRS Coding Schemes Table 66: Description of Different Coding Schemes Scheme CS-1 CS-2 CS-3 CS-4 Code Rate 1/2 2/3 3/4 1 USF 3 3 3 3 Pre-coded USF 3 6 6 12 Radio Block excl.USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 - Coded Bits 456 588 676 456 Punctured Bits 0 132 220 - Data Rate Kb/s 9.05 13.4 15.6 21.
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Smart LTE Module Series SC66 Hardware Design 12 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots.
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Smart LTE Module Series SC66 Hardware Design 15 5 5 NA 16 6 6 NA 17 7 7 NA 18 8 8 NA 19 6 2 NA 20 6 3 NA 21 6 4 NA 22 6 4 NA 23 6 6 NA 24 8 2 NA 25 8 3 NA 26 8 4 NA 27 8 4 NA 28 8 6 NA 29 8 8 NA 30 5 1 6 31 5 2 6 32 5 3 6 33 5 4 6 SC66_Hardware_Design 137 / 118
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Smart LTE Module Series SC66 Hardware Design 13 Appendix D EDGE Modulation and Coding Schemes Table 68: EDGE Modulation and Coding Schemes Coding Schemes Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot CS-1: GMSK / 9.05kbps 18.1kbps 36.2kbps CS-2: GMSK / 13.4kbps 26.8kbps 53.6kbps CS-3: GMSK / 15.6kbps 31.2kbps 62.4kbps CS-4: GMSK / 21.4kbps 42.8kbps 85.6kbps MCS-1 GMSK C 8.80kbps 17.60kbps 35.20kbps MCS-2 GMSK B 11.2kbps 22.4kbps 44.