Product Info
Automotive Module Series
AG35 Hardware Design
AG35_Hardware_Design 61 / 129
SD Card Connector
DAT2
CD/DAT3
CMD
VDD
CLK
VSS
DAT0
DAT1
DETECTIVE
Module
SDC2_DATA3
SDC2_DATA2
SDC2_DATA1
VDD_SDIO
SDC2_DATA0
SDC2_CLK
SDC2_CMD
SD_INS_DET
R1 0R
R7
NM
R8
NM
R9
NM
R10
NM
R11
NM
R12
470K
VDD_EXTVDD_3V
R2 0R
R3 0R
R4 0R
R5 0R
R6 0R
C2
NM
D2
C3
NM
D3
C4
NM
D4
C5
NM
D5
C6
NM
D6
C1
NM
D1
C7
D7
33pF
C8C9
100pF100nF
C10
100uF
Figure 28: Reference Circuit of SD Card Application
Please follow the principles below in the SD card circuit design:
The voltage range of SD card power supply VDD_3V is 2.7~3.6V and a sufficient current up to 0.8A
should be provided. As the maximum output current of VDD_SDIO is 50mA which can only be used
for SDIO pull-up resistors, an externally power supply is needed for SD card.
To avoid jitter of bus, resistors R7~R11 are needed to pull up the SDIO to VDD_SDIO. Value of these
resistors is among 10~100kohm and the recommended value is 100kohm.
In order to improve signal quality, it is recommended to add 0Ω resistors R1~R6 in series between
the module and the SD card. The bypass capacitors C1~C6 are reserved and not mounted by default.
All resistors and bypass capacitors should be placed close to the module.
In order to offer good ESD protection, it is recommended to add TVS with capacitance value less
than 2pF on SD card pins.
It is important to route the SDIO signal traces with total grounding. The impedance of SDIO data
trace is 50Ω (±10%).
Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals,
etc., as well as noisy signals such as clock signals, DCDC signals, etc.
It is recommended to keep the trace length difference between CLK and DATA/CMD less than 1mm
and the total routing length less than 50mm. The total trace length inside the module is 23mm, so the
exterior total trace length should be less than 27mm.
Make sure the adjacent trace spacing is two times of the trace width and the load capacitance of
SDIO bus should be less than 40pF.