Product Info

LTE Module Series
EC25 Hardware Design
EC25_Hardware_Design 55 / 112
Figure 21: Reference Circuit with Transistor Circuit
Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps.
3.12. PCM and I2C Interfaces
EC25 provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the
following modes and one I2C interface:
 Primary mode (short frame synchronization, works as both master and slave)
 Auxiliary mode (long frame synchronization, works as master only)
In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports
256kHz, 512kHz, 1024kHz or 2048kHz PCM_CLK at 8kHz PCM_SYNC, and also supports 4096kHz
PCM_CLK at 16kHz PCM_SYNC.
In auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC rising edge represents the MSB. In this mode, the PCM interface operates with a
256kHz, 512kHz, 1024kHz or 2048kHz PCM_CLK and an 8kHz, 50% duty cycle PCM_SYNC.
EC25 supports 16-bit linear data format. The following figures show the primary mode’s timing
relationship with 8KHz PCM_SYNC and 2048KHz PCM_CLK, as well as the auxiliary mode’s timing
relationship with 8KHz PCM_SYNC and 256KHz PCM_CLK.
NOTE