Product Info

Smart LTE Module Series
SC650T Hardware Design
SC650T_Hardware_Design 61 / 131
FP_SPI_CLK
250
DO
Clock signal of SPI interface
multiplexed into I2S
interface.
FP_SPI_MOSI
249
DO
Master out slave in of SPI interface
FP_SPI_MISO
251
DI
Master in salve out of SPI interface
3.17. ADC Interfaces
SC650T provides two analog-to-digital converter (ADC) interfaces, and the pin definition is shown below.
Table 18: Pin Definition of ADC Interfaces
Pin Name
Pin No.
I/O Description
Comment
PMU_MPP4
152
AI
General purpose ADC
interface
Maximum input voltage: 1.7V.
PMU_MPP2
151
AI
General purpose ADC
interface
Maximum input voltage: 1.7V.
The resolution of the ADC is up to 15 bits.
3.18. Vibrator Drive Interface
The pin definition of vibrator drive interface is listed below.
Table 19: Pin Definition of Vibrator Drive Interface
Pin Name
Pin No
I/O Description
Comment
VIB_DRV
161
AO
Vibrator drive (positive)
Connected to the positive
terminal of vibrator.
The Vibrator is driven by an exclusive circuit, and a reference circuit design is shown below.