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Smart LTE Module Series
SC650T Hardware Design
SC650T_Hardware_Design 78 / 131
3.23.3. Reference Circuit Design for Headphone Interface
0R
ESD
MIC_BIAS2
AMIC2_P
HPH_L
HS_DET
HPH_R
HPH_REF
680pF
Module
R6
0R
3
6
4
5
2
1
680pF
C3
C4
F3
F2
D1 D2 D3
D4
F4
R2
AMIC2_M
NC
R4
R5
NC
F1
R1
2.2K %1
100pF
C2
33pF
C2
33pF
C2
0R
R7
D5
Figure 29: Reference Circuit Design for Headphone Interface
3.23.4. Reference Circuit Design for Loudspeaker Interface
EARP
EA
RN
SPK_P
SPK_N
8.2pF
8.2pF
C1
C2
WSA8810&WSA8815
D1 D2
GND
VPH_PWR
LDO5_1P8
WSA_EN
PDM_CLK
PDM_DATA
EARP
EA
RN
Module
GND
VPH_PWR
LDO5_1P8
WSA_EN
PDM_CLK
PDM_DATA
F2
F1
12V 12V
Figure 30: Reference Circuit Design for Loudspeaker Interface
3.23.5. Audio Interfaces Design Considerations
It is recommended to use the electret microphone with dual built-in capacitors (e.g. 10pF and 33pF) for
filtering out RF interference, thus reducing TDD noise. The 33pF capacitor is applied for filtering out RF
interference when the module is transmitting at EGSM900. Without placing this capacitor, TDD noise
could be heard. The 10pF capacitor here is used for filtering out RF interference at DCS1800. Please note