AF50T Hardware Design Wi-Fi&BT Module Series Version: 1.0.1 Date: 2020-12-17 Status: Preliminary www.quectel.
Wi-Fi&BT Module Series AF50T Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://www.quectel.com/support/sales.htm.
Wi-Fi&BT Module Series AF50T Hardware Design Copyright The information contained here is proprietary technical information of Quectel wireless solutions co., ltd. Transmitting, reproducing, disseminating and editing this document as well as using the content without permission are forbidden. Offenders will be held liable for payment of damages. All rights are reserved in the event of a patent grant or registration of a utility model or design. Copyright © Quectel Wireless Solutions Co., Ltd. 2020.
Wi-Fi&BT Module Series AF50T Hardware Design About the Document Revision History Version Date Author Description - 2019-11-25 Jone CHEN/ Felix FU Creation of the document 1.0.0 2019-11-25 Jone CHEN/ Felix FU Preliminary Preliminary: 1. Updated the key features (Table 1). 2. Changed the name of pin 48, pin 60, pin 61, pin 3, pin 21 and pin 65 to RESERVED, pin 22 from BT_DBG_RXD to BT_WAKEUP_HOST, pin 23 from 1.0.1 2020-12-17 Jone CHEN/ Michael DU 3. 4. 5. 6. 7. 8. 9.
Wi-Fi&BT Module Series AF50T Hardware Design Contents About the Document .................................................................................................................................. 3 Contents ...................................................................................................................................................... 4 Table Index ...................................................................................................................................
Wi-Fi&BT Module Series AF50T Hardware Design 4.2. 4.3. 4.4. 4.5. Electrical Characteristics.......................................................................................................... 34 I/O Interface Characteristics .................................................................................................... 35 Current Consumption ............................................................................................................... 36 RF Performances ........................
Wi-Fi&BT Module Series AF50T Hardware Design Table Index Table 1: Key Features ................................................................................................................................ 10 Table 2: I/O Parameters Definition ............................................................................................................. 15 Table 3: Pin Description .............................................................................................................................
Wi-Fi&BT Module Series AF50T Hardware Design Figure Index Figure 1: Functional Diagram of AF50T Module ........................................................................................ 12 Figure 2: Pin Assignment (Top View) ......................................................................................................... 14 Figure 3: Reference Circuit for VDD_CORE_VL, VDD_CORE_VM, VDD_CORE_VH, and VDD_IO ..... 19 Figure 4: Reference Circuit for VDD_RF .........................................
Wi-Fi&BT Module Series AF50T Hardware Design 1 Introduction This document defines the AF50T module and describes its air interface and hardware interfaces which are connected with customers’ applications. The document helps customers quickly understand module interface specifications, as well as the electrical and mechanical details. Associated with application notes and user guides, customers can use AF50T module to design and set up automotive industry mobile applications easily.
Wi-Fi&BT Module Series AF50T Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product.
Wi-Fi&BT Module Series AF50T Hardware Design 2 Product Concept 2.1. General Description AF50T is an automotive grade Wi-Fi and Bluetooth (BT) module with low power consumption. It is a single-die WLAN (Wireless Local Area Network) and BT combo solution supporting IEEE 802.11 a/b/g/n/ac/ax 2.4/5 GHz WLAN standards and BT5.1 standard, which enables seamless integration of WLAN and BT Low Energy technologies.
Wi-Fi&BT Module Series AF50T Hardware Design 2.4 GHz 802.11b/11 Mbps: 20 dBm 802.11g/54 Mbps: 16 dBm 802.11n/HT20 MCS7: 16 dBm 802.11n/HT40 MCS7: 16 dBm 802.11ax/HE20 MCS11: 14 dBm 802.11ax/HE40 MCS11: 14 dBm Transmitting Power 5 GHz 802.11a/54 Mbps: 15 dBm 802.11n/HT20 MCS7: 15 dBm 802.11n/HT40 MCS7: 15 dBm 802.11ac/VHT20 MCS8: 14 dBm 802.11ac/VHT40 MCS9: 13 dBm 802.11ac/VHT80 MCS9: 13 dBm 802.11ax/HE20 MCS11: 12 dBm 802.11ax/HE40 MCS11: 12 dBm 802.
Wi-Fi&BT Module Series AF50T Hardware Design 2.3. Functional Diagram The following figure shows a block diagram of AF50T module. Figure 1: Functional Diagram of AF50T Module 2.4. Evaluation Board To help customers develop applications with AF50T module conveniently, Quectel supplies the evaluation board (EVB), USB to RS232 converter cable, USB data cable, power adapter, antenna and other peripherals to control or test the module. For more details, see document [1] and/or document [2].
Wi-Fi&BT Module Series AF50T Hardware Design 3 Application Interfaces 3.1. General Description AF50T module is equipped with 108 LGA pins that can be connected to the cellular application platform.
Wi-Fi&BT Module Series AF50T Hardware Design 3.2.
Wi-Fi&BT Module Series AF50T Hardware Design 3.3. Pin Description The following tables show the pin description of AF50T module. Table 2: I/O Parameters Definition Type Description AI Analog Input AO Analog Output DI Digital Input DO Digital Output IO Bidirectional PI Power Input Table 3: Pin Description Power Supply Pin Name Pin No. VDD_CORE_ VL 1, 2, 47 VDD_CORE_ VM VDD_CORE_ VH 45 46 I/O Description DC Characteristics Comment PI Voltage for core, low voltage Vmin = 0.
Wi-Fi&BT Module Series AF50T Hardware Design WLAN Interface Pin Name Pin No. I/O Description DC Characteristics Comment VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V 1.8 V power domain. Active high.
Wi-Fi&BT Module Series AF50T Hardware Design PCM_CLK* 37 DI PCM clock VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V PCM_DOUT* 36 DO PCM data output VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. BT_RTS 77 DO BT UART request to send VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. BT_CTS 38 DI BT UART clear to send VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.
Wi-Fi&BT Module Series AF50T Hardware Design WLAN FEM during WLAN sleep mode LAA_TXEN* LAA_RX* WLAN_TXEN* PA_MUTE* 41 81 42 80 VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V If unused, keep this pin open. WLAN XFEM control LAA TX enable VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V 1.8 V power domain. If unused, keep this pin open. DI WLAN XFEM control for LAA receiver VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V 1.8 V power domain.
Wi-Fi&BT Module Series AF50T Hardware Design NOTES 1. 2. Please keep all RESERVED and unused pins open. “*” means under development. 3.4. Power Supply The following table shows the power supply pins and ground pins of AF50T module. Table 4: Definition of Power Supply and GND Pins Pin Name Pin No. Description Min. Typ. Max. Unit VDD_ CORE_VL 1, 2, 47 Voltage for core, low voltage 0.9 0.95 1.05 V VDD_ CORE_VM 45 Voltage for core, mid voltage 1.28 1.35 1.
Wi-Fi&BT Module Series AF50T Hardware Design AF50T module is powered by VDD_RF, and it is recommended to use a power supply chip, which is able to output a current of 1.3 A at least. The following figure shows a reference design for VDD_RF which is controlled by WLAN_PWR_EN1 of AG55xQ series. WLAN_PWR_EN1 of TPS62130A-Q1 should be connected to the pin 222 (WLAN_PWR_EN1) of AG55xQ series module. For more details, see document [3]. Figure 4: Reference Circuit for VDD_RF 3.5.
Wi-Fi&BT Module Series AF50T Hardware Design 3.5.1. WLAN_EN WLAN_EN is used to control the WLAN function of AF50T module. WLAN function will be enabled when WLAN_EN is at high level. Table 5: Pin Definition of WLAN_EN Pin Name Pin No. I/O Description Comment WLAN_EN 84 DI WLAN function enable control Active high NOTE WLAN_EN is a sensitive signal, and it should be ground shielded and be routed as close to AF50T as possible. 3.5.2.
Wi-Fi&BT Module Series AF50T Hardware Design Figure 6: PCIe Interface Connection To ensure the signal integrity of PCIe interface, C1 and C2 should be placed close to the AG55xQ series module, and C3 and C4 should be placed close to the AF50T. The extra stubs of traces must be as short as possible. The following principles of PCIe interface design should be complied with, so as to meet PCIe Gen2 specifications.
Wi-Fi&BT Module Series AF50T Hardware Design If BT function of AF50T module is used, the UART and PCM interfaces of AF50T must be connected to that of AG55xQ series module. Figure 7: Block Diagram of BT Interface Connection 3.6.1. BT_EN BT_EN is used to control the BT function of AF50T module. BT function will be enabled when BT_EN is at high level. Table 7: Pin Definition of BT_EN Pin Name Pin No. I/O Description Comment BT_EN 83 DI BT enable control Active high. 3.6.2.
Wi-Fi&BT Module Series AF50T Hardware Design Figure 8: PCM Interface Connection NOTE “*” means BT PCM interface of AF50T is still under development. 3.6.3. UART Interface The following table shows the pin definition of UART interface. Table 9: Pin Definition of UART Interface Pin Name Pin No. I/O Description Comment BT_RTS 77 DO BT UART request to send 1.8 V power domain BT_CTS 38 DI BT UART clear to send 1.8 V power domain BT_TXD 39 DO BT UART transmit 1.
Wi-Fi&BT Module Series AF50T Hardware Design BT_TXD BT_UART_RXD BT_RXD BT_UART_TXD AG55xQ series AF50T BT_RTS BT_UART_RTS BT_CTS BT_UART_CTS Figure 9: UART Interface Connection 3.7. Control Signal Pins* 3.7.1. SW_CTRL The following table shows the pin definition of SW_CTRL. Table 10: Pin Definition of SW_CTRL Pin Name Pin No. I/O Description Comment SW_CTRL 57 DO Control PMIC outputs Active high. Under development.
Wi-Fi&BT Module Series AF50T Hardware Design These two pins are only used for AF50T + third-part host application. For AF50T + AG55xQ series application, they are not needed. Table 11: Pin Definition of HOST_WAKEUP_BT and BT_WAKEUP_HOST Pin Name Pin No. I/O Description Comment HOST_WAKEUP_BT 23 DI Host wakes up BT 1.8 V power domain. Under development. BT_WAKEUP_HOST 22 DO BT wakes up the host 1.8 V power domain. Under development. NOTE “*” means under development. 3.8.
Wi-Fi&BT Module Series AF50T Hardware Design 3.8.2. Other Coexistence Interfaces* The following table shows the pin definition of other coexistence interfaces. Table 13: Pin Definition of Other Coexistence Interface Pin Name Pin No. I/O Description Comment LAA_AS_EN 82 DI Allow LAA to control WLAN FEM during WLAN sleep mode If unused, keep this pin open. LAA_TXEN 41 DI WLAN XFEM control LAA TX enable If unused, keep this pin open.
Wi-Fi&BT Module Series AF50T Hardware Design 3.10. RF Antenna Interfaces The following table shows the pin definition of RF antenna interfaces. Table 15: Pin Definition of RF Antenna Interfaces Pin Name Pin No. I/O Description Comment ANT_WIFI0 28 IO BT and 2.4/5 GHz WLAN antenna interface 0 50 Ω impedance ANT_WIFI1 33 IO 2.4/5 GHz WLAN antenna interface 1 50 Ω impedance ANT_BT 25 IO Reserved dedicated BT antenna interface 50 Ω impedance 3.10.1.
Wi-Fi&BT Module Series AF50T Hardware Design Figure 12: Reference Circuit for RF Antenna Interfaces 3.10.3. Reference Design of RF Layout For user’s PCB, the characteristic impedance of all RF traces should be controlled to 50 Ω. The impedance of the RF traces is usually determined by the trace width (W), the materials’ dielectric constant, the height from the reference ground to the signal layer (H), and the spacing between RF traces and grounds (S).
Wi-Fi&BT Module Series AF50T Hardware Design Figure 15: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 16: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) To ensure RF performance and reliability, the following principles should be complied with in RF layout design: Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 Ω.
Wi-Fi&BT Module Series AF50T Hardware Design 3.10.4. Antenna Requirements The following tables show the requirements on antenna cables and antennas. Table 17: Antenna Cable Requirements Type Requirements 2.412–2.472 GHz Cable insertion loss <1 dB 5.180–5.825 GHz Cable insertion loss <1 dB Table 18: Antenna Requirements Type Requirements Frequency Range 2.412–2.472 GHz 5.180–5.
Wi-Fi&BT Module Series AF50T Hardware Design 3.10.5. Recommended RF Connector for Antenna Installation If RF connector is used for antenna connection, it is recommended to use U.FL-R-SMT connector provided by Hirose. Figure 17: Dimensions of the U.FL-R-SMT Connector (Unit: mm) U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 18: Mechanicals of UF.
Wi-Fi&BT Module Series AF50T Hardware Design The following figure describes the space factor of mated connector Figure 19: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com.
Wi-Fi&BT Module Series AF50T Hardware Design 4 Reliability, Radio and Electrical Characteristics 4.1. General Description This chapter mainly introduces electrical and radio frequency characteristics of AF50T module. The details are listed in the subsequent chapters. 4.2. Electrical Characteristics The following table shows the absolute maximum ratings. Table 19: Absolute Maximum Ratings Parameter Min. Max. Unit VDD_CORE_VL -0.3 VDDX + 0.2 V VDD_CORE_VM -0.3 VDDX + 0.2 V VDD_CORE_VH -0.
Wi-Fi&BT Module Series AF50T Hardware Design The following table shows the recommended operating conditions of AF50T module. Table 20: Recommended Operating Conditions Parameter Min. Typ. Max. Unit VDD_CORE_VL 0.9 0.95 1.05 V VDD_CORE_VM 1.28 1.35 1.42 V VDD_CORE_VH 1.85 1.9 2.0 V VDD_IO 1.71 1.8 1.89 V VDD_RF 3.3 3.85 4.25 V 4.3.
Wi-Fi&BT Module Series AF50T Hardware Design 4.4. Current Consumption The values of current consumption are shown as below. Table 22: Current Consumption of the Module (Normal Operation) Description IVDD_ IVDD_ IVDD_ CORE_VL CORE_VM CORE_VH TX 1 Mbps @ 20 dBm 217.67 108.08 TX 11 Mbps @ 20 dBm 233.00 TX 6 Mbps @ 19 dBm Conditions IVDD_IO IVDD_RF Unit 68.87 3.54 264.02 mA 105.72 67.09 3.57 241.41 mA 213.63 108.56 69.03 3.57 260.45 mA TX 54 Mbps @ 16 dBm 210.15 104.86 66.
Wi-Fi&BT Module Series AF50T Hardware Design (2.4 GHz) 802.11ax (5 GHz) TX HE20-MCS11 @ 14 dBm 222.32 131.51 68.60 3.57 222.00 mA TX HE40-MCS0 @ 19 dBm 237.86 133.69 69.10 3.58 269.26 mA TX HE40-MCS11 @ 14 dBm 238.90 133.92 68.70 3.58 224.56 mA TX HE20-MCS0 @ 17 dBm 235.56 138.64 77.94 3.78 251.82 mA TX HE20-MCS11 @ 12 dBm 234.59 138.54 77.64 3.79 199.67 mA TX HE40-MCS0 @ 17 dBm 248.84 140.28 78.11 3.79 252.54 mA TX HE40-MCS11 @ 12 dBm 248.43 139.83 77.72 3.
Wi-Fi&BT Module Series AF50T Hardware Design 802.11ax, HE20 @ MCS11 12 14 16 dBm 802.11ax, HE40 @ MCS0 17 19 21 dBm 802.11ax, HE40 @ MCS11 12 14 16 dBm Table 24: Conducted RF Output Power at 2.4 GHz (MIMO) Frequency Min. Typ. Max. Unit 802.11n, HT20 @ MCS0 20 22 24 dBm 802.11n, HT20 @ MCS7 17 19 21 dBm 802.11n, HT40 @ MCS0 20 22 24 dBm 802.11n, HT40 @ MCS7 17 19 21 dBm 802.11ax, HE20 @ MCS0 20 22 24 dBm 802.11ax, HE20 @ MCS11 15 17 19 dBm 802.
Wi-Fi&BT Module Series AF50T Hardware Design 802.11ac, VHT40 @ MCS0 15 17 19 dBm 802.11ac, VHT40 @ MCS9 11 13 15 dBm 802.11ac, VHT80 @ MCS0 15 17 19 dBm 802.11ac, VHT80 @ MCS9 11 13 15 dBm 802.11ax, HE20 @ MCS0 15 17 19 dBm 802.11ax, HE20 @ MCS11 10 12 14 dBm 802.11ax, HE40 @ MCS0 15 17 19 dBm 802.11ax, HE40 @ MCS11 10 12 14 dBm 802.11ax, HE80 @ MCS0 15 17 19 dBm 802.
Wi-Fi&BT Module Series AF50T Hardware Design 802.11ax, HE40 @ MCS0 18 20 22 dBm 802.11ax, HE40 @ MCS11 13 15 17 dBm 802.11ax, HE80 @ MCS0 18 20 22 dBm 802.11ax, HE80 @ MCS11 13 15 17 dBm Table 27: Conducted RF Receiving Sensitivity at 2.4 GHz Frequency Receiving Sensitivity (Typ.) 802.11b @ 1 Mbps -96 dBm 802.11b @ 11 Mbps -87 dBm 802.11g @ 6 Mbps -92 dBm 802.11g @ 54 Mbps -74 dBm 802.11n, HT20 @ MCS0 -92 dBm 802.11n, HT20 @ MCS7 -73 dBm 802.11n, HT40 @ MCS0 -89 dBm 802.
Wi-Fi&BT Module Series AF50T Hardware Design 802.11n, HT20 @ MCS7 -74 dBm 802.11n, HT40 @ MCS0 -90 dBm 802.11n, HT40 @ MCS7 -72 dBm 802.11ac, VHT20 @ MCS0 -93 dBm 802.11ac, VHT20 @ MCS8 -71 dBm 802.11ac, VHT40 @ MCS0 -90 dBm 802.11ac, VHT40 @ MCS9 -67 dBm 802.11ac, VHT80 @ MCS0 -87 dBm 802.11ac, VHT80 @ MCS9 -62 dBm 802.11ax, HE20 @ MCS0 -93 dBm 802.11ax, HE20 @ MCS11 -63 dBm 802.11ax, HE40 @ MCS0 -90 dBm 802.11ax, HE40 @ MCS11 -60 dBm 802.11ax, HE80 @ MCS0 -87 dBm 802.
Wi-Fi&BT Module Series AF50T Hardware Design 4.6. Electrostatic Discharge The module is not protected against Electrostatic Discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module. The following table shows the module electrostatic discharge characteristics.
Wi-Fi&BT Module Series AF50T Hardware Design 5 Mechanical Dimensions This chapter describes the mechanical dimensions of AF50T module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are ±0.05 mm unless otherwise specified. 5.1.
Wi-Fi&BT Module Series AF50T Hardware Design Figure 21: AF50T Bottom Dimension (Bottom View) NOTE The package warpage level of the module conforms to JEITA ED-7306 standard.
Wi-Fi&BT Module Series AF50T Hardware Design 5.2. Recommended Footprint Figure 22: Recommended Footprint (Bottom View) NOTES 1. For easy maintenance of the module, please keep about 3mm spaces between the module and other components on host PCB. 2. Keep all RESERVED pins open.
Wi-Fi&BT Module Series AF50T Hardware Design 5.3. Top and Bottom Views of the Module Figure 23: Top View of the Module Figure 24: Bottom View of the Module NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel.
Wi-Fi&BT Module Series AF50T Hardware Design 6 Storage, Manufacturing and Packaging 6.1. Storage The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: The temperature should be 23 ±5 °C and the relative humidity should be 35 %–60 %. 2. The storage life (in vacuum-sealed packaging) is 12 months in Recommended Storage Condition. 3.
Wi-Fi&BT Module Series AF50T Hardware Design NOTES 1. 1) This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. 2. To avoid blistering, layer separation and other soldering issues, it is forbidden to expose the modules to the air for a long time. If the temperature and moisture do not conform to IPC/JEDEC J-STD-033 or the relative moisture is over 60 %, it is recommended to start the solder reflow process within 24 hours after the package is removed.
Wi-Fi&BT Module Series AF50T Hardware Design Table 31: Recommended Thermal Profile Parameters Factor Recommendation Soak Zone Max slope 1–3 °C/s Soak time (between A and B: 150 °C and 200 °C) 70–120 s Reflow Zone Max slope 2–3 °C/s Reflow time (D: over 220 °C) 45–70 s Max temperature 238 °C to 246 °C Cooling down slope -1.5 to -3 °C/s Reflow Cycle Max reflow cycle 1 NOTES 1.
Wi-Fi&BT Module Series AF50T Hardware Design Table 32: Reel Packaging Model Name AF50T MOQ for MP Minimum Package: TBD Minimum Package TBD TBD Size: TBD N.W: TBD G.W: TBD Size: TBD N.W: TBD G.
Wi-Fi&BT Module Series AF50T Hardware Design 7 Appendix A References Table 33: Related Documents SN Document Name Description [1] Quectel_LTE_OPEN_EVB_User_Guide EVB user guide for Quectel LTE-QuecOpen modules [2] Quectel_UMTS<E_EVB_User_Guide UMTS<E EVB user guide [3] Quectel_AG55xQ_Series_QuecOpen_Reference_Design AG55xQ series reference design [4] Quectel_RF_Layout_Application_Note RF layout application note [5] Quectel_Module_Secondary_SMT_User_Guide Module secondary SMT user gui
Wi-Fi&BT Module Series AF50T Hardware Design LTE Long Term Evolution Mbps Megabits per second MCS Modulation and Coding Scheme MOQ Minimum Order Quantity PCB Printed Circuit Board PCM Pulse Code Modulation QAM Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying RF Radio Frequency RH Relative Humidity RoHS Restriction of Hazardous Substances RTS Request To Send RX Receive SDIO Secure Digital Input/Output TBD To Be Determined TX Transmit UART Universal Asynchro
Wi-Fi&BT Module Series AF50T Hardware Design VSWR Voltage Standing Wave Ratio Wi-Fi Wireless-Fidelity WLAN Wireless Local Area Network FCC Certification Requirements. According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a mobile device. And the following conditions must be met: 1. This Modular Approval is limited to OEM installation for mobile and fixed applications only.
Wi-Fi&BT Module Series AF50T Hardware Design The user’s manual or instruction manual for an intentional or unintentional radiator shall caution the user that changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment.