Product Info

ManualsBrandsQuectel ManualsElectronicsLTE Module

Table Of Contents

BG950A-GL&BG951A-GL

Hardware Design

LPWA Module Series

Version: 1.0.0

Date: 2021-07-07

Status: Preliminary

Summary of content (90 pages)

PAGE 1
BG950A-GL&BG951A-GL Hardware Design LPWA Module Series Version: 1.0.
PAGE 2
LPWA Module Series Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://www.quectel.com/support/sales.htm.
PAGE 3
LPWA Module Series Copyright The information contained here is proprietary technical information of Quectel. Transmitting, reproducing, disseminating and editing this document as well as using the content without permission are forbidden. Offenders will be held liable for payment of damages. All rights are reserved in the event of a patent grant or registration of a utility model or design. Copyright © Quectel Wireless Solutions Co., Ltd. 2021. All rights reserved.
PAGE 4
LPWA Module Series Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers’ failure to comply with these precautions.
PAGE 5
LPWA Module Series About the Document Revision History Version Date Author Description - 2021-07-07 Lex LI/Ben JIANG Creation of the document 1.0.
PAGE 6
LPWA Module Series Contents Safety Information...................................................................................................................................................... 3 About the Document..................................................................................................................................................4 Contents..........................................................................................................................................
PAGE 7
LPWA Module Series 4.6.1. PSM Status Indication*..............................................................................................................47 4.6.2. Network Status Indication*....................................................................................................... 48 4.6.3. STATUS....................................................................................................................................... 49 4.6.4. Behaviors of MAIN_RI*...............................
PAGE 8
LPWA Module Series Table Index Table 1: Special Mark................................................................................................................................................13 Table 2: Brief Introduction of BG950A-GL & BG951A-GL Modules..................................................................14 Table 3: Wireless Network Type..............................................................................................................................15 Table 4: Key Features...
PAGE 9
LPWA Module Series Table 42: BG950A-GL Power Consumption......................................................................................................... 66 Table 43: BG951A-GL Power Consumption......................................................................................................... 68 Table 44: BG950A-GL GNSS Current Consumption...........................................................................................70 Table 45: BG951A-GL GNSS Current Consumption...................
PAGE 10
LPWA Module Series Figure Index Figure 1: Functional Diagram of BG950A-GL.......................................................................................................18 Figure 2: Pin Assignment of BG950A-GL (Top View)..........................................................................................19 Figure 3: Sleep Mode Application via UART Interface........................................................................................
PAGE 11
LPWA Module Series 1 Introduction This document defines BG950A-GL & BG951A-GL modules and describes their air interfaces and hardware interfaces which relate to customers’ applications. It can help customers quickly understand interface specifications, electrical and mechanical details, as well as other related information of the module. Associated with application notes and user guides, customers can use this module to design and to set up mobile applications easily.
PAGE 12
LPWA Module Series radiation, maximum antenna gain (including cable loss) must not exceed: Operating Band FCC Max Antenna Gain（dBi） IC Max Antenna Gain（dBi） LTE Band 2 7.30 7.30 LTE Band 4 4.30 4.30 LTE Band 5 8.84 5.40 LTE Band 12 8.10 4.91 LTE Band 13 8.51 5.23 LTE Band 25 7.30 7.30 LTE Band 26 8.84 5.36 LTE Band 66 4.30 4.30 NB-IOT Band 2 7.30 7.30 NB-IOT Band 4 4.30 4.30 NB-IOT Band 5 8.84 5.40 NB-IOT Band 12 8.10 4.91 NB-IOT Band 13 8.51 5.23 NB-IOT Band 17 8.
PAGE 13
LPWA Module Series The final host / module combination may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. The user’s manual or instruction manual for an intentional or unintentional radiator shall caution the user that changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment.
PAGE 14
LPWA Module Series L'étiquette de certification d'Innovation, Sciences et Développement économique Canada d'un module doit être clairement visible en tout temps lorsqu'il est installédans le produit hôte; sinon, le produit hôte doit porter une étiquette indiquant le numéro de certification d'Innovation, Sciences et Développement économique Canada pour le module, précédé du mot «Contient» ou d'un libellé semblable exprimant la même signification, comme suit: "Contient IC: 10224A-2021BG950A " ou "où: 10224A-2
PAGE 15
LPWA Module Series 2 Product Overview The module is an embedded IoT (LTE Cat M1, LTE Cat NB1/NB2*) wireless communication module. It provides data connectivity on LTE-FDD network, and supports half-duplex operation in LTE network. It also provides GNSS and voice* 1 functionality to meet your specific application demands. The module is an SMD type module which is engineered to meet the demanding requirements in M2M applications such as smart metering, tracking system, security, wireless POS, etc.
PAGE 16
LPWA Module Series 2.1. Frequency Bands and Functions Table 3: Wireless Network Type 2 3 4 Module Supported Bands LTE Bands Power Class GNSS BG950A-GL Cat M1 3: LTE-FDD: B1/B2/B3/B4/B5/B8/B12/B13/B18/ B19/B20/B25/B26/B27/B28/B66 Cat NB1/NB2* 4: LTE-FDD: B1/B2/B3/B4/B5/B8/B12/B13/B17/ B18/B19/B20/B25/B28/B66 Power Class 3 (23 dBm ± 2.
PAGE 17
LPWA Module Series 2.2. Key Features Table 4: Key Features Features Details Power Supply   Supply voltage: 2.2–4.5 V Typical supply voltage: 3.3 V SMS*     Text and PDU mode Point-to-point MO and MT SMS cell broadcast SMS storage: ME by default (U)SIM Interface Supports USIM/SIM card: 1.
PAGE 18
LPWA Module Series Network Indication* NET_STATUS to indicate network connectivity status. AT Commands   3GPP TS 27.007 and 3GPP TS 27.005 AT commands Quectel enhanced AT commands Antenna Interface    ANT_MAIN ANT_GNSS 50 Ω impedance. Transmitting Power LTE-FDD: Class 3 (23 dBm ±2.7 dB) LTE Features        Support 3GPP Rel-14* Supports LTE Cat M1 and LTE Cat NB1/NB2* Supports 1.
PAGE 19
LPWA Module Series 2.3. Functional Diagram The following figure shows a block diagram of the module and illustrates the major functional parts. Power management Baseband Radio frequency Peripheral interface     Figure 1: Functional Diagram of BG950A-GL NOTE 1. 2. PCM and I2C interfaces are for VoLTE* only. The related information of BG951A-GL will be added in the future version.
PAGE 20
LPWA Module Series 2.4. Pin Assignment The following figure illustrates the pin assignment of BG950A-GL.
PAGE 21
LPWA Module Series NOTE 1. 2. 3. 4. 5. 6. 7. ADC input voltage must not exceed 1.8 V. Keep all RESERVED pins and unused pins unconnected. GND pins should be connected to ground in the design. PCM and I2C interfaces are for VoLTE* only. Only BG950A-GL supports GNSS_LNA_EN (pin 51) and VDD_RF (pin 99). For BG950A-GL, pin27 and pin28 can only be used as AUX_TXD and AUX_RXD. The pin assignment of BG951A-GL will be added in the future version. 2.5.
PAGE 22
LPWA Module Series Table 6: Pin Description Power Supply DC Characteristics Pin Name Pin No. I/O Description Comment VBAT_BB 32 PI Power supply for the module’s baseband part VBAT_RF 33 PI Power supply for the module’s RF part VDD_EXT 29 PO Provide 1.8 V for external circuits GND 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 67–74, 79–82, 89–91, 100–102 Vmax = 4.5 V Vmin = 2.2 V Vnom = 3.3 V See NOTE 1 Vnom = 1.8 V IOmax = 50 mA If unused, keep this pin open.
PAGE 23
LPWA Module Series (-) differential impedance of 90 Ω. (U)SIM Interface Pin Name Pin No. I/O Description DC Characteristics Comment 1.8 V power domain. If unused, keep this pin open. Only 1.8 V (U)SIM card is supported. USIM_DET* 42 DI (U)SIM card hot-plug detect VILmin = -0.2 V VILmax = 0.57 V VIHmin = 1.19 V VIHmax = 2.0 V USIM_VDD 43 PO (U)SIM card power supply Vmax = 1.9 V Vmin = 1.7 V USIM_RST 44 DO (U)SIM card reset VOLmax = 0.38 V VOHmin = 1.
PAGE 24
LPWA Module Series Debug UART Interface Pin Name Pin No. I/O Description DC Characteristics DBG_RXD 22 DI Debug UART receive VILmin = -0.2 V VILmax = 0.57 V VIHmin = 1.19 V VIHmax = 2.0 V DBG_TXD 23 DO Debug UART transmit VOLmax = 0.38 V VOHmin = 1.36 V Auxiliary/GNSS UART Interface 1.8 V power domain. If unused, keep this pin open. 7 Pin Name Pin No. I/O Description DC Characteristics AUX/GNSS_TXD 27 DO Auxiliary/GNSS UART transmit VOLmax = 0.38 V VOHmin = 1.
PAGE 25
LPWA Module Series Antenna Interface DC Characteristics Pin Name Pin No. I/O Description ANT_MAIN 60 AIO Main antenna interface 50 Ω impedance 49 AI GNSS antenna interface 50 Ω impedance. If unused, keep this pin open. Pin Name Pin No. I/O Description DC Characteristics Comment GPIO1 25 DIO GPIO2 26 DIO GPIO3 64 DIO GPIO4 65 DIO General-purpose input/output VOLmax = 0.38 V VOHmin = 1.36 V VILmin = -0.2 V VILmax = 0.57 V VIHmin = 1.19 V VIHmax = 2.0 V 1.8 V power domain.
PAGE 26
LPWA Module Series level, the module can enter airplane mode. If unused, keep this pin open. AP_READY 19 DI Application processor sleep state detect VILmin = -0.2 V VILmax = 0.57 V VIHmin = 1.19 V VIHmax = 2.0 V 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. 96 DI Wake up the module from PSM VILmin = -0.2 V VILmax = 0.3 V VIHmin = 1.2 V VIHmax = 2.0 V Pin Name Pin No.
PAGE 27
LPWA Module Series 2. 3. 4. up normally, in order to ensure full-function mode, the minimum power supply voltage should be higher than 2.2 V. ADC input voltage must not exceed 1.8 V. Keep all RESERVED pins and unused pins unconnected. PCM and I2C interfaces are for VoLTE* only. 2.6.
PAGE 28
LPWA Module Series 3 Operating Characteristics 3.1. Operating Modes The table below outlines operating modes of the module. Table 7: Overview of Operating Modes Mode Details Idle Software is active. The module has registered on network, and it is ready to send and receive data. Talk/Data Network is connected. In this mode, the power consumption is decided by network setting and data transfer rate.
PAGE 29
LPWA Module Series NOTE During e-I-DRX, it is recommended to use UART interface for data communication, as the use of USB interface will increase power consumption. 3.2. Sleep Mode* BG950A-GL & BG951A-GL can reduce their current consumption to a lower value during the sleep mode. The following sub-chapters describe the power saving procedure of BG950A-GL & BG951A-GL. 3.2.1.
PAGE 30
LPWA Module Series 3.3. Power Saving Mode (PSM)* BG950A-GL & BG951A-GL module can enter PSM for reducing its power consumption. The mode is similar to power-off, but the module remains registered on the network and there is no need to re-attach or re-establish PDN connections. So BG950A-GL & BG951A-GL module in PSM cannot immediately respond users’ requests. When the module wants to use the PSM, it shall request an Active Time value during every Attach and TAU procedures.
PAGE 31
LPWA Module Series relevant accept message because the EPC rejected its request or because the request was received by EPC not supporting e-I-DRX, the UE shall apply its regular discontinuous reception. If e-I-DRX is supported by the network, then it can be enabled by AT+CEDRXS=1. NOTE See document [3] for details about AT+CEDRXS. 3.5. Airplane Mode When the module enters airplane mode, the RF function will be disabled, and all AT commands correlative with RF function will be inaccessible.
PAGE 32
LPWA Module Series For every VBAT transition/re-insertion from 0 V, VBAT slew rate < 25 mV/μs. After the module starts up normally, in order to ensure full-function mode, the minimum power supply voltage should be higher than 2.2 V. 3.6. Power Supply 3.6.1. Power Supply Pins The module provides two VBAT pins dedicated to the connection with the external power supply. Pin Name Pin No. Description Min. Typ. Max. Unit VBAT_BB 32 Power supply for the module’s baseband part 2.2 3.3 4.
PAGE 33
LPWA Module Series Figure 4: Power Supply Limits During Burst Transmission To decrease voltage ‘s drop, a bypass capacitor of about 100 μF with low ESR should be used, and a multi-layer ceramic chip (MLCC) capacitor array should also be reserved due to its ultra-low ESR. It is recommended to use three ceramic capacitors for composing the MLCC array (100 nF, 33 pF, 10 pF), and place these capacitors close to VBAT pins.
PAGE 34
LPWA Module Series 3.7. Turn On 3.7.1. Turn on the Module with PWRKEY* Table 9: Pin Definition of PWRKEY Pin Name Pin No. I/O Description Comment PWRKEY 15 DI Turn on/off the module Internally pulled up resistor is 470 kΩ. When the module is in power off mode, it can be turned on and enter normal operation mode by driving the PWRKEY low for 500–1000 ms. It is recommended to use an open drain/collector driver to control the PWRKEY.
PAGE 35
LPWA Module Series The power-up scenario is illustrated in the following figure. Figure 8: Power-up Timing . NOTE Ensure that VBAT is stable for at least 30 ms before pulling down the PWRKEY. 3.8. Turn Off The following procedures can be used to turn off the module: 3.8.1. Turn off the Module with PWRKEY* When the module is in power on mode, driving the PWRKEY low for at least 650–1500 ms, then the module will execute power-down procedure after the PWRKEY is released.
PAGE 36
LPWA Module Series Figure 9: Power-down Timing 3.8.2. Turn off the Module with AT Command It is safe to use AT+QPOWD* to turn off the module, which is equal to turn off the module via PWRKEY pin. Refer to document [3] for details about AT+QPOWD*. . NOTE 1. To avoid damaging the internal flash, do not switch off the power supply when the module works normally. Only after the module is turned off by PWRKEY or AT command, the power supply can be cut off. 2.
PAGE 37
LPWA Module Series RESET_N 17 DI Reset the module The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button can be used to control RESET_N. Figure 10: Reference Circuit of RESET_N with Driving Circuit Figure 11: Reference Circuit of RESET_N with A Button The reset timing is illustrated in the following figure.
PAGE 38
LPWA Module Series Figure 12: Reset Timing 3.10. PON_TRIG* BG950A-GL & BG951A-GL modules provide one PON_TRIG pin which is used to wake up the module from PSM*. Table 11: Pin Definition of PON_TRIG Pin Name Pin No. I/O Description Comment PON_TRIG 96 DI Wake up the module from PSM 1.8 V power domain. A reference circuit is shown in the following figure.
PAGE 39
LPWA Module Series Figure 13: Reference Circuit of PON_TRIG NOTE 1. VDD_1V8 is provided by an external LDO. 2. The PON_TRIG pin is pulled down by default. After the module starts up, the PON_TRIG pin must be pulled up so that the main UART interface can communicate. In normal operation mode, the PON_TRIG pin is recommended to be pulled up all the time. 3. After sending the AT command that makes the module enter PSM mode, drive PON_TRIG low can let the module enter PSM mode.
PAGE 40
LPWA Module Series 4 Application Interfaces 4.1. (U)SIM Interface The circuitry of (U)SIM interfaces meet ETSI and IMT-2000 requirements. BG950A-GL & BG951A-GL support 1.8 V (U)SIM card only. Table 12: Pin Definition of (U)SIM Interface Pin Name Pin No. I/O Description Comment USIM_DET* 42 DI (U)SIM card hot-plug detection 1.8 V power domain. If unused, keep this pin open. USIM_VDD 43 PO (U)SIM card power supply Only 1.8 V (U)SIM card is supported.
PAGE 41
LPWA Module Series The following figure illustrates a reference design for (U)SIM card interface with an 8-pin (U)SIM card connector. Figure 14: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector If (U)SIM card detection function is not needed, keep USIM_DET* disconnected. A reference circuit for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure.
PAGE 42
LPWA Module Series To enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in the (U)SIM circuit design:  Keep the placement of (U)SIM card connector as close to the module as possible.  Keep the trace length as less than 200 mm as possible.  Keep (U)SIM card signals away from RF and VBAT traces.  Assure the ground between the module and the (U)SIM card connector short and wide. Keep the trace width of ground and USIM_VDD no less than 0.
PAGE 43
LPWA Module Series It is recommended to reserve test points for debugging and firmware upgrading in customers’ designs. Figure 16: Reference Circuit of USB Application To ensure the integrity of USB data trace signal, resistors R1 and R2 should be placed close to the module, and these resistors should be placed close to each other. The extra stubs of trace must be as short as possible. To meet USB 2.0 specification, comply with the following principles while designing the USB interface.
PAGE 44
LPWA Module Series 4.3. PCM and I2C Interfaces* The module provides one Pulse Code Modulation (PCM) digital interface and one I2C interface for VoLTE* only. The PCM interface supports the following modes: Table 14: Pin Definition of PCM Interface Pin Name Pin No. I/O Description PCM_CLK 4 DO PCM clock PCM_SYNC 5 DO PCM data frame sync PCM_DIN 6 DI PCM data input PCM_DOUT 7 DO PCM data output Comment 1.8 V power domain. If unused, keep this pin open.
PAGE 45
LPWA Module Series 4.4. UART Interfaces Pin definition of the UART interface is shown as follows: Table 16: Pin Definition of Main UART Interface Pin Name Pin No. I/O Description Comment MAIN_DTR 30 DI Main UART data terminal ready MAIN_RXD 34 DI Main UART receive MAIN_TXD 35 DO Main UART transmit MAIN_CTS 36 DO Main UART clear to send MAIN_RTS 37 DI Main UART request to send MAIN_DCD 38 DO Main UART data carrier detect MAIN_RI 39 DO Main UART ring indication 1.
PAGE 46
LPWA Module Series NOTE AT+IPR* can be used to set the baud rate of the main UART interface, and AT+IFC* can be used to set the hardware flow control (the function is disabled by default). See document [3] for more details about these AT commands. Table 18: Pin Definition of Debug UART Interface Pin Name Pin No. I/O Description Comment DBG_TXD 23 DO Debug UART transmit DBG_RXD 22 DI Debug UART receive 1.8 V power domain If unused, keep this pin open.
PAGE 47
LPWA Module Series Another example with transistor circuit is shown as below. For the design of circuits shown in dotted lines, refer to that shown in solid lines, but pay attention to the direction of connection. Figure 19: Reference Circuit with Transistor Circuit NOTE 1. 2. 3. Transistor circuit solution is not suitable for applications with high baud rates exceeding 460 kbps. The main UART of the module shouldn’t be asserted high during BG950A-GL & BG951A-GL enter PSM.
PAGE 48
LPWA Module Series The voltage value on ADC pins can be read via AT+QADC=:   AT+QADC=0: read the voltage value on ADC0 AT+QADC=1: read the voltage value on ADC1 For more details about the AT command, see document [3]. The resolution of the ADC is up to 12 bits. The following table describes the characteristic of the ADC interface. Table 21: Characteristics of ADC Interface Name Min. Typ. Max. Unit Voltage Range 0 - 1.8 V Resolution 6 - 12 bit Input Resistance - - TBD KΩ NOTE 1.
PAGE 49
LPWA Module Series Figure 20: Reference Circuit of the PSM Status Indication 4.6.2. Network Status Indication* Table 23: Pin Definition of NET_STATUS Pin Name Pin No. I/O Description Comment NET_STATUS 21 DO Module network activity status indication 1.8 V power domain. If unused, keep this pin open. The network indication pins can be used to drive network status indication LEDs. The module provides two network indication pins: NET_MODE and NET_STATUS.
PAGE 50
LPWA Module Series A reference circuit is shown in the following figure. Figure 21: Reference Circuit of Network Status Indication 4.6.3. STATUS The STATUS pin is an open drain output for indicating the module’s operation status. It will output high level when module is powered on successfully. Table 25: Pin Definition of STATUS Pin Name Pin No. I/O Description Comment STATUS 20 DO Indicate the module’s operation status 1.8 V power domain A reference circuit is shown as below.
PAGE 51
LPWA Module Series 4.6.4. Behaviors of MAIN_RI* AT+QCFG= “risignaltype”,“physical” can be used to configure MAIN_RI behavior. No matter on which port a URC is presented, the URC will trigger the behavior of MAIN_RI pin. Table 26: Pin Definition of MAIN_RI Pin Name Pin No. I/O Description Comment MAIN_RI 39 DO Main UART ring indication 1.8 V power domain. If unused, keep this pin open. NOTE The URC can be outputted via UART port, USB AT port and USB modem port, which can be set by AT+QURCCFG.
PAGE 52
LPWA Module Series 4.7. GRFC Interface* The module provides two generic RF control interfaces for the control of external antenna tuners. Table 28: Pin Definition of GRFC Interface Pin Name Pin No. I/O Description GRFC1 83 DO Generic RF controller GRFC2 84 DO Generic RF controller Comment 1.8 V power domain. Table 29: Truth Table of GRFC Interface GRFC1 Level GRFC2 Level Frequency Range (MHz) Band Low Low TBD TBD Low High TBD TBD High Low TBD TBD High High TBD TBD 4.8.
PAGE 53
LPWA Module Series GPIO5 66 DIO General-purpose input/output GPIO6 85 DIO General-purpose input/output GPIO7 86 DIO General-purpose input/output GPIO8 87 DIO General-purpose input/output GPIO9 88 DIO General-purpose input/output BG950A-GL&BG951A-GL_Hardware_Design 52 /89
PAGE 54
LPWA Module Series 5 RF Specifications 5.1. Cellular Network 5.1.1. Antenna Interface & Frequency Bands The pin definition is shown as below: Table 31: Pin Definition of Cellular Network Interface Pin Name Pin No. I/O Description Comment ANT_MAIN 60 AIO Main antenna interface 50 Ω impedance  NOTE Only passive antennas are supported.
PAGE 55
LPWA Module Series LTE-FDD B13 777–787 746–756 MHz 704–716 734–746 MHz LTE-FDD B18 815–830 860–875 MHz LTE-FDD B19 830–845 875–890 MHz LTE-FDD B20 832–862 791–821 MHz LTE-FDD B25 1850–1915 1930–1995 MHz LTE-FDD B26 814–849 859–894 MHz LTE-FDD B27 807–824 852–869 MHz LTE-FDD B28 703–748 758–803 MHz LTE-FDD B66 1710–1780 2110–2180 MHz LTE-FDD B17 10 5.1.2. RF Output Power The following table shows the RF output power of the module.
PAGE 56
LPWA Module Series 5.1.3. Receiving Sensitivity The following table shows conducted RF receiving sensitivity of the module. Table 34: Conducted RF Receiving Sensitivity of BG950A-GL Network LTE Frequency Band 12 13 Diversity Sensitivity (dBm) Cat M1/3GPP Cat NB2 LTE-FDD B1 TBD/-102.3 TBD/-107.5 LTE-FDD B2 TBD/-100.3 TBD/-107.5 LTE-FDD B3 TBD/-99.3 TBD/-107.5 LTE-FDD B4 TBD/-102.3 TBD/-107.5 LTE-FDD B5 TBD/-100.8 TBD/-107.5 LTE-FDD B8 TBD/-99.8 TBD/-107.5 LTE-FDD B12 TBD/-99.
PAGE 57
LPWA Module Series Table 35: Conducted RF Receiving Sensitivity of BG951A-GL Network LTE Frequency Band Primary Diversity Sensitivity (dBm) Cat M1/3GPP Cat NB2 LTE-FDD B1 TBD/-102.3 TBD/-107.5 LTE-FDD B2 TBD/-100.3 TBD/-107.5 LTE-FDD B3 TBD/-99.3 TBD/-107.5 LTE-FDD B4 TBD/-102.3 TBD/-107.5 LTE-FDD B5 TBD/-100.8 TBD/-107.5 LTE-FDD B8 TBD/-99.8 TBD/-107.5 LTE-FDD B12 TBD/-99.3 TBD/-107.5 LTE-FDD B13 TBD/-99.3 TBD/-107.5 - TBD/-107.5 LTE-FDD B18 TBD/-102.3 TBD/-107.
PAGE 58
LPWA Module Series The module provides one RF antenna interface for antenna connection. It is recommended to reserve a π-type matching circuit for better RF performance, and the π-type matching components (R1, C1 and C2) should be placed as close to the antenna as possible. The capacitors are not mounted by default. Figure 23: Reference Circuit for Main Antenna Interface 5.2. GNSS Network The module includes a fully integrated global navigation satellite system solution that supports GPS, GLONASS.
PAGE 59
LPWA Module Series ANT_GNSS 49 AI GNSS antenna interface 50 Ω impedance Table 37: GNSS Frequency Type Frequency Unit GPS 1575.42 ±1.023 MHz GLONASS 1597.5–1605.8 MHz 5.2.2. GNSS Performance Table 38: GNSS Performance Parameter Sensitivity (GNSS) Description Conditions Typ.
PAGE 60
LPWA Module Series 1. Tracking sensitivity: the lowest GNSS signal value at the antenna port on which the module can keep on positioning for 3 minutes. 2. Re-acquisition sensitivity: the lowest GNSS signal value at the antenna port on which the module can fix position again within 3 minutes after loss of lock. 3. Cold start sensitivity: the lowest GNSS signal value at the antenna port on which the module fixes position within 3 minutes after executing cold start commands. 5.2.3.
PAGE 61
LPWA Module Series For user’s PCB, the characteristic impedance of all RF traces should be controlled to 50 Ω. The impedance of the RF traces is usually determined by the trace width (W), the materials’ dielectric constant, the height from the reference ground to the signal layer (H), and the spacing between RF traces and grounds (S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance.
PAGE 62
LPWA Module Series Figure 27: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 28: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) To ensure RF performance and reliability, follow the principles below in RF layout design:       Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 Ω.
PAGE 63
LPWA Module Series Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: > 0 dBi Active antenna noise figure: < 1.5 dB Active antenna gain: > 0 dBi Active antenna embedded LNA gain: 17 dB VSWR：≤ 2 LTE Efficiency: > 30 % Gain: 1 dBi Max input power: 50 W Input impedance: 50 Ω Polarization: vertical Cable insertion loss: < 1 dB: LB (<1 GHz) < 1.5 dB: MB (1–2.3 GHz) 5.5. RF Connector Recommendation The receptacle dimensions are illustrated as below.
PAGE 64
LPWA Module Series Figure 29: Dimensions of the U.FL-R-SMT Connector (Unit: mm) U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 30: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector.
PAGE 65
LPWA Module Series Figure 31: Space Factor of Mated Connector (Unit: mm) For more details, visit http://www.hirose.com.
PAGE 66
LPWA Module Series 6 Reliability and Electrical 7 Characteristics 7.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 40: Absolute Maximum Ratings Parameter Min. Max. Unit VBAT_RF/VBAT_BB -0.2 4.5 V USB_VBUS -0.3 6.0 V Voltage on Digital Pins -0.3 2.0 V 7.2.
PAGE 67
LPWA Module Series detect 7.3. Power Consumption Table 42: BG950A-GL Power Consumption BG950A-GL (Power Supply: 3.3 V, Room Temperature) Description Conditions Avg. Max. Unit Leakage Power-off @ USB/UART disconnected 2.1 - μA PSM PSM @ USB/UART disconnected TBD - μA Rock bottom AT+CFUN=0 @ Sleep mode TBD - mA LTE Cat M1 DRX = 1.28 s TBD - mA LTE Cat NB1 DRX = 1.28 s TBD - mA LTE Cat M1 e-I-DRX = 81.92 s @ PTW = 2.56 s, DRX = 1.28 s TBD - mA LTE Cat NB1 e-I-DRX = 81.
PAGE 68
LPWA Module Series LTE Cat NB1 data transfer (GNSS OFF) LTE-FDD B4 @ dBm TBD TBD mA LTE-FDD B5 @ dBm TBD TBD mA LTE-FDD B8 @ dBm TBD TBD mA LTE-FDD B12 @ dBm TBD TBD mA LTE-FDD B13 @ dBm TBD TBD mA LTE-FDD B18 @ dBm TBD TBD mA LTE-FDD B19 @ dBm TBD TBD mA LTE-FDD B20 @ dBm TBD TBD mA LTE-FDD B25 @ dBm TBD TBD mA LTE-FDD B26 @ dBm TBD TBD mA LTE-FDD B27 @ dBm TBD TBD mA LTE-FDD B28 @ dBm TBD TBD mA LTE-FDD B66 @ dBm TBD TBD mA LTE-FDD B1 @ dBm TBD TBD
PAGE 69
LPWA Module Series LTE-FDD B28 @ dBm TBD TBD mA LTE-FDD B66 @ dBm TBD TBD mA Table 43: BG951A-GL Power Consumption BG951A-GL (Power Supply: 3.3 V, Room Temperature) Description Conditions Avg. Max. Unit Leakage Power-off @ USB/UART disconnected 2.1 - μA PSM PSM @ USB/UART disconnected TBD - μA Rock bottom AT+CFUN=0 @ Sleep mode TBD - mA LTE Cat M1 DRX = 1.28 s TBD - mA LTE Cat NB1 DRX = 1.28 s TBD - mA LTE Cat M1 e-I-DRX = 81.92 s @ PTW = 2.56 s, DRX = 1.
PAGE 70
LPWA Module Series LTE Cat NB1 data transfer (GNSS OFF) LTE-FDD B12 @ dBm TBD TBD mA LTE-FDD B13 @ dBm TBD TBD mA LTE-FDD B18 @ dBm TBD TBD mA LTE-FDD B19 @ dBm TBD TBD mA LTE-FDD B20 @ dBm TBD TBD mA LTE-FDD B25 @ dBm TBD TBD mA LTE-FDD B26 @ dBm TBD TBD mA LTE-FDD B27 @ dBm TBD TBD mA LTE-FDD B28 @ dBm TBD TBD mA LTE-FDD B66 @ dBm TBD TBD mA LTE-FDD B1 @ dBm TBD TBD mA LTE-FDD B2 @ dBm TBD TBD mA LTE-FDD B3 @ dBm TBD TBD mA LTE-FDD B4 @ dBm TBD TBD
PAGE 71
LPWA Module Series Table 44: BG950A-GL GNSS Current Consumption BG950A-GL Description Searching (AT+CFUN=0) Tracking (AT+CFUN=0) Conditions Typ. Unit Cold start @ Passive antenna TBD mA Hot start @ Passive antenna TBD mA Lost state @ Passive antenna TBD mA Instrument environment @ Passive antenna TBD mA Open sky @ Real network, Passive antenna TBD mA Open sky @ Real network, Active antenna TBD mA Conditions Typ.
PAGE 72
LPWA Module Series to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module, for example, ESD protection should be added at the interface of circuit design and the points that are vulnerable to electrostatic discharge damage or influence; anti-static gloves should be worn during production, etc.
PAGE 73
LPWA Module Series 8 Mechanical Information This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are ±0.2 mm unless otherwise specified. 8.1. Mechanical Dimensions 19.9±0.2 2.2±0.2 23.6±0.
PAGE 74
LPWA Module Series 19.90±0.20 1.95 1.10 0.55 1.10 0.25 1.00 1.00 Pin1 5.10 0.25 8.50 23.60±0.20 1.00 0.85 1.70 1.90 1.10 1.00 1.70 1.00 1.70 0.70 0.25 0.55 0.25 0.50 1.10 40x1.0 62x0.7 40x1.0 62x1.10 Figure 33: Module Bottom Dimensions (Bottom View, Unit: mm) NOTE The package warpage level of the module conforms to the JEITA ED-7306 standard.
PAGE 75
LPWA Module Series 8.2. Recommended Footprint 9.95 9.15 7.45 1.00 1.10 19.90±0.20 1.95 9.95 9.15 7.15 0.55 1.10 0.25 1.00 0.25 2.50 Pin1 1.70 1.70 1.10 0.85 1.00 2.55 1.10 1.00 0.70 1.10 2.50 1.10 11.80 11.00 9.60 7.65 5.95 4.25 1.70 0.20 1.90 0.85 1.70 1.70 23.60±0.20 0.85 0.15 0.25 11.80 11.00 9.70 7.65 5.95 4.25 1.70 1.10 0.25 4.25 5.95 62x1.10 4.25 5.95 40x1.0 62x0.7 40x1.0 Figure 34: Recommended Footprint (Top View) . NOTE 1. 2. 3.
PAGE 76
LPWA Module Series 8.3. Top and Bottom Views Figure 35: Top & Bottom Views of the Module NOTE 1. 2. Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel. The top and bottom views of BG951A-GL module will be provided in the future version.
PAGE 77
LPWA Module Series 9 Storage, Manufacturing & Packaging 9.1. Storage Conditions The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: The temperature should be 23 ±5 °C and the relative humidity should be 35–60 %. 2. The storage life (in vacuum-sealed packaging) is 12 months in Recommended Storage Condition. 3.
PAGE 78
LPWA Module Series 1. To avoid blistering, layer separation and other soldering issues, extended exposure of the module to the air is forbidden. 2. Take out the module from the package and put it on high-temperature-resistant fixtures before baking. All modules must be soldered to PCB within 24 hours after the baking, otherwise put them in the drying oven. If shorter baking time is desired, see IPC/JEDEC J-STD-033 for the baking procedure. 3.
PAGE 79
LPWA Module Series Table 48: Recommended Thermal Profile Parameters Factor Recommendation Soak Zone Max slope 1–3 °C/s Soak time (between A and B: 150 °C and 200 °C) 70–120 s Reflow Zone Max slope 2–3 °C/s Reflow time (D: over 217 °C) 40–70 s Max temperature 235 °C to 246 °C Cooling down slope -1.
PAGE 80
LPWA Module Series Figure 37: Tape Specifications Figure 38: Reel Specifications BG950A-GL&BG951A-GL_Hardware_Design 79 /89
PAGE 81
LPWA Module Series Table 49: Packaging Specifications MOQ for MP Minimum Package: 500 Minimum Package x 4 = 2000 pcs 500 pieces Size: 370 mm × 350 mm × 56 mm N.W: TBD kg G.W: TBD kg Size: 380 mm × 250 mm × 365 mm N.W: TBD kg G.
PAGE 82
LPWA Module Series 10 Appendix References Table 50: Related Documents Document Name [1] Quectel_UMTS<E_EVB_User_Guide [2] Quectel_BG770A-GL&BG95xA-GL_QCFG_AT_Commands_Manual [3] Quectel_BG770A-GL&BG95xA-GL_AT_Commands_Manual [4] Quectel_BG770A-GL&BG95xA-GL_GNSS_Application_Note [5] Quectel_RF_Layout_Application_Note [6] Quectel_Module_Secondary_SMT_Application_Note Table 51: Terms and Abbreviations Abbreviation Description ADC Analog to Digital Converter Balun Balanced to Unbalanced bps Bits Per
PAGE 83
LPWA Module Series EPC Evolved Packet Core ESD Electrostatic Discharge FDD Frequency Division Duplex HSS Home Subscriber Server I/O Input/Output Inom Nominal Current LNA Low Noise Amplifier LPF Low Pass Filter LTE Long Term Evolution MO Mobile Originated MT Mobile Terminated PA Power Amplifier PAP Password Authentication Protocol PCB Printed Circuit Board PDU Protocol Data Unit PPP Point-to-Point Protocol PSM Power Saving Mode RF Radio Frequency RFIC Radio Frequency Int
PAGE 84
LPWA Module Series UE User Equipment URC Unsolicited Result Code (U)SIM (Universal) Subscriber Identity Module Vmax Maximum Voltage Vnom Nominal Voltage Vmin Minimum Voltage VIHmax Maximum High-level Input Voltage VIHmin Minimum High-level Input Voltage VILmax Maximum Low-level Input Voltage VILmin Minimum Low-level Input Voltage VImax Absolute Maximum Input Voltage VImin Absolute Minimum Input Voltage VOHmax Maximum High-level Output Voltage VOHmin Minimum High-level Output Volt
PAGE 85
LPWA Module Series CE Statement The minimum distance between the user and/or any bystander and the radiating structure of the transmitter is 20cm. Hereby, We, Quectel Wireless Solutions Co., Ltd. declares that the radio equipment type BG95-M5 is in compliance with the Directive 2014/53/EU. The full text of the EU declaration of conformity is available at the following internet address: Building 5, Shanghai Business Park Phase III (Area B), No.
PAGE 86
LPWA Module Series ❒ Catm LTE Band5/26:≤12.541dBi ❒ Catm LTE Band12:≤11.798dBi ❒ Catm LTE Band13:≤12.214dBi ❒ Catm LTE Band85:≤11.798dBi ❒ NB LTE Band2/25:≤11.000dBi ❒ NB LTE Band4/66:≤8.000dBi ❒ NB LTE Band5:≤12.541 dBi ❒ NB LTE Band12:≤11.798dBi ❒ NB LTE Band13:≤12.214dBi ❒ NB LTE Band71:≤11.687dBi ❒NB LTE Band85:≤11.798 dBi 5. This module must not transmit simultaneously with any other antenna or transmitter 6.
PAGE 87
LPWA Module Series then an additional permanent label referring to the enclosed module:“Contains Transmitter Module FCC ID: XMR2021BG950AGL” or “Contains FCC ID: XMR2021BG950AGL” must be used. The host OEM user manual must also contain clear instructions on how end users can find and/or access the module and the FCC ID.
PAGE 88
LPWA Module Series radioélectrique subi, même si le brouillage est susceptible d’en compromettre le fonctionnement." Déclaration sur l'exposition aux rayonnements RF The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the user’s body and must not transmit simultaneously with any other antenna or transmitter.
PAGE 89
LPWA Module Series The host product shall be properly labelled to identify the modules within the host product.
PAGE 90
LPWA Module Series BG950A-GL&BG951A-GL_Hardware_Design 89 /89