RG520F&RG520N Series Hardware Design 5G Module Series Version: 1.0.
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5G Module Series Trademarks Except as otherwise set forth herein, nothing in this document shall be construed as conferring any rights to use any trademark, trade name or name, abbreviation, or counterfeit product thereof owned by Quectel or any third party in advertising, publicity, or other aspects. Third-Party Rights This document may refer to hardware, software and/or documentation owned by one or more third parties (“third-party materials”).
5G Module Series Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers’ failure to comply with these precautions.
G Module Series About the Document Revision History Revision Date Author Description - 2021-12-22 Frank PENG/ Six ZHANG Creation of the document 1.0.0 2021-12-22 Frank PENG/ Six ZHANG Preliminary Frank PENG/ Six ZHANG Preliminary: 1. Updated the dimensions (Table 2). 2. Added n38 HPUE for Class 2 transmitting power; Changed the Max. transmission data rates of NSA and SA TDD in 5G NR features (Table 4). 3. Updated the functional diagram (Figure 2). 4.
5G Module Series Contents Safety Information ...................................................................................................................................... 3 About the Document .................................................................................................................................. 4 Contents ...................................................................................................................................................... 5 Table Index ...
5G Module Series 4.3. (U)SIM Interfaces ................................................................................................................. 49 4.4. I2C Interface*........................................................................................................................ 51 4.5. I2S Interface* ........................................................................................................................ 52 4.6. PCM Interface* ................................................
5G Module Series 7 Mechanical Information .................................................................................................................... 97 7.1. Mechanical Dimensions ....................................................................................................... 97 7.2. Recommended Footprint ...................................................................................................... 99 7.3. Top and Bottom Views ........................................................
5G Module Series Table Index Table 1: Special Marks ............................................................................................................................... 12 Table 2: Brief Introduction of the Module ................................................................................................... 13 Table 3: Wireless Network Type ................................................................................................................. 14 Table 4: Key Features .............
5G Module Series Table 42: Conducted RF Receiving Sensitivity of RG520F-EU*/RG520N-EU .......................................... 78 Table 43: Pin Definition of GNSS Antenna Interface ................................................................................. 81 Table 44: GNSS Frequency ....................................................................................................................... 81 Table 45: GNSS Performance .....................................................................
5G Module Series Figure Index Figure 1: Functional Diagram ..................................................................................................................... 18 Figure 2: Pin Assignment (Top View) ......................................................................................................... 19 Figure 3: DRX Run Time and Current Consumption in Sleep Mode ......................................................... 33 Figure 4: Sleep Mode Application via UART ......................
5G Module Series Figure 42: Specifications of Mating Plugs Using Ø0.81 mm Coaxial Cables (Unit: mm) .......................... 88 Figure 43: Plug in a Coaxial Cable Plug .................................................................................................... 89 Figure 44: Pull out a Coaxial Cable Plug ................................................................................................... 89 Figure 45: Install the Coaxial Cable Plug with Fixture .......................................
5G Module Series 1 Introduction This document defines RG520F and RG520N series modules and describes their air interfaces and hardware interfaces which relate to customers’ applications. It can help customers quickly understand interface specifications, electrical and mechanical details, as well as other related information of the module. Associated with application notes and user guides, customers can use this module to design and to set up mobile applications easily. 1.1.
5G Module Series 2 Product Overview RG520F and RG520N series are 5G NR/LTE-FDD/LTE-TDD/WCDMA 1 wireless communication modules, which provides data connectivity on 5G NR SA and NSA, LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA, and WCDMA networks. It also provides GNSS to meet your specific application demands. RG520F and RG520N series are industrial-grade modules for industrial and commercial applications only.
5G Module Series 2.1.
5G Module Series I2C Interface* I2S Interface* One SPI interface, only supports master mode 1.8 V operation voltage with clock rates up to 50 MHz One I2C interface Comply with I2C Specification, Version 3.
5G Module Series Rx-diversity 5G NR/LTE/WCDMA 1 Cellular antenna interfaces: RG520F-NA*/RG520N-NA: 4 cellular antenna interfaces RG520F-EU*/RG520N-EU: 4 + 2 (optional) cellular antenna interfaces One GNSS antenna interface 50 Ω impedance WCDMA 1: Class 3 (24 dBm + 1/-3 dB) LTE-FDD: Class 3 (23 dBm ±2 dB) LTE-TDD: Class 3 (23 dBm ±2 dB) LTE B38/B41/B42 HPUE: Class 2 (26 dBm ±2 dB) 2 5G NR: Class 3 (23 dBm ±2 dB) 5G NR n38/n41/n77/n78 HPUE: Class 2 (26 dBm +2/-3 dB) 2 Supports 3G
5G Module Series Max. 4.0 Gbps (DL)/900 Mbps (UL) LTE Features UMTS Features Supports FDD and TDD Supports 1.4/3/5/10/15/20 MHz RF bandwidth Supports UL QPSK, 16QAM, 64QAM and 256QAM* modulations Supports DL QPSK, 16QAM, 64QAM and 256QAM modulations Supports DL 4 × 4 MIMO 3 RG520F-NA*/RG520N-NA: B2/B4/B5/B7/B12/B13/B14/B17/B25/B26/B29/B30/B38/B41/B42/ B43/B48/B66/B71 RG520F-EU*/RG520N-EU: B1/B3/B5/B7/B8/B20/B28/B32/B38/B40/B41/B42/B43 Max. transmission data rates 7: RG520N-NA: LTE: 1.
5G Module Series RoHS All hardware components are fully compliant with EU RoHS directive 2.3. Functional Diagram The following figure shows a block diagram of the module and illustrates the major functional parts. ANT_GNSS ANT5 ANT4 ANT3 ANT2 ANT1 Power management Baseband DDR + NAND flash Radio frequency Peripheral interface ANT0 VBAT_RF GNSS DRx PRx Tx MIPI&GRFC Tx/Rx Blocks QET NAND LPDDR4X SDRAM Transceiver RFCLK 76.
5G Module Series NOTE 1. RG520F-NA* and RG520N-NA have 5 antenna interfaces. 2. RG520F-EU* and RG520N-EU have 7 antenna interfaces. ANT4 and ANT5 are used for CA combinations related to 1A-32A or 3A-32A. If there is no need for these CA combinations, ANT4 and ANT5 can be removed. 2.4.
5G Module Series NOTE 1. 2. 3. Keep all RESERVED or unused pins unconnected. All GND pins should be connected to ground. For RG520F-NA* and RG520N-NA, pins 121 and 175 are RESERVED. For RG520F-EU* and RG520N-EU, pins 121 and 175 are optional for ANT4 and ANT5 separately, which is related to CA configuration. 2.5. Pin Description The following table shows the DC characteristics and pin descriptions.
5G Module Series 229, 230, 232, 233 VBAT_RF1 VBAT_RF2 10 VDD_WIFI_VL VDD_WIFI_VM VDD_WIFI_VH 107, 109, 110, 112 266, 267 268 269 PI Power supply for the module’s RF part Vmax = 4.4 V Vmin = 3.3 V Vnom = 3.8 V PI Power supply for the module’s RF part Vmax = 4.4 V Vmin = 3.3 V Vnom = 3.8 V PO Provides 0.95 V for Wi-Fi/Bluetooth modules Vnom = 0.95 V IOmax = 1.7 A PO Provides 1.28 V for Wi-Fi/Bluetooth modules Vmax = 1.35 V Vnom = 1.28 V IOmax = 400 mA PO Provides 1.
5G Module Series network NET_STATUS 243 DO Indicates the module’s network activity status SLEEP_IND 102 DO Indicates the module’s sleep mode Pin No. I/O Description DC Characteristics Comment Vmax = 5.25 V Vmin = 3.3 V Vnom = 5.0 V For USB connection detection only, not power supply. USB Interface Pin Name USB_VBUS 82 AI USB connection detect USB_DP 83 AIO USB differential data (+) USB_DM 85 AIO USB differential data (-) AO USB 3.1 super-speed transmit (+) AO USB 3.
5G Module Series USIM1_DET 249 DI (U)SIM1 card hot-plug detect 1.8 V If unused, keep it open. USIM2_VDD 250 PO (U)SIM2 card power supply 1.8/2.95 V USIM2_DATA 251 DIO (U)SIM2 card data USIM2_CLK 253 DO (U)SIM2 card clock USIM2_RST 254 DO (U)SIM2 card reset USIM2_DET 252 DI (U)SIM2 card hot-plug detect 1.8 V If unused, keep it open. DC Characteristics Comment USIM2_VDD 1.8/2.95 V Main UART Interface Pin Name Pin No.
5G Module Series DI Debug UART receive 105 DO Debug UART transmit Pin Name Pin No. I/O Description I2C_SCL 77 OD I2C serial clock I2C_SDA 78 OD I2C serial data Pin No. I/O Description DBG_RXD DBG_TXD 108 1.8 V I2C Interface* DC Characteristics Comment 1.8 V Pull each of them up to VDD_EXT with an external 4.7 kΩ resistor. If unused, keep them open. DC Characteristics Comment I2S Interface* Pin Name I2S_WS 259 DIO I2S word select In master mode, it is an output signal.
5G Module Series PCM_DIN 74 DI PCM data input PCM_DOUT 76 DO PCM data output Pin Name Pin No.
5G Module Series Characteristics COEX_RXD 65 DI Coexistence UART receive COEX_TXD 67 DO Coexistence UART transmit Only for Qualcomn platform. Signal interface used for WWAN/WLAN coexistence mechanism. Pin 65 can be multiplexed into SDX2AP_E911 function. Pin 67 can be multiplexed into SDX2AP_STATUS function. For details, please contact Quectel Technical Supports. 1.
5G Module Series WL_SW_CTRL 180 DI 76.8 MHz system clock request WLAN_SLP_CLK 225 AO 32.768 kHz sleep clock output RF_CLK3_WL 246 AO 76.8 MHz system clock output SDX_TO_WL_CTI 276 DO - WLAN_PA_ MUTING 162 DO GPIO from SDX to disable WLAN PA DO GPIO to allow WWAN to power on WLAN 0.8 V AON domain, when WLAN is sleeping or disabled.
5G Module Series SDIO_VDD 60 PI SDIO power supply SDIO_DATA0 49 DIO SDIO data bit 0 SDIO_DATA1 50 DIO SDIO data bit 1 SDIO_DATA2 51 DIO SDIO data bit 2 SDIO_DATA3 52 DIO SDIO data bit 3 SDIO_CMD 48 DIO SDIO command SDIO_CLK 47 DO SDIO clock SDIO_PWR_EN 53 DO SDIO power supply enable SDIO_PWR_ VSET 56 DO SDIO power domain set 1.8/2.85 V configurable input. If unused, connect it to VDD_EXT. The power domain of SD I/O pins depends on SDIO_VDD. 1.
5G Module Series ANT3 184 AIO Antenna 3 interface: 5G NR: n41 TRX0 & n77/n78 TRX1 LTE: LMB_TRX1 & HB_TRX0 & UHB_TRX1 ANT_GNSS 193 AI GNSS antenna interface: L1/L5 Antenna Interfaces for RG520F-EU*/RG520N-EU Pin Name ANT0 ANT1 ANT2 Pin No.
5G Module Series SPI Interface Pin Name Pin No. I/O Description SPI_CLK 210 DO SPI clock SPI_CS 207 DO SPI chip select DC Characteristics Comment 1.8 V Only master mode is supported. Comment SPI_MISO 213 DI SPI master-in slave-out SPI_MOSI 204 DO SPI master-out slave-in Pin Name Pin No. I/O Description DC Characteristics ADC0 241 AI General-purpose ADC interface Voltage range: 0–1.
5G Module Series power enable ETH2_PWR_EN* ETH1_INT_N* ETH2_INT_N* 223 221 104 DO Ethernet PHY 2 power enable DI Interrupts input from Ethernet PHY 1 DI Interrupts input from Ethernet PHY 2 control pins of PHY chip recommended by the platform. RESERVED Pins Pin Name Pin No.
5G Module Series 3 Operating Characteristics 3.1. Operating Modes The table below outlines operating modes of the module. Table 7: Overview of Operating Modes Mode Details Idle Software is active. The module is registered on the network and ready to send and receive data. Talk/Data Network connection is ongoing. In this mode, the power consumption is decided by network setting and data transfer rate.
5G Module Series 3.2. Sleep Mode Current DRX of the module is able to reduce the current consumption to a minimum value during sleep mode. The diagram below illustrates the relationship between the DRX run time and the current consumption of the module in this mode. DRX OFF ON OFF ON OFF ON OFF ON OFF Run Time Figure 3: DRX Run Time and Current Consumption in Sleep Mode 3.2.1.
5G Module Series Driving MAIN_DTR low with the host will wake up the module. When the module has a URC to report, MAIN_RI signal will wake up the host. Please refer to Chapter 4.15 for details about RI behavior. 3.2.2. USB Application Scenario 3.2.2.1.USB Application with USB Remote Wakeup Function If the host supports USB suspend/resume and remote wakeup function, the following three preconditions can make the module enter the sleep mode. Execute AT+QSCLK=1 to enable sleep mode.
5G Module Series In this case, the following three preconditions can make the module enter the sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Ensure MAIN_DTR is held at a high level or keep it open. The host’s USB Bus, which is connected with the module’s USB interface, enters suspend state. The following figure illustrates the connection between the module and the host.
5G Module Series Module Host GPIO USB_VBUS Power Switch VDD USB_DP USB_DP USB_DM USB_DM MAIN_RI EINT GND GND Figure 7: Sleep Mode Application without Suspend Function Turn on the power switch and supply power to USB_VBUS will wake up the module. NOTE Please pay attention to the level match shown in dotted line between the module and the host. 3.3. Airplane Mode When the module enters airplane mode, the RF function will be disabled, and all AT commands related to it will be inaccessible.
5G Module Series AT+CFUN=1: Full functionality (default). AT+CFUN=4: Airplane mode (disable RF function). NOTE The execution of AT+CFUN command will not affect GNSS function. 3.4. Power Supply 3.4.1. Power Supply Pins The module provides 11 VBAT pins dedicated to the connection with the external power supply. There are three separate voltage domains for VBAT. Four VBAT_RF1 pins and four VBAT_RF2 pins for RF part. Three VBAT_BB pins for baseband part.
5G Module Series 3.4.2. Reference Design for Power Supply The performance of the module largely depends on the power source. The power supply of the module should be able to provide sufficient current of 3 A at least. If the voltage drops between input and output is not too high, it is suggested that an LDO should be used to supply power to the module. If there is a big voltage difference between input and the desired output VBAT, a buck converter is preferred as the power supply.
5G Module Series 3.4.4. Voltage Stability Requirements The power supply range of the module is from 3.3 V to 4.4 V. Please make sure the input voltage will never drop below 3.3 V. Burst Transmission Burst Transmission VBAT Drop Figure 9: Power Supply Limits during Burst Transmission To decrease voltage ‘s drop, a bypass capacitor of about 100 μF with low ESR should be used, and a same bypass capacitor of about 100 μF need to be reserved.
5G Module Series R1 0R NM_100 μF VBAT C2 C1 100 μF C3 C4 100 nF 6.8 nF C5 C6 220 pF 68 pF VBAT_BB R2 0R NM_100 μF VBAT_RF1 100 μF C7 C8 100 nF C9 220 pF 68 pF 15 pF 9.1 pF 4.7 pF C10 C11 C12 C13 C14 R3 NM-0R D1 NM_100 μF VBAT_RF2 100 μF C15 C16 100 nF C17 220 pF 68 pF 15 pF 9.1 pF 4.7 pF C18 C19 C20 C21 C22 Module Figure 10: Star Structure of the Power Supply NOTE 1. MLCC array for VBAT_BB includes 100 μF, 100 nF, 6.
5G Module Series 3.5. Turn On 3.5.1. Turn on the Module with PWRKEY Table 9: Pin Definition of PWRKEY Pin Name Pin No. I/O Description Comment PWRKEY 7 DI Turns on/off the module Internally pulled up. When the module is in power off mode, it can be turned on and enter normal operation mode by driving PWRKEY low for at least 500 ms. It is recommended to use an open drain/collector driver to control PWRKEY. After STATUS pin outputs a high level, PWRKEY can be released.
5G Module Series S1 R1 PWRKEY 1K TVS Turn-on pulse M odule Close to S1 Figure 12: Reference Circuit of Turning on the Module with a Button The turn on scenario is illustrated in the following figure. N O TE V B AT Џ 500 m s Σ 69 m s PW RKEY V IH = 1.8 V V IL Ў 0.
5G Module Series . NOTE Please ensure that VBAT is stable for at least 30 ms before pulling down the PWRKEY. 3.6. Turn Off 3.6.1. Turn off the Module with PWRKEY Driving PWRKEY low for at least 800 ms, then the module will execute power-down procedure after the PWRKEY is released. V B AT Џ 800 m s TB D PW RKEY S T A TU S M od ule S tatus P ow er-dow n procedure R unning O FF Σ 17 m s V D D _E X T Figure 14: Power-down Timing 3.6.2.
5G Module Series . NOTE 1. In order to avoid damaging the internal flash, please do not switch off the power supply when the module works normally. Only after the module is power off by PWRKEY or AT command, the power supply can be cut off. 2. When turning off module with AT command, please keep PWRKEY at a high level after the execution of power-off command. Otherwise, the module will be turned on again after turned off. 3.7.
5G Module Series S2 R1 RESET_N 1K TVS Reset pulse Module Close to S2 Figure 16: Reference Circuit of RESET_N with Button V B AT T Џ 500 m s R E S E T_N Σ 200 m s TB D S T A TU S M od ule S tatus R unning R esetting R estart Figure 17: Reset Timing NOTE 1. Use RESET_N only when you fail to turn off the module with the AT+QPOWD and PWRKEY. 2. Ensure that there is no large capacitance on PWRKEY and RESET_N pins.
5G Module Series 4 Application Interfaces 4.1. USB Interface The module provides one USB interface. The USB interface complies with the USB 3.1 and USB 2.0 specifications, and supports Super-Speed (10 Gbps) for USB 3.1, High-Speed (480 Mbps) and Full-Speed (12 Mbps) for USB 2.0.
5G Module Series USB_SS_TX_P 91 AO USB 3.1 super-speed transmit (+) USB_SS_TX_M 89 AO USB 3.1 super-speed transmit (-) USB_SS_RX_P 88 AI USB 3.1 super-speed receive (+) USB_SS_RX_M 86 AI USB 3.1 super-speed receive (-) Requires differential impedance of 85 Ω. USB 3.1 Gen2 compliant. It is recommended to reserve test points for debugging and firmware upgrading in your designs.
5G Module Series matching of each differential data pair (Tx/Rx) should be less than 0.7 mm (5 ps), while the matching between Tx and Rx should be less than 10 mm. Do not route signal traces under crystals, oscillators, magnetic devices, PCIe and RF signal traces. It is important to route the USB differential traces in inner-layer of the PCB, and surround the traces with ground on that layer and ground planes above and below.
5G Module Series Module VDD_EXT Test point USB_BOOT TVS 10K TVS Close to test point Figure 19: Reference Circuit of USB_BOOT Interface 4.3. (U)SIM Interfaces (U)SIM interfaces circuitry meet ETSI and IMT-2000 requirements. Both Class B (2.95 V) and Class C (1.8 V) (U)SIM cards are supported, and Dual SIM Single Standby* function is supported. Table 14: Pin Definition of (U)SIM Interfaces Pin Name Pin No. I/O Description Comment Either 1.8 V or 2.95 V is supported by the module automatically.
5G Module Series USIM2_RST 254 DO (U)SIM2 card reset USIM2_DET 252 DI (U)SIM2 card hot-plug detect 1.8 V power domain. If unused, keep it open. The module supports (U)SIM card hot-plug via the USIM_DET pin. The function supports low level and high level detections. It is disabled by default and you can configure it via AT+QSIMDET. See document [6] for more details about the command. The following figure illustrates a reference design for (U)SIM card interface with an 8-pin (U)SIM card connector.
5G Module Series USIM_DET USIM_DATA GND VPP 100 nF RST 0R CLK 0R IO 10 pF USIM_CLK (U)SIM Card Connector VCC 0R 10 pF USIM_RST 20k 10 pF USIM_VDD 10 pF USIM_VDD Module GND TVS Array Figure 21: Reference Circuit of a 6-Pin (U)SIM Card Connector In order to enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in (U)SIM circuit design. Keep (U)SIM card connector as close as possible to the module.
5G Module Series Table 15: Pin Definition of I2C Interface Pin Name Pin No. I/O Description Comment I2C_SCL 77 OD I2C serial clock I2C_SDA 78 OD I2C serial data Pull each of them up to VDD_EXT with an external 4.7 kΩ resistor. If unused, keep them open. 4.5. I2S Interface* The module provides one I2S interface. Pin definition is here as follows: Table 16: Pin Definition of I2S Interface Pin Name I2S_WS Pin No.
5G Module Series MICBIAS I2S_SCK I2S_WS I2S_WS I2S_DOUT I2S_DIN I2S_DIN I2S_DOUT I2C_SCL SCL I2C_SDA SDA LOUTP LOUTN Codec 4.7 K 4.7 K Module INP INN I2S_SCK BIAS MCLK MCLK 1.8 V Figure 22: Reference Circuit of I2S Application with Audio Codec 4.6. PCM Interface* The module provides one Pulse Code Modulation (PCM) digital interface and one I2S interface.
5G Module Series input signal. PCM_DIN 74 DI PCM data input PCM_DOUT 76 DO PCM data output If unused, keep it open. The module supports 16-bit linear data format. The following figures show the primary mode’s timing relationship with 8 kHz PCM_SYNC and 2048 kHz PCM_CLK, as well as the auxiliary mode’s timing relationship with 8 kHz PCM_SYNC and 256 kHz PCM_CLK.
5G Module Series Clock and mode can be configured by AT command, and the default configuration is master mode using short frame sync format with 2048 kHz PCM_CLK and 8 kHz PCM_SYNC. Please refer to document [6] about AT+QDAI command for details. The reference design is illustrated as follows: PCM_CLK BCLK PCM_SYNC LRCK DAC PCM_DIN ADC I2C_SCL SCL I2C_SDA SDA 4.7K Module 4.7 K PCM_DOUT INP INN BIAS MICBIAS LOUTP LOUTN Codec 1.8 V Figure 25: Reference Circuit of PCM Interface 4.7.
5G Module Series Table 18: Pin Definition of UART Interfaces Pin Name Pin No. I/O Description Comment MAIN_TXD 68 DO Main UART transmit MAIN_RXD 70 DI Main UART receive MAIN_RI* 100 DO Main UART ring indication MAIN_DTR 258 DI Main UART data terminal ready MAIN_DCD* 261 DO Main UART data carrier detect BT_TXD* 59 DO Bluetooth UART transmit BT_RXD* 63 DI Bluetooth UART receive BT_RTS* 61 DI DTE request to send signal to DCE Connect to DTE’s RTS. 1.8 V power domain.
5G Module Series BT_TXD BT_UART_RXD BT_RXD BT_UART_TXD Module FC60E BT_CTS BT_UART_CTS BT_RTS BT_UART_RTS Figure 26: UART Interface Connection The module provides 1.8 V UART interfaces. A level translator should be used if the application is equipped with a 3.3 V UART interface. A level translator is recommended. VDD_1V8 VCCA 0.1 μF VCCB 0.
5G Module Series VDD_1V8 Module 4.7 K 1 nF VDD_1V8 MCU/ARM 10 K TXD MAIN_RXD MAIN_TXD RXD 1 nF VDD_1V8 4.7 K 10 K VDD_MCU MAIN_DTR MAIN_RI MAIN_DCD GPIO EINT GPIO GND GND Figure 28: Reference Circuit with Transistor Circuit NOTE 1. Transistor circuit solution is not suitable for applications with high baud rates exceeding 460 kbps. 2. Other baud rates of the main UART are under development. 3.
5G Module Series open. SDIO_DATA1 50 DIO SDIO data bit 1 SDIO_DATA2 51 DIO SDIO data bit 2 SDIO_DATA3 52 DIO SDIO data bit 3 SDIO_CMD 48 DIO SDIO command SDIO_CLK 47 DO SDIO clock SDIO_PWR_EN 53 DO SDIO power supply enable SDIO_PWR_ VSET 56 DO SDIO power domain set SDIO_DET 55 DI Pull it up to VDD_EXT with a 470 kΩ resistor. If unused, keep it open. SD hot-plug detect The following figure illustrates a reference design of SD card interface with the module.
5G Module Series In order to improve signal quality, it is recommended to add 0 Ω resistors R1 to R6 in series between the module and the SD card connector. The bypass capacitors C1 to C6 are reserved and not mounted by default. All resistors and bypass capacitors should be placed close to the SD card connector. For good ESD protection, it is recommended to add a ESD protection components with capacitance value less than 1.2 pF on each SD card pin.
5G Module Series Table 21: Pin Definition of ADC Interface Pin Name Pin No. I/O Description ADC0 241 AI General-purpose ADC interface The voltage value on ADC pin can be read via AT+QADC= command: AT+QADC=0: read the voltage value on ADC0 For more details about the AT command, please refer to document [6]. Table 22: Characteristics of ADC Interface Name Min. Typ. Max. Unit ADC0 Voltage Range 0 - 1.875 V ADC Input Resistance 398 400 402 kΩ ADC Resolution - 64.
5G Module Series Only master mode is supported. SPI_CS 207 DO SPI chip select SPI_MISO 213 DI SPI master-in slave-out SPI_MOSI 204 DO SPI master-out slave-in The module provides a 1.8 V SPI interface. Use a level shifter between the module and the host if the application is equipped with a 3.3 V processor or device interface. The following figure shows a reference design. VDD_EXT VCCA 0.1 μF VCCB OE 0.
5G Module Series PCIE_TX0_M 44 AO PCIe transmit 0 (-) PCIE_TX0_P 46 AO PCIe transmit 0 (+) PCIE_TX1_M 41 AO PCIe transmit 1 (-) PCIE_TX1_P 43 AO PCIe transmit 1 (+) PCIE_RX0_M 32 AI PCIe receive 0 (-) PCIE_RX0_P 34 AI PCIe receive 0 (+) PCIE_RX1_M 35 AI PCIe receive 1 (-) PCIE_RX1_P 37 AI PCIe receive 1 (+) PCIE_CLKREQ_N PCIE_RST_N PCIE_WAKE_N 36 39 30 OD DIO OD supported. It can be either Gen 3 2-lane or Gen 4 1-lane. PCIe clock request 1.8 V power domain.
5G Module Series VDD_EXT R1 100K R2 100K R3 NM_100K PCIE_CLKREQ_N PCIE_CLKREQ_N PCIE_WAKE_N PCIE_WAKE_N PCIE_RST_N PCIE_RST_N PCIE_REFCLK_P Module PCIE_REFCLK_M PCIE_TX0_M PCIE_TX0_P PCIE_RX0_M R4 0R PCIE_REFCLK_P R5 0R PCIE_REFCLK_M PCIE_RX_M C1 220 nF C2 220 nF PCIE_RX0_P Other PCIE_RX_P C3 220 nF C4 220 nF PCIE_TX_M PCIE_TX_P Figure 31: PCIe Interface Connection The following principles of PCIe interface design should be complied with to meet PCIe specifications.
5G Module Series Table 25: PCIe Trace Length in the Module Pin No. Pin Name Length (mm) 40 PCIE_REFCLK_P 7.52 38 PCIE_REFCLK_M 7.58 46 PCIE_TX0_P 12.87 44 PCIE_TX0_M 12.90 43 PCIE_TX1_P 10.36 41 PCIE_TX1_M 10.37 34 PCIE_RX0_P 3.92 32 PCIE_RX0_M 4.09 37 PCIE_RX1_P 4.88 35 PCIE_RX1_M 4.85 Length Difference (P-M) (mm) -0.06 -0.03 -0.01 -0.17 0.03 4.12.
5G Module Series Table 27: RF Function Status W_DISABLE# Level AT Commands RF Function Status High Level AT+CFUN=1 Enabled High Level AT+CFUN=0 AT+CFUN=4 Disabled Low Level AT+CFUN=0 AT+CFUN=1 AT+CFUN=4 Disabled 4.13. Indication Signal Relative interfaces’ pin descriptions are here as follows: Table 28: Pin Definition of Indication Signal Pin Name Pin No.
5G Module Series Table 29: Working State of the Network Connection Status/Activity Indication Pin Name NET_MODE NET_STATUS Status Description Always High Registered on 5G network Always Low Others Flicker slowly (200 ms High/1800 ms Low) Network searching Flicker slowly (1800 ms High/200 ms Low) Idle Flicker quickly (125 ms High/125 ms Low) Data transfer is ongoing Always High Voice calling Module VBAT 2.2K Network Indicator 4.
5G Module Series VBAT Module 2.2K 4.7K STATUS 47K Figure 33: Reference Circuits of STATUS 4.14. IPQ Status and Err Fatal Interface* The module provides one IPQ status interface and one Err Fatal interface for connection between the module and IPQ. The following tables show the pin definition. Table 30: Pin Definition of IPQ Status and Err Fatal Interface Pin Name Pin No.
5G Module Series The following figure shows a reference design of the module with IPQ GPIOs. IPQ 5018 Module COEX_RXD SDX2AP_E911 COEX_TXD SDX2AP_STATUS GPIO_32 AP2SDX_STATUS Figure 34: Module with IPQ GPIO Application NOTE IPQ5018 is used by default here. 4.15. MAIN_RI* AT+QCFG= “risignaltype”, “physical” command can be used to configure MAIN_RI behavior. No matter on which port a URC is presented, the URC will trigger the behavior of MAIN_RI pin.
5G Module Series URC MAIN_RI outputs 120 ms low pulse when a new URC return. The MAIN_RI behavior can be changed via AT+QCFG="urc/ri/ring"*. Please refer to document [6] for details. 4.16. Time Service and Repeater Interface* Time service provides time information for other devices or systems through standard or customized interfaces and protocols. Its basic channels are shortwave, TV signals, cables, networks, satellites, base stations, etc.
5G Module Series Table 33: Pin Definition of GRFC Interfaces Pin Name Pin No. I/O Default Status Description Comment SDR_GRFC0 171 DO PD SDR_GRFC1 174 DO PD GRFC interface dedicated for external antenna tuner control If unused, keep them open. Table 34: Logic Levels of GRFC Interfaces Parameter Min. Max. Unit VOL 0 0.45 V VOH 1.35 1.
5G Module Series 5 RF Specifications 5.1. Cellular Network 5.1.1. Antenna Interface & Frequency Bands The pin definition is shown below: Table 36: Pin Definition of Cellular Network Interface for RG520F-NA*/RG520N-NA Pin Name ANT0 ANT1 ANT2 ANT3 Pin No.
5G Module Series Table 37: Pin Definition of Cellular Network Interface for RG520F-EU*/RG520N-EU Pin Name ANT0 ANT1 ANT2 Pin No.
5G Module Series Table 38: Cellular Network Antenna Mapping for RG520F-NA*/RG520N-NA Antenna ANT0 ANT1 ANT2 ANT3 WCDMA LTE 5G NR LB (MHz) MHB (MHz) n77/n78 (MHz) Pin No.
5G Module Series Table 39: Cellular Network Antenna Mapping for RG520F-EU*/RG520N-EU Antenna WCDMA LTE 5G NR LB (MHz) MHB (MHz) n77/n78 (MHz) Pin No.
5G Module Series 5.1.2. Tx Power The following table shows the RF output power of the module. Table 40: Tx Power Mode Frequency Max. Min. WCDMA WCDMA bands 24 dBm +1/-3 dB (Class 3) <-50 dBm LTE bands 23 dBm ±2 dB (Class 3) <-40 dBm LTE HPUE bands (B38/B41/B42) 26 dBm ±2 dB (Class 2) <-40 dBm 5G NR bands 23 dBm ±2 dB (Class 3) <-40 dBm 5G NR HPUE bands (n38/n41/n77/n78) 26 dBm +2/-3 dB (Class 2) <-40 dBm LTE 5G NR .
5G Module Series LTE-FDD B7 (10 MHz) TBD TBD TBD -95.0 dBm LTE-FDD B12 (10 MHz) TBD TBD TBD -94.0 dBm LTE-FDD B13 (10 MHz) TBD TBD TBD -94.0 dBm LTE-FDD B14 (10 MHz) TBD TBD TBD -94.0 dBm LTE-FDD B17 (10 MHz) TBD TBD TBD -94.0 dBm LTE-FDD B25 (10 MHz) TBD TBD TBD -93.5 dBm LTE-FDD B26 (10 MHz) TBD TBD TBD -94.5 dBm LTE-FDD B29 (10 MHz) TBD TBD TBD TBD LTE-FDD B30 (10 MHz) TBD TBD TBD -96.0 dBm LTE-TDD B38 (10 MHz) TBD TBD TBD -97.
5G Module Series 5G NR FDD n14 (10 MHz) TBD TBD TBD -93.8 dBm 5G NR FDD n25 (20 MHz) TBD TBD TBD -90.3 dBm 5G NR TDD n26 (20 MHz) TBD TBD TBD -87.6 dBm 5G NR FDD n29 (10 MHz) TBD TBD TBD TBD 5G NR FDD n30 (10 MHz) TBD TBD TBD -95.8 dBm 5G NR TDD n38 (20 MHz) TBD TBD TBD -93.8 dBm 5G NR TDD n41 (100 MHz) TBD TBD TBD -84.7 dBm 5G NR TDD n48 (20 MHz) TBD TBD TBD -92.9 dBm 5G NR FDD n66 (20 MHz) TBD TBD TBD -93.3 dBm 5G NR FDD n70 (20 MHz) TBD TBD TBD -93.
5G Module Series LTE-FDD B7 (10 MHz) TBD TBD TBD -95.0 dBm LTE-FDD B8 (10 MHz) TBD TBD TBD -94.0 dBm LTE-FDD B20 (10 MHz) TBD TBD TBD -94.0 dBm LTE-FDD B28 (10 MHz) TBD TBD TBD -95.5 dBm LTE-TDD B32 (10 MHz) TBD TBD TBD TBD LTE-TDD B38 (10 MHz) TBD TBD TBD -97.0 dBm LTE-TDD B40 (10 MHz) TBD TBD TBD -97.0 dBm LTE-TDD B41 (10 MHz) TBD TBD TBD -95.0 dBm LTE-TDD B42 (10 MHz) TBD TBD TBD -96.0 dBm LTE-TDD B43 (10 MHz) TBD TBD TBD -96.
5G Module Series 5G NR TDD n77 (100 MHz) TBD TBD TBD -85.1 dBm 5G NR TDD n78 (100 MHz) TBD TBD TBD -85.6 dBm 5.1.4. Reference Design RG520F-NA* and RG520N-NA modules provide 4 RF cellular antenna interfaces for antenna connection. RG520F-EU* and RG520N-EU modules provide 6 RF cellular antenna interfaces for antenna connection.
5G Module Series 5.2. GNSS The module includes a fully integrated global navigation satellite system solution that supports GPS, GLONASS, BDS, Galileo and QZSS. The module supports standard NMEA-0183 protocol, and outputs NMEA sentences via USB interface (data update rate: 1–10 Hz, 1 Hz by default). By default, the module’s GNSS function is switched off. It must be switched on via AT command. For more details about GNSS function’s technology and configurations, please refer to document [7]. 5.2.1.
5G Module Series 5.2.2. GNSS Performance Table 45: GNSS Performance Parameter Description Conditions Cold start Sensitivity (GNSS) Reacquisition Tracking Accuracy (GNSS) Autonomous . TBD dBm TBD TBD @ open sky XTRA enabled TBD Warm start Autonomous TBD @ open sky XTRA enabled TBD Hot start Autonomous TBD @ open sky XTRA enabled TBD CEP-50 Unit TBD Cold start TTFF (GNSS) Typ. Autonomous @ open sky TBD s m NOTE 1.
5G Module Series 5.2.3. Reference Design The following is the reference circuit of GNSS antenna. VDD 0.1 μF Module 10 R GNSS Antenna 47 nH 100 pF 0R ANT_GNSS NM NM Figure 36: Reference Circuit of GNSS Antenna . NOTE 1. 2. 3. 4. 5. An external LDO can be selected to supply power according to the active antenna requirement. If the module is designed with a passive antenna, then the VDD circuit is not needed. Keep the characteristic impedance for ANT_GNSS trace as 50 Ω.
5G Module Series Figure 37: Microstrip Design on a 2-layer PCB Figure 38: Coplanar Waveguide Design on a 2-layer PCB Figure 39: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) RG520F&RG520N_Series_Hardware_Design 84 / 116
5G Module Series Figure 40: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design: Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 Ω. The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully connected to ground.
5G Module Series 5.4. Antenna Requirements Table 46: Antenna Requirements Antenna Type Requirements Frequency range 1: 1559–1606 MHz Frequency range 2: 1166–1187 MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: > 0 dBi Active antenna noise figure: < 1.
5G Module Series 5.5. RF Connector Recommendation The receptacle dimensions are illustrated as below.
5G Module Series The following figure shows the specifications of mating plugs using Ø0.81 mm coaxial cables. Figure 42: Specifications of Mating Plugs Using Ø0.81 mm Coaxial Cables (Unit: mm) 5.5.1. Recommended RF Connector for Installation 5.5.1.1.Assemble Coaxial Cable Plug Manually The illustration for plugging in a coaxial cable plug is shown below, θ = 90° is acceptable, while θ ≠ 90° is not.
5G Module Series Figure 43: Plug in a Coaxial Cable Plug The illustration of pulling out the coaxial cable plug is shown below, θ = 90° is acceptable, while θ ≠ 90° is not. Figure 44: Pull out a Coaxial Cable Plug 5.5.1.2.Assemble Coaxial Cable Plug with Fixture The pictures of installing the coaxial cable plug with a fixture is shown below, θ = 90° is acceptable, while θ ≠ 90° is not.
5G Module Series Figure 45: Install the Coaxial Cable Plug with Fixture 5.5.2. Recommended Manufacturers of RF Connector and Cable For more details, visit https://www.i-pex.com.
5G Module Series 6 Electrical Characteristics & Reliability 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 47: Absolute Maximum Ratings Parameter Min. Max. Unit VBAT_RF/VBAT_BB -0.5 6.0 V USB_VBUS -0.3 5.5 V Peak Current of VBAT_BB - TBD A Peak Current of VBAT_RF - TBD A Voltage on Digital Pins -0.5 2.2 V Voltage at ADC0 -0.5 2.
5G Module Series 6.2. Power Supply Ratings Table 48: Module Power Supply Ratings Parameter Description Conditions Min. Typ. Max. Unit VBAT VBAT_BB and VBAT_RF The actual input voltages must stay between the minimum and maximum values 3.3 3.8 4.4 V USB_VBUS USB connection detection 3.3 5.0 5.25 V 6.3. Power Consumption Table 49: Averaged Power Consumption for the Module Mode Conditions Band/Combinations Current Unit Power-off Power off - TBD μA AT+CFUN=0 (USB 3.
5G Module Series Tx power @ 23 dBm 5G SA (1 Tx) 5G SA (2 Tx) 5G NR LB @ 23 dBm TBD TBD mA 5G NR MB @ 23 dBm TBD TBD mA 5G NR HB @ 23 dBm TBD TBD mA 5G NR UHB @ 26 dBm TBD TBD mA 5G NR UL 2 × 2 MIMO @ 26 dBm TBD TBD mA TBD TBD mA TBD TBD DL 2CA, 256QAM 5G SA CA UL 1CA, 256QAM Tx power @ 26 dBm LTE DL, 256QAM LTE UL QPSK LTE + 5G EN-DC NR DL, 256QAM NR UL QPSK mA LTE Tx Power @ 23 dBm NR Tx Power @ 23 dBm 6.4. Digital I/O Characteristic Table 50: 1.
5G Module Series Table 51: (U)SIM 1.8 V I/O Requirements Parameter Description Min. Max. Unit USIM_VDD Power supply 1.65 1.95 V VIH Input high voltage 1.26 2.1 V VIL Input low voltage -0.3 0.36 V VOH Output high voltage 1.44 1.8 V VOL Output low voltage 0.0 0.4 V Table 52: (U)SIM 2.95 V I/O Requirements Parameter Description Min. Max. Unit USIM_VDD Power supply 2.7 3.05 V VIH Input high voltage 2.06 3.25 V VIL Input low voltage -0.3 0.
5G Module Series Other Interfaces ±0.5 ±1 kV 6.6. Operating and Storage Temperatures Table 54: Operating and Storage Temperatures Parameter Operating Temperature Range 12 Extended Operating Temperature Range 13 Storage temperature range Min. Typ. Max. Unit -30 +25 +75 °C -40 - +85 °C -40 - +90 °C 6.7.
5G Module Series Figure 46: Heatsink Placement Figure 47: Heatsink Fixing The module offers the best performance when the internal IC chips stay below its maximum junction temperature, When IC reaches or exceeds this temperature, the module may still work but the performance and function (such as RF output power, data rate, etc.) will be affected to a certain extent.
5G Module Series 7 Mechanical Information This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are ±0.2 mm unless otherwise specified. 7.1.
5G Module Series Figure 49: Module Bottom Dimensions (Bottom View, Unit: mm) NOTE The package warpage level of the module conforms to the JEITA ED-7306 standard.
5G Module Series 7.2. Recommended Footprint Pin 1 Figure 50: Recommended Footprint . NOTE 1. 2. Keep at least 3 mm between the module and other components on the motherboard to improve soldering quality and maintenance convenience. To keep the reliability of the mounting and soldering, keep the motherboard thickness as at least 1.2 mm.
5G Module Series 7.3. Top and Bottom Views Figure 51: Top & Bottom Views of RG520N Series Figure 52: Top & Bottom Views of RG520F Series NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel.
5G Module Series 8 Storage, Manufacturing & Packaging 8.1. Storage Conditions The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: The temperature should be 23 ±5 °C and the relative humidity should be 35–60 %. 2. The storage life (in vacuum-sealed packaging) is 12 months in recommended storage condition. 3.
5G Module Series NOTE 1. To avoid blistering, layer separation and other soldering issues, extended exposure of the module to the air is forbidden. 2. Take out the module from the package and put it on high-temperature-resistant fixtures before baking. All modules must be soldered to PCB within 24 hours after the baking, otherwise put them in the drying oven. If shorter baking time is desired, see IPC/JEDEC J-STD-033 for the baking procedure. 3.
5G Module Series Table 55: Recommended Thermal Profile Parameters Factor Recommendation Soak Zone Max slope 1 to 3 °C/s Soak time (between A and B: 150 °C and 200 °C) 70 to 120 s Reflow Zone Max slope 2 to 3 °C/s Reflow time (D: over 217°C) 40 to 70 s Max temperature 235 to 246 °C Cooling down slope -1.5 to -3 °C/s Reflow Cycle Max reflow cycle 1 NOTE 1.
5G Module Series Figure 54: Carrier Tape Dimension Drawing Table 56: Carrier Tape Dimension Table (Unit: mm) W P T A0 B0 K0 K1 F E 72 56 0.4 44.7 41.7 4.2 5.2 34.2 1.75 8.3.2. Plastic Reel Figure 55: Plastic Reel Dimension Drawing Table 57: Plastic Reel Dimension Table (Unit: mm) øD1 øD2 W 380 180 72.
5G Module Series 8.3.3. Packaging Process Place the module into the carrier tape and use the cover tape to cover them; then wind the heat-sealed carrier tape to the plastic reel and use the protective tape for protection. One plastic reel can load 200 modules. Place the packaged plastic reel, humidity indicator card and desiccant bag into a vacuum bag, then vacuumize it. Place the vacuum-packed plastic reel into a pizza box. Put 4 pizza boxes into 1 carton and seal it. One carton can pack 800 modules.
5G Module Series 9 Appendix A References Table 58: Related Documents Document Name [1] Quectel_RG520N-EU_CA&EN-DC_Features [2] Quectel_RG520N-NA_CA&EN-DC_Features [3] Quectel_RG520F-EU_CA&EN-DC_Features [4] Quectel_RG520F-NA_CA&EN-DC_Features [5] Quectel_5G_EVB_User_Guide [6] Quectel_RG520N&RG5x0F&RM5x0N&RM5x0F_Series_AT_Commands_Manual [7] Quectel_RG520N&RG5x0F&RM5x0N&RM5x0F_Series_GNSS_Application_Note [8] Quectel_RF_Layout_Application_Note [9] Quectel_Module_Secondary_SMT_Application_Note [10] Quectel
5G Module Series BPSK Binary Phase Shift Keying CA Carrier Aggregation CTS Clear To Send DAI Digital Audio Interface DCE Data Communications Equipment DC-HSDPA Dual-carrier High Speed Downlink Packet Access DDR Double Data Rate DFOTA Delta Firmware Upgrade Over The Air DL Downlink DRX Discontinuous Reception DRX Diversity Receive DTE Data Terminal Equipment DTR Data Terminal Ready ESD Electrostatic Discharge FDD Frequency Division Duplex FEM Front-End Module GLONASS Global
5G Module Series IC Integrated Circuit I2C Inter-Integrated Circuit I2S Inter-IC Sound I/O Input/Output LAA License Assisted Access LB Low Band LED Light Emitting Diode LGA Land Grid Array LMHB Low/Middle/High Band LNA Low Noise Amplifier LTE Long Term Evolution MAC Media Access Control MB Middle Band MHB Middle/High Band MIMO Multiple Input Multiple Output MO Mobile Originated MT Mobile Terminated NR New Radio NSA Non-Stand Alone PA Power Amplifier PAP Password Aut
5G Module Series PDA Personal Digital Assistant PDU Protocol Data Unit PHY Physical Layer PRX Primary Receive QAM Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying QZSS Quasi-Zenith Satellite System RF Radio Frequency RGMII Reduced Gigabit Media Independent Interface RHCP Right Hand Circularly Polarized Rx Receive SA Stand Alone SCS Sub-Carrier Space SD Secure Digital SIB System Information Block SIMO Single Input Multiple Output SMD Surface Mount Device S
5G Module Series UHB Ultra High Band UL Uplink UMTS Universal Mobile Telecommunications System URC Unsolicited Result Code USB Universal Serial Bus (U)SIM Universal Subscriber Identity Module VBAT Voltage at Battery (Pin) VIHmax Maximum High-level Input Voltage VIHmin Minimum High-level Input Voltage VILmax Maximum Low-level Input Voltage VILmin Minimum Low-level Input Voltage Vmax Maximum Voltage Vmin Minimum Voltage Vnom Nominal Voltage VOHmax Maximum High-level Output Voltag
5G Module Series 10 Appendix B Operating Frequency Table 60: Operating Frequencies (5G) 5G Duplex Mode Uplink Operating Band Downlink Operating Band Unit n1 FDD 1920–1980 2110–2170 MHz n2 FDD 1850–1910 1930–1990 MHz n3 FDD 1710–1785 1805–1880 MHz n5 FDD 824–849 869–894 MHz n7 FDD 2500–2570 2620–2690 MHz n8 FDD 880–915 925–960 MHz n12 FDD 699–716 729–746 MHz n13 FDD 777–787 746–756 MHz n14 FDD 788–798 758–768 MHz n18 FDD 815–830 860–875 MHz n20 FDD 83
5G Module Series 5G Duplex Mode Uplink Operating Band Downlink Operating Band Unit n39 TDD 1880–1920 1880–1920 MHz n40 TDD 2300–2400 2300–2400 MHz n41 TDD 2496–2690 2496–2690 MHz n46 TDD 5150–5925 5150–5925 MHz n47 TDD 5855–5925 5855–5925 MHz n48 TDD 3550–3700 3550–3700 MHz n50 TDD 1432–1517 1432–1517 MHz n51 TDD 1427–1432 1427–1432 MHz n53 TDD 2483.5–2495 2483.
5G Module Series 5G Duplex Mode Uplink Operating Band Downlink Operating Band Unit n85 FDD 698–716 728–746 MHz n86 SUL 1710–1780 - MHz n89 SUL 824–849 - MHz n90 TDD 2496–2690 2496–2690 MHz n91 FDD 832–862 1427–1432 MHz n92 FDD 832–862 1432–1517 MHz n93 FDD 880–915 1427–1432 MHz n94 FDD 880–915 1432–1517 MHz n95 SUL 2010–2025 - MHz n96 TDD 5925–7125 5925–7125 MHz n97 SUL 2300–2400 - MHz n98 SUL 1880–1920 - MHz n99 SUL 1626.5–1660.
5G Module Series - B6 - FDD 830–840 875–885 MHz - B7 B7 FDD 2500–2570 2620–2690 MHz EGSM900 B8 B8 FDD 880–915 925–960 MHz - B9 B9 FDD 1749.9–1784.9 1844.9–1879.9 MHz - B10 B10 FDD 1710–1770 2110–2170 MHz - B11 B11 FDD 1427.9–1447.9 1475.9–1495.
5G Module Series - B34 B34 TDD 2010–2025 2010–2025 MHz - B35 B35 TDD 1850–1910 1850–1910 MHz - B36 B36 TDD 1930–1990 1930–1990 MHz B37 B37 TDD 1910–1930 1910–1930 MHz - B38 B38 TDD 2570–2620 2570–2620 MHz - B39 B39 TDD 1880–1920 1880–1920 MHz - B40 B40 TDD 2300–2400 2300–2400 MHz - - B41 TDD 2496–2690 2496–2690 MHz - - B42 TDD 3400–3600 3400–3600 MHz - - B43 TDD 3600–3800 3600–3800 MHz - - B44 TDD 703–803 703–803 MHz - - B45 TDD
5G Module Series - - B71 FDD 663–698 617–652 MHz - - B72 FDD 451–456 461–466 MHz - - B73 FDD 450–455 460–465 MHz - - B74 FDD 1427–1470 1475–1518 MHz - - B75 FDD 15 - 1432–1517 MHz - - B76 FDD 15 - 1427–1432 MHz - - B85 FDD 698–716 728–746 MHz - - B87 FDD 410–415 420–425 MHz - - B88 FDD 412–417 422–427 MHz RG520F&RG520N_Series_Hardware_Design 116 / 116
OEM/Integrators Installation Manual Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in mobile or fixed applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations 4. For FCC Part 15.
Antenna (1) The antenna must be installed such that 20 cm is maintained between the antenna and users, (2) The transmitter module may not be co-located with any other transmitter or antenna. In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC/IC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product.
Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules.
This device is intended only for OEM integrators under the following conditions: (For module device use) 1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and 2) The transmitter module may not be co-located with any other transmitter or antenna. As long as 2 conditions above are met, further transmitter test will not be required.
Industry Canada Statement This device complies with Industry Canada’s licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause interference; and (2) This device must accept any interference, including interference that may cause undesired operation of the device. Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence.
Cet appareil est conçu uniquement pour les intégrateurs OEM dans les conditions suivantes: (Pour utilisation de dispositif module) 1) L'antenne doit être installée de telle sorte qu'une distance de 20 cm est respectée entre l'antenne et les utilisateurs, et 2) Le module émetteur peut ne pas être coïmplanté avec un autre émetteur ou antenne. Tant que les 2 conditions ci-dessus sont remplies, des essais supplémentaires sur l'émetteur ne seront pas nécessaires.
Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the user’s manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual.