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L70

Quectel GPS Engine

Hardware Design

L70_HD_V1.0

Summary of content (36 pages)

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L70 Quectel GPS Engine Hardware Design L70_HD_V1.
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L70 Hardware Design Document Title L70 Hardware Design Revision 1.0 Date 2012-07-13 Status Released Document Control ID L70_HD_V1.0 l e t l c a i e t u n Q fide n o C General Notes Quectel offers this information as a service to its customers, to support application and engineering efforts that use the products designed by Quectel. The information provided is based upon requirements specifically provided for customers of Quectel.
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L70 Hardware Design Contents Contents ............................................................................................................................................ 2 Table Index........................................................................................................................................ 4 Figure Index ...................................................................................................................................... 5 0. Revision history ..........
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L70 Hardware Design 5.3. Current consumption ......................................................................................................... 28 5.4. Electro-static discharge ..................................................................................................... 28 5.5. Reliability test ................................................................................................................... 29 6. Mechanics ....................................................................
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L70 Hardware Design Table Index TABLE 1: RELATED DOCUMENTS ..................................................................................................... 7 TABLE 2: TERMS AND ABBREVIATIONS ......................................................................................... 7 TABLE 3: MODULE KEY FEATURES .................................................................................................. 9 TABLE 4: THE PROTOCOL SUPPORTED BY THE MODULE ...............................................
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L70 Hardware Design Figure Index FIGURE 1: MODULE BLOCK DIAGRAM ......................................................................................... 10 FIGURE 2: ALWAYSLOCATETM MODE ............................................................................................. 12 FIGURE 3: REFERENCE RESET CIRCUIT USING OC CIRCUIT ................................................... 17 FIGURE 4: REFERENCE RESET CIRCUIT USING BUTTON ..........................................................
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L70 Hardware Design 0. Revision history Revision Date Author Description of change 1.0 2012-07-10 King HAO Initial l e t l c a i e t u n Q fide n o C L70_HD_V1.
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L70 Hardware Design 1. Introduction This document defines and specifies L70 GPS module. It describes L70 hardware interface and its external application reference circuits, mechanical size and air interface. This document can help customer quickly understand the interface specifications, electrical and mechanical details of L70 module. With the help of this document and other related documents, customer can use L70 module to design and set up applications easily. l e t l c a i e t u n Q fide n o C 1.1.
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L70 Hardware Design I/O Input /Output Kbps Kilo Bits Per Second LNA Low Noise Amplifier MSAS Multi-Functional Satellite Augmentation System NMEA National Marine Electronics Association PDOP Position Dilution of Precision PMTK MTK Proprietary Protocol PPS Pulse Per Second PRN Pseudo Random Noise Code QZSS Quasi-Zenith Satellite System l e t l c a i e t u n Q fide n o C RHCP Right Hand Circular Polarization RMC Recommended Minimum Specific GNSS Data RTCM Radio Technical Commission f
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L70 Hardware Design 2. Product concept The L70 GPS module brings the high performance of the MTK positioning engine to the industrial applications. It is able to achieve the industry’s highest level of sensitivity, accuracy and TTFF with the lowest power consumption in a small-footprint lead-free package. With 66 search channels and 22 simultaneous tracking channels, it acquires and tracks satellites in the shortest time even at indoor signal level.
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L70 Hardware Design   Cold Start (Autonomous) 35s average@-130dBm Warm Start (Autonomous) 30s average@-130dBm  Hot Start (Autonomous) 1s@-130dBm Horizontal Position Accuracy(@-130dBm)  <2.5 m CEP Max Update Rate  Up to 10Hz,1Hz by default Accuracy of 1PPS Signal  Typical accuracy <15ns (Not support time service)  Time pulse width 100ms Velocity Accuracy  Without Aid 0.1 m/s Acceleration Accuracy  Without Aid 0.
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L70 Hardware Design 2.3. Evaluation board In order to help customers on the application of L70 module, Quectel supplies an Evaluation Board (EVB) with appropriate power supply, RS-232 serial cable, active antenna and other peripherals to test the module. For more details, please refer to the document [1]. 2.4. New technology l e t l c a i e t u n Q fide n o C 2.4.1.
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L70 Hardware Design The following picture has shown the rough relationship between power consumption and the different scenarios in daily life when the AlwaysLocateTM mode is enabled. l e t l c a i e t u n Q fide n o C Figure 2: AlwaysLocateTM mode The position accuracy in AlwaysLocateTMmode will be somewhat degraded, especially in high speed. So this mode is not recommended in the applications of vehicle system. AlwaysLocateTMmode is disabled by default.
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L70 Hardware Design 2.5. Protocol The module supports standard NMEA-0813 protocol and MTK proprietary protocol (PMTK messages) that can be used to provide extended capabilities for many applications. The module is capable of supporting the following NMEA formats: GGA, GSA, GLL, GSV, RMC, VTG . Table 4: The protocol supported by the module Protocol NMEA PMTK Type Output, ASCII, 0183, 3.
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L70 Hardware Design 3. Application interface The module is equipped with an 18-pin 1.1mm pitch SMT pad that connects to the user application platform. Sub-interfaces included in these pads are described in details in the following chapters. 3.1.
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L70 Hardware Design PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT VRESET 9 I System reset, low level active. VILmin=-0.3V VILmax=0.8V VIHmin=2.0V VIHmax=3.6V If unused, keep this pin open or connect it to the VCC. General purpose input/output PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT EXTINT0 5 I External interrupt input VILmin=-0.3V VILmax=0.8V VIHmin=2.0V VIHmax= 3.6V This pin can be used to enter or exit from the standby mode.
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L70 Hardware Design 3.3. Operating modes The table below briefly summarizes the various operating modes of L70 module. Table 6: Overview of operating modes Mode Function Acquisition mode The module starts to search satellite, determine visible satellites and coarse carrier frequency and code phase of satellite signals. When the acquisition is completed, it switches to tracking mode automatically.
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L70 Hardware Design 3.5. Turn on and Turn off 3.5.1. Turn on The module will be turned on when VCC is supplied. 3.5.2. Turn off Shutting down the module's main power supply is the only way to turn off the module. In this case, if the backup power is still present, the module will enter the backup mode. l e t l c a i e t u n Q fide n o C 3.5.3. Restart L70 module can be restarted by driving the VRESET to a low level voltage for a certain time and then releasing it.
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L70 Hardware Design The restart timing has been illustrated in Figure 5. VCC <170ms Pulldown > 10ms VIH >2.0V VRESET (INPUT) VIL<0.8V l e t l c a i e t u n Q fide n o C Figure 5: Timing of restarting system 3.6. Power saving modes 3.6.1. Standby mode Standby mode is one of the power saving modes, in this mode, the UART serial port is still accessible, but has no NEMA messages output, the current consumption of the module is also minimal.
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L70 Hardware Design Table 8: Pin definition of the V_BCKP pin Name Pin No. Function V_BCKP 6 Backup voltage supply Note: The V_BCKP could not keep open. The V_BCKP pin should be connected to a battery or a capacitor for GPS module warm/hot start and AGPS.
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L70 Hardware Design l e t l c a i e t u n Q fide n o C Figure 8: Seiko XH414H-IV01E charge characteristic 3.6.3. Periodic standby mode Periodic standby mode is a periodic mode that can control the on/off time of L70 module periodically to reduce power consumption. It supports the module switches automatically between normal mode and standby mode. The following figure has shown the operation of periodic mode. Figure 9: Periodic mode Sending PMTK command can enter periodic standby mode.
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L70 Hardware Design 3.6.4. AlwaysLocateTM standby mode AlwaysLocateTM is an intelligent controller of L70 normal mode and standby mode. AlwaysLocateTM standby mode supports the module to switch automatically between normal mode and standby mode. According to the environmental and motion conditions, the module can adaptively adjust the on/off time to achieve the balance between positioning accuracy and power consumption. For more details, please refer to chapter 2.4.2.
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L70 Hardware Design   input. The default output NMEA type setting is RMC, VTG, GGA, GSA, GSV, GLL. UART port supports the following data rates: 4800, 9600, 14400, 19200, 38400, 57600, 115200. The default setting is 9600bps, 8 bits, no parity bit, 1 stop bit . Hardware flow control and synchronous operation are not supported. The UART port does not support the RS-232 level but only supports the CMOS level.
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L70 Hardware Design Table 10: Pin definition of the ANTON Name Pin No. Function ANTON 13 Control the power supply of the active GPS antenna or the enable pin of the external LNA. Active Antenna L70_Module LNA RF_IN EN VCC l e t l c a i e t u n Q fide n o C L1 47nH R3 100R R1 10R ANTON Q1 Q2 R2 10K VCC_RF Figure 12: ANTON control circuit Figure 13: Timing of EXTINT0 and ANTON L70_HD_V1.
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L70 Hardware Design 4. Antenna interface The L70 module receives L1 band signal from GPS satellites at a nominal frequency of 1575.42MHz. The RF signal is connected to the RF_IN pin. Customer should use a controlled impedance transmission line of 50 Ohm to connect to RF_IN. 4.1. Antenna L70 module can be connected to passive or active antenna.
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L70 Hardware Design Passive Antenna BGA715L7 R1 0R C1 NM C2 NM П matching circuit R2 150R RF_IN EN vcc LNA L70_Module R3 100R ANTON VCC_RF l e t l c a i e t u n Q fide n o C Figure 14: Reference design for passive antenna with LNA Note: VCC_RF is directly connected to the power supply of L70 module internally. If VCC_RF is not suitable to the external LNA, using R2 as a divider or adding an external LDO circuit to get the required voltage. R3 is used as a current limiting resistor. 4.2.2.
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L70 Hardware Design Active Antenna П matching circuit L70_Module C1 NM C2 NM R3 0R RF_IN 10R L1 47nH R1 ANTON R2 10K Q1 Q2 VCC_RF l e t l c a i e t u n Q fide n o C Figure 15: Reference design for active antenna without LNA Note: The rated power of resistor R1 should be chosen no less than 1 watt in case active antenna is shorted unexpectedly. In order to reduce consumption, the value of resistor R2 is not recommended to choose too small. 4.2.3.
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L70 Hardware Design 5. Electrical, reliability and radio characteristics 5.1. Absolute maximum ratings Absolute maximum rating for power supply and voltage on digital pins of the module are listed in Table 12. Table 12: Absolute maximum ratings l e t l c a i e t u n Q fide n o C Parameter Min Max Unit Power supply voltage （VCC） -0.3 4.3 V Backup battery voltage (V_BCKP) -0.3 4.3 V Input voltage at digital pins -0.3 3.
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L70 Hardware Design * This figure can be used to determine the maximum current capability of power supply. Note: Operation beyond the "Operating Conditions" is not recommended and extended exposure beyond the "Operating Conditions" may affect device reliability. 5.3. Current consumption The values for current consumption are shown in Table 14.
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L70 Hardware Design 5.5. Reliability test Table 16: Reliability test Test term Condition Standard Thermal shock -30°C...+80°C, 144 cycles Damp heat, cyclic +55°C; >90% Rh 6 cycles for 144 hours Vibration shock 2 3 GB/T 2423.22-2002 Test Na IEC 68-2-14 Na 2 3 5~20Hz,0.96m /s ;20~500Hz,0.96m /s -3dB/oct, IEC 68-2-30 Db Test 2423.13-1997 Test Fdb l e t l c a i e t u n Q fide n o C Heat test 1hour/axis; no function IEC 68-2-36 Fdb Test 85°C, 2 hours, Operational GB/T 2423.
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L70 Hardware Design 6. Mechanics This chapter describes the mechanical dimensions of the module. 6.1. Mechanical view of the module l e t l c a i e t u n Q fide n o C Figure 17: L70 Top view and Side view（Unit:mm） 6.2. L70 Bottom dimension and recommended footprint Figure 18: L70 Bottom dimension（Unit:mm） L70_HD_V1.
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L70 Hardware Design Keep Out l e t l c a i e t u n Q fide n o C Figure 19: Footprint of recommendation（Unit:mm） Notes： 1. The keep-out area should be covered by solder mask and top silk layer for isolation between the top layer of host board and the bottom layer of the module. 2. For easy maintenance of this module and accessing to these pads, please keep a distance of no less than 3mm between the module and other components in host board. 6.3.
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L70 Hardware Design 6.4. Bottom view of the module 18 1 l e t l c a i e t u n Q fide n o C 10 9 Figure 21: Bottom view of the module L70_HD_V1.
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L70 Hardware Design 7. Manufacturing 7.1. Assembly and soldering L70 is intended for SMT assembly and soldering in a Pb-free reflow process on the top side of the PCB. It is suggested that the minimum height of solder paste stencil is 130um to ensure sufficient solder volume. Pad openings of paste mask can be increased to ensure proper soldering and solder wetting over pads. It is suggested that peak reflow temperature is 235~245ºC (for SnAg3.0Cu0.5 alloy). Absolute max reflow temperature is 260ºC.
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L70 Hardware Design L70 should be baked for 192 hours at temperature 40℃+5℃/-0℃ and <5% RH in low-temperature containers, or 24 hours at temperature 125℃±5℃ in high-temperature containers. Care should be taken that plastic tray is not heat resistant. L70 should be taken out before preheating, otherwise, the tray maybe damaged by high-temperature heating. 7.3. ESD safe L70 module is an ESD sensitive device and should be careful to handle. 7.4.
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Shanghai Quectel Wireless Solutions Co., Ltd. Room 501, Building 13, No.99, TianZhou Road, Shanghai, China 200233 Tel: +86 21 5108 6236 Mail: info@quectel.