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SC200R Series

Hardware Design

Smart Module Series

Version: 1.1

Date: 2020-09-09

Status: Released

www.quectel.com

Summary of content (126 pages)

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SC200R Series Hardware Design Smart Module Series Version: 1.1 Date: 2020-09-09 Status: Released www.quectel.
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Smart Module Series SC200R Series Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://www.quectel.com/support/sales.htm.
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Smart Module Series SC200R Series Hardware Design About the Document Revision History Version Date Author Description 1.0 2019-12-30 Arsene TONG Initial Jasper LAI/ Jamie SHI 1. Updated SC200R-EM frequency bands (Chapter 2.1/6.1): Added B4 in LTE-FDD Deleted B39 in LTE-TDD Added B4 in WCDMA 2. Added Galileo in supported GNSS (Chapter 2.1/2.2/5/6.3). 3. Added a note for the wakeup of LDO6_1V8 during sleep mode (Chapter 3.3). 4.
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Smart Module Series SC200R Series Hardware Design Contents About the Document ................................................................................................................................... 2 Contents ....................................................................................................................................................... 3 Table Index ............................................................................................................................
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Smart Module Series SC200R Series Hardware Design 3.22.1. Reference Circuit Design for Microphone Interfaces ..................................................... 67 3.22.2. Reference Circuit Design for Earpiece Interface ........................................................... 68 3.22.3. Reference Circuit Design for Headphone Interface ....................................................... 69 3.22.4. Reference Circuit Design for Loudspeaker Interface....................................................
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Smart Module Series SC200R Series Hardware Design 10 11 12 13 Appendix A References................................................................................................................... 117 Appendix B GPRS Coding Schemes ............................................................................................. 122 Appendix C GPRS Multi-slot Classes ............................................................................................
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Smart Module Series SC200R Series Hardware Design Table Index Table 1: SC200R-CE Frequency Bands .................................................................................................... 13 Table 2: SC200R-EM* Frequency Bands .................................................................................................. 14 Table 3: SC200R-NA Frequency Bands.....................................................................................................
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Smart Module Series SC200R Series Hardware Design Table 42: Antenna Requirements ............................................................................................................... 86 Table 43: Absolute Maximum Ratings ........................................................................................................ 89 Table 44: Power Supply Ratings ................................................................................................................
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Smart Module Series SC200R Series Hardware Design Figure Index Figure 1: Functional Diagram ..................................................................................................................... 19 Figure 2: Pin Assignment (Top View) ......................................................................................................... 21 Figure 3: Voltage Drop Sample ..................................................................................................................
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Smart Module Series SC200R Series Hardware Design Figure 42: Bottom Dimensions (Bottom View) ......................................................................................... 109 Figure 43: Recommended Footprint (Top View) ...................................................................................... 110 Figure 44: Top View of the Module............................................................................................................ 111 Figure 45: Bottom View of the Module ......
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Smart Module Series SC200R Series Hardware Design 1 Introduction This document, describing SC200R-WF module and its air and hardware interfaces connected to your applications, informs you of the interface specifications, electrical and mechanical details, as well as other related information of the module. With the application notes and user guides provided separately, you can easily use SC200R-WF to design and set up mobile applications.
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Smart Module Series SC200R Series Hardware Design including: This product must be in-stalled and operated with a minimum distance of 20 cm between the radiator and user body. This device have got a FCC ID: XMR20SC200RWF.
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Smart Module Series SC200R Series Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product.
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Smart Module Series SC200R Series Hardware Design 2 Product Concept 2.1. General Description SC200R is a series of 4G Smart LTE module based on Qualcomm platform and Android operating system, and provides industrial grade performance. Its general features are listed below:       Supports worldwide LTE-FDD, LTE-TDD, DC-HSPA+, HSPA+, HSDPA, HSUPA, WCDMA, EVDO/CDMA, EDGE and GPRS coverage. Supports short-range wireless communication via Wi-Fi 802.11a/b/g/n and BT 4.2 LE.
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Smart Module Series SC200R Series Hardware Design GNSS GPS: 1575.42 ±1.023 MHz GLONASS: 1597.5–1605.8 MHz BeiDou: 1561.098 ±2.046 MHz Galileo: 1575.42 ±1.023 MHz Table 2: SC200R-EM* Frequency Bands Mode Frequency LTE-FDD B1/B2/B3/B4/B5/B7/B8/B20/B28 LTE-TDD B38/B40/B41 WCDMA B1/B2/B4/B5/B8 GSM 850/900/1800/1900 MHz Wi-Fi 802.11a/b/g/n 2402–2482 MHz 5180–5825 MHz BT 4.2 LE 2402–2480 MHz GNSS GPS: 1575.42 ±1.023 MHz GLONASS: 1597.5–1605.8 MHz BeiDou: 1561.098 ±2.046 MHz Galileo: 1575.42 ±1.
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Smart Module Series SC200R Series Hardware Design Table 4: SC200R-JP* Frequency Bands Mode Frequency LTE-FDD B1/B3/B5/B8/B11/B18/B19/B21/B26/B28 LTE-TDD B41 WCDMA B1/B6/B8/B19 Wi-Fi 802.11a/b/g/n 2402–2482 MHz 5180–5825 MHz BT 4.2 LE 2402–2480 MHz GNSS GPS: 1575.42 ±1.023 MHz GLONASS: 1597.5–1605.8 MHz BeiDou: 1561.098 ±2.046 MHz Galileo: 1575.42 ±1.023 MHz Table 5: SC200R-WF* Frequency Bands Mode Frequency Wi-Fi 802.11a/b/g/n 2402–2482 MHz 5180–5825 MHz BT 4.
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Smart Module Series SC200R Series Hardware Design 2.2. Key Features The following table describes the detailed features of SC200R series module. Table 6: Key Features Feature Details Application Processor 64-bit quad-core ARM Cortex-A53 microprocessor, up to 1.
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Smart Module Series SC200R Series Hardware Design CDMA2000 Features Supports 3GPP2 CDMA2000 1X Advanced, CDMA2000 1xEV-DO Rev.A  EVDO: Max. 3.1 Mbps (DL)/Max. 1.8 Mbps (UL)  1X Advanced: Max. 307.2 kbps (DL)/Max. 307.2 kbps (UL) GSM Features R99: CSD: 9.6 kbps, 14.4 kbps GPRS: Supports GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max. 107 kbps (DL)/Max. 85.
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Smart Module Series SC200R Series Hardware Design USB Interface Compliant with USB 2.
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Smart Module Series SC200R Series Hardware Design 2.3. Functional Diagram The following figure shows a block diagram of SC200R series module and illustrates the major functional parts.
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Smart Module Series SC200R Series Hardware Design 3 Application Interfaces 3.1. General Description SC200R is a series of SMD type modules with 146 LCC pins and 128 LGA pins. The following chapters provide the detailed description of pins/interfaces listed below.
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Smart Module Series SC200R Series Hardware Design 3.2.
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Smart Module Series SC200R Series Hardware Design 3.3. Pin Description Table 7: I/O Parameters Definition Type Description AI Analog input AO Analog output DI Digital input DO Digital output IO Bidirectional OD Open drain PI Power input PO Power output The following table shows the pin definition and electrical characteristics of the module. Table 8: Pin Description Power Supply Pin Name VBAT_BB VBAT_RF VRTC LDO5_1V8 Pin No.
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Smart Module Series SC200R Series Hardware Design LDO6_1V81) LDO10_2V85 LDO17_2V85 LDO16_2V8 125 156 129 193 PO PO PO PO 1.8 V output power supply 2.85 V output power supply 2.85 V output power supply 2.8 V output power supply Vnorm = 1.8 V IOmax = 150 mA Power supply for sensors, cameras, and I2C pull-up circuit. If it is used, connect an external 1.0–4.7 μF capacitor to this pin in parallel. If it is not used, keep it open. Vnorm = 2.85 V IOmax = 150 mA Reserved power supply.
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Smart Module Series SC200R Series Hardware Design Audio Interfaces Pin Name Pin No.
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Smart Module Series SC200R Series Hardware Design USB_ID 16 DI USB ID detect Pin No. I/O Description High level by default. (U)SIM Interfaces Pin Name DC Characteristics Comment Active low. Externally pull it up to 1.8 V. If it is not used, keep it open. This function is disabled by default via software. Cannot be multiplexed into a generic GPIO. USIM2_DET 17 DI (U)SIM2 card hot-plug detect VILmax = 0.63 V VIHmin = 1.
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Smart Module Series SC200R Series Hardware Design USIM1_DET 22 DI (U)SIM1 card hot-plug detect VILmax = 0.63 V VIHmin = 1.17 V USIM1_RST 23 DO (U)SIM1 card reset USIM1_CLK 24 DO (U)SIM1 card clock VOLmax = 0.4 V VOHmin = 0.8 × USIM1_VDD USIM1_DATA 25 IO (U)SIM1 card data VILmax = 0.2 × USIM1_VDD VIHmin = 0.7 × USIM1_VDD VOLmax = 0.4 V VOHmin = 0.8 × USIM1_VDD For 1.8 V (U)SIM: Vmax = 1.85 V Vmin = 1.75 V For 2.95 V (U)SIM: Vmax = 3.1 V Vmin = 2.8 V Either 1.8 V or 2.
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Smart Module Series SC200R Series Hardware Design DBG_TXD 94 DO UART2 (debug UART) transmit data UART1_RXD 153 DI UART1 receive data VILmax = 0.63 V VIHmin = 1.17 V UART1_TXD 154 DO UART1 transmit data VOLmax = 0.45 V VOHmin = 1.35 V Pin Name Pin No. I/O Description DC Characteristics Comment SD_LDO11 38 PO 2.95 V output power supply Vnorm = 2.95 V IOmax = 800 mA Power supply for SD card. PO 1.8/2.95 V output power supply Vnorm = 1.8/2.
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Smart Module Series SC200R Series Hardware Design TP_I2C_SCL 47 OD I2C clock signal of TP TP_I2C_SDA 48 OD I2C data signal of TP Pin No. I/O Description DC Characteristics VOLmax = 0.45 V VOHmax = VBAT_BB Externally pull them up to 1.8 V. Can be used for other I2C devices. LCM Interface Pin Name PWM 29 DO PWM output which adjusts the backlight brightness LCD_RST 49 DO LCD reset VOLmax = 0.45 V VOHmin = 1.35 V LCD_TE 50 DI LCD tearing effect VILmax = 0.63 V VIHmin = 1.
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Smart Module Series SC200R Series Hardware Design CSI1_LN0_N 65 AI Camera MIPI data 0 signal (-) CSI1_LN0_P 66 AI Camera MIPI data 0 signal (+) CSI1_LN1_N 67 AI Camera MIPI data 1 signal (-) CSI1_LN1_P 68 AI Camera MIPI data 1 signal (+) CSI1_LN3_N 70 AI Camera MIPI data 3 signal (-) CSI1_LN3_P 71 AI Camera MIPI data 3 signal (+) CSI1_LN2_N 72 AI Camera MIPI data 2 signal (-) CSI1_LN2_P 73 AI Camera MIPI data 2 signal (+) CSI0_CLK_N 157 AI Camera MIPI clock signal (-) CS
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Smart Module Series SC200R Series Hardware Design CAM0_PWDN 80 DO Power down signal of camera CAM1_RST 81 DO Reset signal of camera CAM1_PWDN 82 DO Power down signal of camera CAM_I2C_SCL 83 OD I2C clock signal of camera CAM_I2C_SDA 84 OD I2C data signal of camera CAM2_MCLK 165 DO Clock signal of camera CAM2_RST 164 DO Reset signal of camera CAM2_PWDN 163 DO Power down signal of camera DCAM_I2C_SCL 166 OD I2C clock signal of camera DCAM_I2C_SDA 205 OD I2C data signal
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Smart Module Series SC200R Series Hardware Design Pin Name Pin No. I/O Description DC Characteristics Comment Dedicated for external sensors. Cannot be used for touch panel, NFC, I2C keyboard, etc. Externally pull them up to 1.8 V. SENSOR_I2C_ SCL 91 OD I2C clock for external sensor SENSOR_I2C_ SDA 92 OD I2C data for external sensor Pin Name Pin No. I/O Description BAT_SNS 133 AI Battery voltage detect The maximum input voltage is 4.2 V.
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Smart Module Series SC200R Series Hardware Design Pin Name Pin No. I/O Description ANT_MAIN 87 AI/ AO Main antenna interface ANT_DRX 131 AI Rx-diversity antenna interface ANT_GNSS2) 121 AI GNSS antenna interface ANT_WIFI/BT 77 AI/ AO Wi-Fi/BT antenna interface Pin Name Pin No.
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Smart Module Series SC200R Series Hardware Design GPIO_46 113 IO GPIO GPIO_89 115 IO GPIO GPIO_23 116 IO GPIO GPIO_22 117 IO GPIO GPIO_21 118 IO GPIO GPIO_20 119 IO GPIO GPIO_62 123 IO GPIO GPIO_47 124 IO GPIO GPIO_6 167 IO GPIO GPIO_7 168 IO GPIO GPIO_127 169 IO GPIO GPIO_34 170 IO GPIO GPIO_90 177 IO GPIO GPIO_39 201 IO GPIO GPIO_86 239 IO GPIO GPIO_88 264 IO GPIO GPIO_85 265 IO GPIO GPIO_61 267 IO GPIO I/O Description 194 IO Ext
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Smart Module Series SC200R Series Hardware Design RFFE3_CLK 260 IO GRFC used for RF tuner control RFFE3_DATA 262 IO GRFC used for RF tuner control Cannot be multiplexed into generic GPIOs. Emergency Download Interface Pin Name USB_BOOT Pin No. 46 I/O Description DC Characteristics Comment You can force the module to enter emergency download mode by pulling it up to LDO5_1V8 during power-up.
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Smart Module Series SC200R Series Hardware Design RESERVED 150–152, 173–175, 178–180, 183, 184, 192, 232, 242, 246, 249, 252–254, 257, 263, 270 Keep these pins open. NOTE 1. 1) When the module is in sleep mode, LDO6_1V8 wakes up periodically or randomly. Considering the actual requirement for power consumption during sleep mode, you can use either LDO6_1V8 or an external LDO for power supply. For lower power consumption, use an external LDO instead. 2. 2) SC200R-WF does not support GNSS. 3.4.
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Smart Module Series SC200R Series Hardware Design To decrease voltage drop, use a bypass capacitor of about 100 µF with low ESR (ESR = 0.7 Ω), and reserve a multi-layer ceramic chip capacitor (MLCC) array due to its ultra-low ESR. It is recommended to use three ceramic capacitors (100 nF, 33 pF, 10 pF) to compose the MLCC array and place these capacitors close to VBAT_BB/VBAT_RF pins. Additionally, add a 4.7 µF capacitor in parallel.
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Smart Module Series SC200R Series Hardware Design 3.4.3. Reference Design for Power Supply The power design for the module is very important, as the performance of the module largely depends on the power source. The power supply of SC200R series module should be able to provide sufficient current of at least 3 A. If the voltage drop between the input and output is not too high, it is suggested to use an LDO to supply power for the module.
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Smart Module Series SC200R Series Hardware Design 3.5. Turn on and off Scenarios 3.5.1. Turn on the Module Using PWRKEY The module can be turned on by driving the PWRKEY pin low for at least 1.6 s. The PWRKEY pin is pulled up to 1.8 V internally. It is recommended to use an open drain/collector driver to control PWRKEY. A simple reference circuit is illustrated in the following figure. R3 PWRKEY 1K >1.6 s R1 Turn on pulse Q1 4.
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Smart Module Series SC200R Series Hardware Design The turning on scenario is illustrated in the following figure. Figure 7: Timing of Turning on the Module NOTES 1. When the module is powered on for the first time, its timing of turning on may be different from that shown above. 2. Make sure that VBAT is stable before pulling down PWRKEY. It is recommended to wait until VBAT to be stable at 4.0 V for at least 30 ms before pulling down PWRKEY. Additionally, PWRKEY cannot be pulled down all the time.
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Smart Module Series SC200R Series Hardware Design 3.5.2. Turn off the Module Drive the PWRKEY pin low for at least 1 s, and then choose to turn off the module when the prompt window comes up. You can also force the module to power off by driving PWRKEY low for at least 8 s. The forced power-down scenario is illustrated in the following figure. Figure 8: Timing of Turning off the Module 3.6.
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Smart Module Series SC200R Series Hardware Design 3.7. Power Output SC200R series module supports output of regulated voltages for peripheral circuits. During application, it is recommended to connect a 33 pF and a 10 pF capacitor in parallel in the circuit to suppress high-frequency noise. Table 9: Power Description Pin Name Default Voltage (V) Driving Current (mA) Idle LDO5_1V8 1.8 20 Keep LDO6_1V81) 1.8 150 / LDO10_2V85 2.85 150 / LDO17_2V85 2.85 450 / LDO16_2V8 2.
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Smart Module Series SC200R Series Hardware Design 3.8. Battery Charging and Management SC200R series module supports battery charging. The battery charger in the module supports trickle charging, constant current charging and constant voltage charging modes, which optimize the charging procedure for Li-ion batteries.    Trickle charging: There are two steps in this mode. When the battery voltage is below 2.8 V, a 90 mA trickle charging current is applied to the battery.
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Smart Module Series SC200R Series Hardware Design A reference design for the battery charging circuit is shown below. Figure 10: Reference Design for Battery Charging Circuit Mobile devices such as mobile phones or handheld POS systems are powered by batteries. For different batteries, you should modify the charging and discharging curve correspondingly to achieve the best performance.
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Smart Module Series SC200R Series Hardware Design The following table shows the pin definition of USB interface. Table 11: Pin Definition of USB Interface Pin Name Pin No. I/O Description Comment Vmax = 6.2 V Vmin = 4.35 V Vnorm = 5.0 V USB_VBUS 141, 142 PI USB 5 V power input and USB connection detect USB_DM 13 AI/AO USB 2.0 differential data (-) USB_DP 14 AI/AO USB 2.0 differential data (+) USB_ID 16 AI USB ID detect USB 2.0 standard compliant. 90 Ω differential impedance.
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Smart Module Series SC200R Series Hardware Design Figure 12: USB Interface Reference Design (OTG Supported) In order to ensure USB performance, comply with the following principles when designing the USB interface.     Route the USB signal traces as differential pairs with total grounding. The impedance of USB differential trace should be 90 Ω. Keep the ESD protection devices as close as possible to the USB connector.
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Smart Module Series SC200R Series Hardware Design 3.10. UART Interfaces SC200R series module provides three UART interfaces and supports up to 4 Mbps:    UART5: 4-wire UART interface, hardware flow control supported UART2 (debug UART): 2-wire UART interface, used for debugging by default UART1: 2-wire UART interface Table 13: Pin Definition of UART Interfaces Pin Name Pin No.
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Smart Module Series SC200R Series Hardware Design The following figure is an example of connection between the module and PC. It is recommended to add a level translator and an RS-232 level translator chip between the module and PC. The following figure shows the reference design. Figure 14: RS-232 Level Match Circuit (for UART5) NOTE UART2 and UART1 are similar to UART5. For the reference design, refer to that of UART5. 3.11.
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Smart Module Series SC200R Series Hardware Design USIM2_RST 18 DO (U)SIM2 card reset USIM2_CLK 19 DO (U)SIM2 card clock USIM2_DATA 20 IO (U)SIM2 card data USIM2_VDD 21 PO (U)SIM2 card power supply Either 1.8 V or 2.95 V (U)SIM card is supported. Active low. Externally pull it up to 1.8 V. If it is not used, keep it open. This function is disabled by default via software. Cannot be multiplexed into a generic GPIO.
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Smart Module Series SC200R Series Hardware Design If you do not need to use USIM_DET, keep this pin open. The following is a reference circuit for (U)SIM interface with a 6-pin (U)SIM card connector. Figure 16: Reference Circuit for (U)SIM Interface with a 6-pin (U)SIM Card Connector In order to ensure good performance and avoid damage of (U)SIM cards, follow the criteria listed below during (U)SIM circuit design:        Place the (U)SIM card connector as close to the module as possible.
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Smart Module Series SC200R Series Hardware Design 3.12. SD Card Interface SD Card interface of SC200R series module supports SD 3.0 protocol. The pin definition of SD card interface is shown below. Table 15: Pin Definition of SD Card Interface Pin Name Pin No.
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Smart Module Series SC200R Series Hardware Design SD_LDO11 is the power supply for the SD card and can provide up to 800 mA output current. Due to the high output current, it is recommended that the trace width should be at least 0.8 mm. In order to ensure stability of output current, add a 4.7 μF and a 33 pF capacitor in parallel near the SD card connector. SD_CMD, SD_CLK, SD_DATA0, SD_DATA1, SD_DATA2, and SD_DATA3 are all high-speed signal lines.
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Smart Module Series SC200R Series Hardware Design 3.13. GPIO Interfaces SC200R series module has abundant GPIO interfaces with a power domain of 1.8 V. The pin definition is listed below. Table 17: Pin Definition of GPIO Interfaces Pin Name Pin No. GPIO No.
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Smart Module Series SC200R Series Hardware Design GPIO_59 100 GPIO_59 B-PD:nppukp Wakeup GPIO_61 267 GPIO_61 B-PD:nppukp Wakeup GPIO_62 123 GPIO_62 B-PD:nppukp Wakeup GPIO_63 108 GPIO_63 B-PD:nppukp Wakeup GPIO_66 106 GPIO_66 B-PD:nppukp GPIO_85 265 GPIO_85 B-PD:nppukp GPIO_86 239 GPIO_86 B-PD:nppukp GPIO_87 105 GPIO_87 B-PD:nppukp GPIO_88 264 GPIO_88 B-PD:nppukp GPIO_89 115 GPIO_89 B-PD:nppukp GPIO_90 177 GPIO_90 B-PD:nppukp Wakeup GPIO_93 112 GPIO_93 B-
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Smart Module Series SC200R Series Hardware Design CAM0_RST 79 GPIO_128 B-PD:nppukp Wakeup CAM0_PWDN 80 GPIO_126 B-PD:nppukp Wakeup CAM1_RST 81 GPIO_129 B-PD:nppukp CAM1_PWDN 82 GPIO_125 B-PD:nppukp CAM2_MCLK 165 GPIO_27 B-PD:nppukp CAM2_RST 164 GPIO_38 B-PD:nppukp Wakeup CAM2_PWDN 163 GPIO_41 B-PD:nppukp Wakeup VOL_UP 95 GPIO_91 B-PD:nppukp Wakeup VOL_DOWN 96 GPIO_50 B-PD:nppukp Wakeup UART5_TXD 34 GPIO_16 B-PD:nppukp UART5_RXD 35 GPIO_17 B-PD:nppukp UART5_
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Smart Module Series SC200R Series Hardware Design 3.14. I2C Interfaces SC200R series module provides four I2C interfaces. All I2C interfaces are open drain signals and therefore you must pull them up externally. The reference power domain is 1.8 V. The SENSOR_I2C interface only supports sensors of aDSP architecture. CAM_I2C and DCAM_I2C signals are controlled by Linux Kernel code and support connection with devices related to video output. Table 18: Pin Definition of I2C Interfaces Pin Name Pin No.
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Smart Module Series SC200R Series Hardware Design UART5_CTS 36 DO SPI5 chip select Can be multiplexed into SPI5_CS GPIO_22 117 DO SPI6 chip select Can be multiplexed into SPI6_CS GPIO_23 116 DO SPI6 clock Can be multiplexed into SPI6_CLK GPIO_20 119 DO SPI6 data output Can be multiplexed into SPI6_MOSI GPIO_21 118 DI SPI6 data input Can be multiplexed into SPI6_MISO GPIO_87 105 DO SPI7 chip select Can be multiplexed into SPI7_CS GPIO_85 265 DO SPI7 data output Can be multi
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Smart Module Series SC200R Series Hardware Design The motor is driven by an exclusive circuit, and a reference circuit is shown below. Figure 18: Reference Circuit for Motor Connection When the motor stops working and the VIB_DRV_N is disconnected, the redundant electricity on the motor can be discharged from the circuit loop formed by diodes, thus avoiding damage to components. 3.18. LCM Interface SC200R series module provides one LCM interface, which is MIPI_DSI standard compliant.
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Smart Module Series SC200R Series Hardware Design DSI_LN0_N 54 AO LCD MIPI data 0 (-) DSI_LN0_P 55 AO LCD MIPI data 0 (+) DSI_LN1_N 56 AO LCD MIPI data 1 (-) DSI_LN1_P 57 AO LCD MIPI data 1 (+) DSI_LN2_N 58 AO LCD MIPI data 2 (-) DSI_LN2_P 59 AO LCD MIPI data 2 (+) DSI_LN3_N 60 AO LCD MIPI data 3 (-) DSI_LN3_P 61 AO LCD MIPI data 3 (+) A reference circuit for the LCM interface is shown below.
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Smart Module Series SC200R Series Hardware Design MIPI are high-speed signal lines. It is recommended to add common-mode filters in series near the LCM connector, to improve protection against electromagnetic radiation interference. It is recommended to read the LCM ID register through MIPI when compatible design with other displays is required. If several LCMs share the same IC, it is recommended that the LCM factory should burn an OTP register to distinguish different screens.
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Smart Module Series SC200R Series Hardware Design TP_INT 30 DI Interrupt signal of TP 1.8 V voltage domain. TP_RST 31 DO Reset signal of TP 1.8 V voltage domain. Active low. TP_I2C_SCL 47 OD I2C clock signal of TP TP_I2C_SDA 48 OD I2C data signal of TP Externally pull them up to 1.8 V. Can be used for other I2C devices. A reference circuit for the TP interface is shown below.
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Smart Module Series SC200R Series Hardware Design 3.20. Camera Interfaces Based on MIPI_CSI standard, SC200R series module supports two cameras (4-lane + 4-lane) or three cameras (4-lane + 2-lane + 1-lane), and the maximum pixel of the camera can be up to 13 MP. The video and photo quality is determined by various factors such as the camera sensor, camera lens quality, etc. Table 24: Pin Definition of Camera Interface Pin Name Pin No. I/O Description Comment LDO6_1V8 125 PO 1.
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Smart Module Series SC200R Series Hardware Design CSI0_LN2_N 160 AI Camera MIPI data 2 signal (-) CSI0_LN2_P 199 AI Camera MIPI data 2 signal (+) CSI0_LN3_N 161 AI Camera MIPI data 3 signal (-) CSI0_LN3_P 200 AI Camera MIPI data 3 signal (+) CAM0_MCLK 74 DO Clock signal of camera CAM1_MCLK 75 DO Clock signal of camera CAM0_RST 79 DO Reset signal of camera CAM0_PWDN 80 DO Power down signal of camera CAM1_RST 81 DO Reset signal of camera CAM1_PWDN 82 DO Power down signa
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Smart Module Series SC200R Series Hardware Design The following is a reference circuit design for 3-camera applications.
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Smart Module Series SC200R Series Hardware Design NOTE In 3-camera applications, CSI1_LN3_P and CSI1_LN3_N are used as CLK_P and CLK_N of camera1, CSI1_LN2_P and CSI1_LN2_N are used as the LN_P and LN_N of the camera1. 3.20.1. Design Considerations     Special attention should be paid to the pin definition of LCM/camera connectors. Make sure the module and the connectors are correctly connected . MIPI are high speed signal lines, supporting maximum data rate of up to 2.1 Gbps.
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Smart Module Series SC200R Series Hardware Design 61 DSI_LN3_P 12.35 63 CSI1_CLK_N 18.10 64 CSI1_CLK_P 18.05 65 CSI1_LN0_N 18.05 66 CSI1_LN0_P 18.10 67 CSI1_LN1_N 18.15 -0.05 0.05 0.05 68 CSI1_LN1_P 18.20 70 CSI1_LN3_N 18.10 71 CSI1_LN3_P 18.20 72 CSI1_LN2_N 18.05 0.10 0.05 73 CSI1_LN2_P 18.10 157 CSI0_CLK_N 22.60 196 CSI0_CLK_P 22.55 158 CSI0_LN0_N 22.55 -0.05 -0.05 197 CSI0_LN0_P 22.50 159 CSI0_LN1_N 20.25 198 CSI0_LN1_P 20.30 160 CSI0_LN2_N 20.
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Smart Module Series SC200R Series Hardware Design 3.21. Sensor Interfaces SC200R series module supports communication with sensors via I2C interfaces, and it supports ALS/PS, compass, accelerometer, gyroscope, etc. Table 26: Pin Definition of Sensor Interfaces Pin Name Pin No.
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Smart Module Series SC200R Series Hardware Design MIC3_P 148 AI Secondary microphone input (+) MIC_BIAS1 147 AO Microphone bias voltage 1 EAR_P 8 AO Earpiece output (+) EAR_N 9 AO Earpiece output (-) SPK_P 10 AO Speaker output (+) SPK_N 11 AO Speaker output (-) HPH_R 136 AO Headphone right channel output HPH_REF 137 AO Headphone reference ground HPH_L 138 AO Headphone left channel output HS_DET 139 AI Headset insertion detect      VO = 1.6–2.
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Smart Module Series SC200R Series Hardware Design Figure 24: Reference Circuit Design for MEMS Microphone Interface 3.22.2.
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Smart Module Series SC200R Series Hardware Design 3.22.3. Reference Circuit Design for Headphone Interface Figure 26: Reference Circuit Design for Headphone Interface 3.22.4. Reference Circuit Design for Loudspeaker Interface Figure 27: Reference Circuit Design for Loudspeaker Interface 3.22.5. Design Considerations for Audio Interfaces It is recommended to use the electret microphone with dual built-in capacitors (e.g. 10 pF and 33 pF) to filter out RF interference, thus reducing TDD noise.
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Smart Module Series SC200R Series Hardware Design technique. Therefore, you should consult the capacitor vendors to choose the most suitable capacitor to filter out the high-frequency noises. The severity of RF interference in the voice channel during GSM transmitting largely depends on the application design. In some cases, EGSM900 TDD noise is more severe; while in other cases, DCS1800 TDD noise is more obvious. Therefore, you should select a suitable capacitor accroding to the test results.
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Smart Module Series SC200R Series Hardware Design 4 Wi-Fi and BT SC200R series module provides a shared antenna interface ANT_WIFI/BT for Wi-Fi and Bluetooth (BT) functions. The interface impedance is 50 Ω. You can connect external antennas such as PCB antenna, sucker antenna, and ceramic antenna to the module via the interface to achieve Wi-Fi and BT functions. 4.1. Wi-Fi Overview SC200R series module supports 2.4/5 GHz dual-band WLAN based on IEEE 802.11a/b/g/n standard protocols.
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Smart Module Series SC200R Series Hardware Design 802.11n HT40 MCS0 14 dBm ±2.5 dB 802.11n HT40 MCS7 13 dBm ±2.5 dB 802.11a 6 Mbps 15 dBm ±2.5 dB 802.11a 54 Mbps 13 dBm ±2.5 dB 802.11n HT20 MCS0 14 dBm ±2.5 dB 802.11n HT20 MCS7 13 dBm ±2.5 dB 802.11n HT40 MCS0 14 dBm ±2.5 dB 802.11n HT40 MCS7 13 dBm ±2.5 dB Standard Rate Sensitivity 802.11b 1 Mbps -96 802.11b 11 Mbps -87 802.11g 6 Mbps -90 802.11g 54 Mbps -73 802.11n HT20 MCS0 -89 802.11n HT20 MCS7 -71 802.
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Smart Module Series SC200R Series Hardware Design Reference specifications are listed below:   IEEE 802.11n WLAN MAC and PHY, October 2009 + IEEE 802.11-2007 WLAN MAC and PHY, June 2007 IEEE Std 802.11a, IEEE Std 802.11b, IEEE Std 802.11g: IEEE 802.11-2007 WLAN MAC and PHY, June 2007 4.2. BT Overview SC200R series module supports BT 4.2 (BR/EDR + BLE) specification, as well as GFSK, 8-DPSK, π/4-DQPSK modulation modes.    Maximally supports up to 7 wireless connections. Maximally supports up to 3.
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Smart Module Series SC200R Series Hardware Design 4.2.1. BT Performance The following table lists the BT transmitting and receiving performance of SC200R series module. Table 31: BT Transmitting and Receiving Performance Transmitter Performance Packet Types DH5 2-DH5 3-DH5 Transmitting Power 10.0 10.0 9.
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Smart Module Series SC200R Series Hardware Design 5 GNSS SC200R series module integrates a Qualcomm IZat™ GNSS engine (GEN 8C) which supports multiple positioning and navigation systems including GPS, GLONASS, Galileo and BeiDou. With an embedded LNA, the module provides greatly improved positioning accuracy. 5.1. GNSS Performance The following table lists the GNSS performance of the module in conduction mode. Table 32: GNSS Performance Parameter Sensitivity TTFF Static Drift Description Typ.
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Smart Module Series SC200R Series Hardware Design 5.2. GNSS RF Design Guidelines Bad design of antenna and layout may cause reduced GNSS receiving sensitivity, longer GNSS positioning time, or reduced positioning accuracy. In order to avoid this, follow the reference design rules as below:      Maximize the distance between the GNSS RF part and the GPRS RF part (including trace routing and antenna layout) to avoid mutual interference.
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Smart Module Series SC200R Series Hardware Design 6 Antenna Interfaces SC200R series module provides four antenna interfaces for the main antenna, Rx-diversity antenna, Wi-Fi/BT antenna and GNSS antenna respectively. The antenna ports have an impedance of 50 Ω. 6.1. Main/Rx-diversity Antenna Interfaces The pin definition of main/Rx-diversity antenna interfaces is shown below. Table 33: Pin Definition of Main/Rx-diversity Antenna Interfaces Pin Name Pin No.
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Smart Module Series SC200R Series Hardware Design LTE-FDD B5 869–894 824–849 MHz LTE-FDD B8 925–960 880–915 MHz LTE-TDD B34 2010–2025 2010–2025 MHz LTE-TDD B38 2570–2620 2570–2620 MHz LTE-TDD B39 1880–1920 1880–1920 MHz LTE-TDD B40 2300–2400 2300–2400 MHz LTE-TDD B41 2555–2655 2555–2655 MHz Table 35: SC200R-EM* Operating Frequencies 3GPP Band Receive Transmit Unit GSM850 869–894 824–849 MHz EGSM900 925–960 880–915 MHz DCS1800 1805–1880 1710–1785 MHz PCS1900 1930
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Smart Module Series SC200R Series Hardware Design LTE-FDD B8 925–960 880–915 MHz LTE-FDD B20 791–821 832–862 MHz LTE-FDD B28(A + B) 758–803 703–748 MHz LTE-TDD B38 2570–2620 2570–2620 MHz LTE-TDD B40 2300–2400 2300–2400 MHz LTE-TDD B41 2555–2655 2555–2655 MHz Table 36: SC200R-NA Operating Frequencies 3GPP Band Receive Transmit Unit WCDMA B2 1930–1990 1850–1910 MHz WCDMA B4 2110–2155 1710–1755 MHz WCDMA B5 869–894 824–849 MHz LTE-FDD B2 1930–1990 1850–1910 MHz LTE
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Smart Module Series SC200R Series Hardware Design Table 37: SC200R-JP* Operating Frequencies 3GPP Band Receive Transmit Unit WCDMA B1 2110–2170 1920–1980 MHz WCDMA B6 875–885 830–840 MHz WCDMA B8 925–960 880–915 MHz WCDAM B19 875–890 830–845 MHz LTE-FDD B1 2110–2170 1920–1980 MHz LTE-FDD B3 1805–1880 1710–1785 MHz LTE-FDD B5 869–894 824–849 MHz LTE-FDD B8 925–960 880–915 MHz LTE-FDD B11 1428–1447 1475–1495 MHz LTE-FDD B18 860–875 815–830 MHz LTE-FDD B19 875–890
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Smart Module Series SC200R Series Hardware Design 6.1.1. Reference Design for Main and Rx-diversity Antenna Interfaces A reference circuit design for main and Rx-diversity antenna interfaces is shown below. Reserve a π-type matching circuit for each antenna to achieve better RF performance, and place the π-type matching components (R1/C1/C2, R2/C3/C4) as close to the antennas as possible. The capacitors are not mounted by default and the resistors are 0 Ω.
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Smart Module Series SC200R Series Hardware Design Table 39: Wi-Fi/BT Frequency Type Frequency Unit Wi-Fi (2.4 GHz) 2402–2482 MHz Wi-Fi (5 GHz) 5180–5825 MHz BT 4.2 LE 2402–2480 MHz A reference circuit design for Wi-Fi/BT antenna interface is shown as below. C1 and C2 are not mounted by default and the resistor is 0 Ω. Figure 30: Reference Circuit Design for Wi-Fi/BT Antenna 6.3.
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Smart Module Series SC200R Series Hardware Design Table 41: GNSS Frequency Type Frequency Unit GPS 1575.42 ±1.023 MHz GLONASS 1597.5–1605.8 MHz BeiDou 1561.098 ±2.046 MHz Galileo 1575.42 ±1.023 MHz NOTE SC200R-WF does not support GNSS. 6.3.1. Recommended Circuit for Passive Antenna GNSS antenna interface supports passive ceramic antennas and other types of passive antennas. A reference circuit design is given below.
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Smart Module Series SC200R Series Hardware Design 6.3.2. Recommended Circuit for Active Antenna The active antenna is powered by a 56 nH inductor through the antenna's signal path. The common power supply voltage ranges from 3.3 V to 5.0 V. Despite its low power consumption, the active antenna still requires stable and clean power supplies. Therefore, it is recommended to use high-performance LDO as the power supply. A reference design for GNSS active antenna is shown below.
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Smart Module Series SC200R Series Hardware Design Figure 34: Coplanar Waveguide Design on a 2-layer PCB Figure 35: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 36: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) SC200R_Series_Hardware_Design 85 / 125
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Smart Module Series SC200R Series Hardware Design In order to ensure RF performance and reliability, follow the principles below in RF layout design:       Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 Ω. Design the GND pins adjacent to RF pins as thermal relief pads, and fully connect them to ground. Keep the distance between the RF pins and the RF connector as short as possible.
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Smart Module Series SC200R Series Hardware Design Max Input Power: 50 W Input Impedance: 50 Ω Polarization Type: Vertical Cable Insertion Loss: < 1 dB GNSS1) Frequency range: 1559 MHz–1609 MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive Antenna Gain: > 0 dBi Active Antenna Noise Figure: < 1.5 dB (Typ.) Active Antenna Gain: > -2 dBi Active Antenna Embedded LNA Gain: < 17 dB (Typ.) Active Antenna Total Gain: < 17 dBi (Typ.
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Smart Module Series SC200R Series Hardware Design U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 38: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connectors. Figure 39: Space Factor of Mated Connectors (Unit: mm) For more details, visit http://www.hirose.com.
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Smart Module Series SC200R Series Hardware Design 7 Electrical, Reliability and Radio Characteristics 7.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 43: Absolute Maximum Ratings Parameter Min. Max. Unit VBAT -0.5 6 V USB_VBUS -0.5 16 V Peak Current of VBAT 0 3 A Voltage on Digital Pins -0.3 2.16 V 7.2.
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Smart Module Series SC200R Series Hardware Design IVBAT Peak supply current (during transmission slot) USB_VBUS USB power supply VRTC Power supply voltage of the backup battery Maximum power control level at EGSM900 1.8 3.0 A 4.35 5.0 6.2 V 2.0 3.0 3.25 V 7.3. Operating and Storage Temperatures The operating and storage temperatures are listed in the following table. Table 45: Operating and Storage Temperatures Parameter Min. Typ. Max.
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Smart Module Series SC200R Series Hardware Design 7.4. Current Consumption The values of current consumption are shown below. Table 46: SC200R-CE Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 13 μA Sleep (USB disconnected) @ DRX = 2 5.26 mA Sleep (USB disconnected) @ DRX = 5 4.82 mA Sleep (USB disconnected) @ DRX = 9 4.55 mA Sleep (USB disconnected) @ DRX = 6 4.60 mA Sleep (USB disconnected) @ DRX = 7 4.
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Smart Module Series SC200R Series Hardware Design EGSM900 @ PCL 19 98.68 mA DCS1800 @ PCL 0 185.8 mA DCS1800 @ PCL 7 103.2 mA DCS1800 @ PCL 15 97.06 mA B1 @ max power 534.1 mA B8 @ max power 529.6 mA EGSM900 (1UL/4DL) @ PCL 5 246.2 mA EGSM900 (2UL/3DL) @ PCL 5 394.1 mA EGSM900 (3UL/2DL) @ PCL 5 487.9 mA EGSM900 (4UL/1DL) @ PCL 5 576.6 mA DCS1800 (1UL/4DL) @ PCL 0 170.8 mA DCS1800 (2UL/3DL) @ PCL 0 266.2 mA DCS1800 (3UL/2DL) @ PCL0 368.
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Smart Module Series SC200R Series Hardware Design EVDO/CDMA data transfer LTE data transfer B8 (HSUPA) @ max power 493.5 mA BC0 @ max power 495.0 mA LTE-FDD B1 @ max power 709.5 mA LTE-FDD B3 @ max power 677.4 mA LTE-FDD B5 @ max power 559.2 mA LTE-FDD B8 @ max power 631.9 mA LTE-TDD B34 @ max power 374.3 mA LTE-TDD B38 @ max power 412.6 mA LTE-TDD B39 @ max power 379.9 mA LTE-TDD B40 @ max power 411.3 mA LTE-TDD B41 @ max power 413.
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Smart Module Series SC200R Series Hardware Design supply current Sleep (USB disconnected) @ DRX = 8 TBD mA Sleep (USB disconnected) @ DRX = 9 TBD mA GSM850 @ PCL 5 TBD mA GSM850 @ PCL 12 TBD mA GSM850 @ PCL 19 TBD mA EGSM900 @ PCL 5 TBD mA EGSM900 @ PCL 12 TBD mA EGSM900 @ PCL 19 TBD mA DCS1800 @ PCL 0 TBD mA DCS1800 @ PCL 7 TBD mA DCS1800 @ PCL 15 TBD mA PCS1900 @ PCL 0 TBD mA PCS1900 @ PCL 7 TBD mA PCS1900 @ PCL 15 TBD mA B1 @ max power TBD mA B2 @ max power
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Smart Module Series SC200R Series Hardware Design EDGE data transfer SC200R_Series_Hardware_Design EGSM900 (3UL/2DL) @ PCL 5 TBD mA EGSM900 (4UL/1DL) @ PCL 5 TBD mA DCS1800 (1UL/4DL) @ PCL 0 TBD mA DCS1800 (2UL/3DL) @ PCL 0 TBD mA DCS1800 (3UL/2DL) @ PCL0 TBD mA DCS1800 (4UL/1DL) @ PCL 0 TBD mA PCS1900 (1UL/4DL) @ PCL 0 TBD mA PCS1900 (2UL/3DL) @ PCL 0 TBD mA PCS1900 (3UL/2DL) @ PCL0 TBD mA PCS1900 (4UL/1DL) @ PCL 0 TBD mA GSM850(1UL/4DL) @ PCL 8 TBD mA GSM850 (2UL/3DL) @
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Smart Module Series SC200R Series Hardware Design B1 (HSDPA) @ max power TBD mA B2 (HSDPA) @ max power TBD mA B4 (HSDPA) @ max power TBD mA B5 (HSDPA) @ max power TBD mA B8 (HSDPA) @ max power TBD mA B1 (HSUPA) @ max power TBD mA B2 (HSUPA) @ max power TBD mA B4 (HSUPA) @ max power TBD mA B5 (HSUPA) @ max power TBD mA B8 (HSUPA) @ max power TBD mA LTE-FDD B1 @ max power TBD mA LTE-FDD B2 @ max power TBD mA LTE-FDD B3 @ max power TBD mA LTE-FDD B4 @ max power TBD mA
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Smart Module Series SC200R Series Hardware Design Table 48: SC200R-NA Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 13 μA Sleep (USB disconnected) @ DRX = 6 3.922 mA Sleep (USB disconnected) @ DRX = 8 3.041 mA Sleep (USB disconnected) @ DRX = 9 2.795 mA Sleep (USB disconnected) @ DRX = 6 6.748 mA Sleep (USB disconnected) @ DRX = 8 3.689 mA Sleep (USB disconnected) @ DRX = 9 3.133 mA Sleep (USB disconnected) @ DRX = 6 6.
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Smart Module Series SC200R Series Hardware Design LTE-FDD B12 @ max power 636 mA LTE-FDD B13 @ max power 650 mA LTE-FDD B14 @ max power 648 mA LTE-FDD B17@ max power 617 mA LTE-FDD B25 @ max power 812 mA LTE-FDD B26 @ max power 672 mA LTE-FDD B66 @ max power 782 mA LTE-FDD B71 @ max power 803 mA LTE-TDD B41 @ max power 491 mA Table 49: SC200R-JP* Current Consumption Parameter Description Conditions Typ.
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Smart Module Series SC200R Series Hardware Design B19 @ max power TBD mA B1 (HSDPA) @ max power TBD mA B6 (HSDPA) @ max power TBD mA B8 (HSDPA) @ max power TBD mA B19 (HSDPA) @ max power TBD mA B1 (HSUPA) @ max power TBD mA B6 (HSUPA) @ max power TBD mA B8 (HSUPA) @ max power TBD mA B19 (HSUPA) @ max power TBD mA LTE-FDD B1 @ max power TBD mA LTE-FDD B3 @ max power TBD mA LTE-FDD B5 @ max power TBD mA LTE-FDD B8 @ max power TBD mA LTE-FDD B11 @ max power TBD mA LTE
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Smart Module Series SC200R Series Hardware Design 7.5. RF Output Power The following tables show the RF output power of SC200R series modules. Table 50: SC200R-CE RF Output Power Frequency Max. Min.
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Smart Module Series SC200R Series Hardware Design PCS1900 TBD TBD WCDMA B1 TBD TBD WCDMA B2 TBD TBD WCDMA B4 TBD TBD WCDMA B5 TBD TBD WCDMA B8 TBD TBD LTE-FDD B1 TBD TBD LTE-FDD B2 TBD TBD LTE-FDD B3 TBD TBD LTE-FDD B4 TBD TBD LTE-FDD B5 TBD TBD LTE-FDD B7 TBD TBD LTE-FDD B8 TBD TBD LTE-FDD B20 TBD TBD LTE-FDD B28 TBD TBD LTE-TDD B38 TBD TBD LTE-TDD B40 TBD TBD LTE-TDD B41 TBD TBD Table 52: SC200R-NA RF Output Power Frequency Max. Min.
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Smart Module Series SC200R Series Hardware Design LTE-FDD B4 23 dBm ±2 dB < -39 dBm LTE-FDD B5 23 dBm ±2 dB < -39 dBm LTE-FDD B7 23 dBm ±2 dB < -39 dBm LTE-FDD B12 23 dBm ±2 dB < -39 dBm LTE-FDD B13 23 dBm ±2 dB < -39 dBm LTE-FDD B14 23 dBm ±2 dB < -39 dBm LTE-FDD B17 23 dBm ±2 dB < -39 dBm LTE-FDD B25 23 dBm ±2 dB < -39 dBm LTE-FDD B26 23 dBm ±2 dB < -39 dBm LTE-FDD B66 23 dBm ±2 dB < -39 dBm LTE-FDD B71 23 dBm ±2 dB < -39 dBm LTE-TDD B41 23 dBm ±2 dB < -39 dBm Table 53
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Smart Module Series SC200R Series Hardware Design LTE-FDD B19 TBD TBD LTE-FDD B21 TBD TBD LTE-FDD B26 TBD TBD LTE-FDD B28 TBD TBD LTE-TDD B41 TBD TBD NOTES 1. 2. In GPRS 4-slot Tx mode, the maximum output power is reduced by 3 dB. This design conforms to the GSM specification as described in Chapter 13.16 of 3GPP TS 51.010-1. “*” means under development. 7.6. RF Receiving Sensitivity The following table shows the RF receiving sensitivity of SC200R series modules.
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Smart Module Series SC200R Series Hardware Design LTE-TDD B34 (10 MHz) -98.4 -98.3 -101.5 -96.3 dBm LTE-TDD B38 (10 MHz) -98.8 -98.7 -101.8 -96.3 dBm LTE-TDD B39 (10 MHz) -98.5 -98 -101.3 -96.3 dBm LTE-TDD B40 (10 MHz) -98.9 -99 -102.4 -96.3 dBm LTE-TDD B41 (10 MHz) -98.2 -97.9 -101.3 -94.3 dBm Table 55: SC200R-EM* RF Receiving Sensitivity Receiving Sensitivity (Typ.) Frequency 3GPP (SIMO) Primary Diversity SIMO GSM850 TBD / / -102.4 dBm EGSM900 TBD / / -102.
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Smart Module Series SC200R Series Hardware Design LTE-FDD B20 (10 MHz) TBD TBD TBD -93.3 dBm LTE-FDD B28 (10 MHz) TBD TBD TBD -94.8 dBm LTE-TDD B38 (10 MHz) TBD TBD TBD -96.3 dBm LTE-TDD B40 (10 MHz) TBD TBD TBD -96.3 dBm LTE-TDD B41 (10 MHz) TBD TBD TBD -94.3 dBm Table 56: SC200R-NA RF Receiving Sensitivity Receiving Sensitivity (Typ.) Frequency 3GPP (SIMO) Primary Diversity SIMO WCDMA B2 -109.5 -110 -110.5 -104.7 dBm WCDMA B4 -110.5 -110.5 -111 -106.
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Smart Module Series SC200R Series Hardware Design Table 57: SC200R-JP* RF Receiving Sensitivity Receiving Sensitivity (Typ.) Frequency 3GPP (SIMO) Primary Diversity SIMO WCDMA B1 TBD TBD TBD -102.4 dBm WCDMA B6 TBD TBD TBD -102.4 dBm WCDMA B8 TBD TBD TBD -106.7 dBm WCDAM B19 TBD TBD TBD -103.7 dBm LTE-FDD B1 (10 MHz) TBD TBD TBD -96.3 dBm LTE-FDD B3 (10 MHz) TBD TBD TBD -93.3 dBm LTE-FDD B5 (10 MHz) TBD TBD TBD -94.3 dBm LTE-FDD B8 (10 MHz) TBD TBD TBD -93.
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Smart Module Series SC200R Series Hardware Design 7.7. Electrostatic Discharge The module is not protected against electrostatic discharge (ESD) in general. Consequently, it should be subject to ESD handling precautions that are typically applied to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module.
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Smart Module Series SC200R Series Hardware Design 8 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the tolerances for dimensions without tolerance values are ±0.05 mm. 8.1.
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Smart Module Series SC200R Series Hardware Design Figure 41: Bottom Dimensions (Bottom View) NOTE The package warpage level of the module conforms to JEITA ED-7306 standard.
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Smart Module Series SC200R Series Hardware Design 8.2. Recommended Footprint Figure 42: Recommended Footprint (Top View) NOTES 1. 2. For easy maintenance of the module, keep at least 5 mm between the module and other components on the host PCB. All RESERVED pins should be kept open and MUST NOT be connected to ground.
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Smart Module Series SC200R Series Hardware Design 8.3. Top and Bottom Views of the Module Figure 43: Top View of the Module Figure 44: Bottom View of the Module NOTE These are renderings of SC200R series module. For authentic dimension and appearance, refer to the module that you receive from Quectel.
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Smart Module Series SC200R Series Hardware Design 9 9.1. Storage, Manufacturing and Packaging Storage The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: The temperature should be 23 ±5 °C and the relative humidity should be 35 %–60 %. 2. The storage life (in vacuum-sealed packaging) is 12 months in Recommended Storage Condition. 3.
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Smart Module Series SC200R Series Hardware Design NOTES 1. 1) This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. 2. To avoid blistering, layer separation and other soldering issues, it is forbidden to expose the modules to the air for a long time. If the temperature and moisture do not conform to IPC/JEDEC J-STD-033 or the relative moisture is over 60 %, It is recommended to start the solder reflow process within 24 hours after the package is removed.
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Smart Module Series SC200R Series Hardware Design Temp. (°C) Reflow Zone Max slope: 2 to 3°C/s 246 238 220 200 B C Cooling down slope: -1.
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Smart Module Series SC200R Series Hardware Design 9.3. Packaging SC200R series module is packaged in tape and reel carriers, and sealed in the vacuum-sealed bag. It is not recommended to open the vacuum package before using the module for actual production. Each reel is 380 mm in diameter and contains 200 modules. The following figures show the package details, measured in mm.
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Smart Module Series SC200R Series Hardware Design Figure 47: Reel Dimensions (Unit: mm) Table 60: Reel Packaging Model Name SC200R MOQ for MP Minimum Package: 200 pcs Minimum Package × 4 = 800 pcs 200 pcs Size: 405 mm × 390 mm × 83 mm N.W: 1.9 kg G.W: 3.7 kg Size: 425 mm × 358 mm × 410 mm N.W: 7.6 kg G.W: 15.
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Smart Module Series SC200R Series Hardware Design 10 Appendix A References Table 61: Related Documents SN Document Name Remark [1] Quectel_Smart_EVB_G2_User_Guide Smart EVB G2 User Guide [2] Quectel_SC200R_Series_Pin_Description_and _GPIO_Configuration SC200R Series Pin Description and GPIO Configuration [3] Quectel_RF_Layout_Application_Note RF Layout Application Note [4] Quectel_Module_Secondary_SMT_Application _Note Module Secondary SMT Application Note [5] Quectel_SC200R_Series_Referenc
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Smart Module Series SC200R Series Hardware Design CTS Clear to Send DC Dual Carrier DRX Discontinuous Reception DSI Display Serial Interface DSP Digital Signal Processor ECM Electret Condenser Microphone EDGE Enhanced Data Rate for GSM Evolution EFR Enhanced Full Rate EGSM Enhanced GSM ESD Electrostatic Discharge ESR Equivalent Series Resistance EV-DO/EVDO Evolution-Data Optimized FDD Frequency Division Duplex FR Full Rate GMSK Gaussian Minimum Shift Keying GNSS Global Naviga
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Smart Module Series SC200R Series Hardware Design HSPA+ High-Speed Packet Access+ HSUPA High Speed Uplink Packet Access IC Integrated Circuit I/O Input/Output I2C Inter-Integrated Circuit Imax Maximum Load Current Inorm Normal Current LCC Leadless Chip Carrier LCD Liquid Crystal Display LCM LCD Module LDO Low Dropout Regulator LE Low Energy LED Light Emitting Diode LGA Land Grid Array LNA Low Noise Amplifier LTE Long-Term Evolution MEMS Micro-Electro-Mechanical System MIPI
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Smart Module Series SC200R Series Hardware Design PS Proximity Sensor PSK Phase Shift Keying QAM Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying RF Radio Frequency RFFE RF Front End RTC Real Time Clock RTS Request to Send Rx Receive SAW Surface Acoustic Wave SD Card Secure Digital Card SMS Short Message Service SPI Serial Peripheral Interface TDD Time-Division Duplex TP Touch Panel TVS Transient Voltage Suppressor Tx Transmit UART Universal Asynchronous
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Smart Module Series SC200R Series Hardware Design VI Voltage Input VIHmax Maximum Input High Level Voltage Value VIHmin Minimum Input High Level Voltage Value VILmax Maximum Input Low Level Voltage Value VILmin Minimum Input Low Level Voltage Value VImax Absolute Maximum Input Voltage Value VImin Absolute Minimum Input Voltage Value VO Voltage Output VOHmax Maximum Output High Level Voltage Value VOHmin Minimum Output High Level Voltage Value VOLmax Maximum Output Low Level Voltage Val
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Smart Module Series SC200R Series Hardware Design 11 Appendix B GPRS Coding Schemes Table 63: Description of Different Coding Schemes Scheme CS-1 CS-2 CS-3 CS-4 Code Rate 1/2 2/3 3/4 1 USF 3 3 3 3 Pre-coded USF 3 6 6 12 Radio Block excl. USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 - Coded Bits 456 588 676 456 Punctured Bits 0 132 220 - Data Rate kbit/s 9.05 13.4 15.6 21.
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Smart Module Series SC200R Series Hardware Design 12 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3 + 1 or 2 + 2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots.
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Smart Module Series SC200R Series Hardware Design 15 5 5 NA 16 6 6 NA 17 7 7 NA 18 8 8 NA 19 6 2 NA 20 6 3 NA 21 6 4 NA 22 6 4 NA 23 6 6 NA 24 8 2 NA 25 8 3 NA 26 8 4 NA 27 8 4 NA 28 8 6 NA 29 8 8 NA 30 5 1 6 31 5 2 6 32 5 3 6 33 5 4 6 SC200R_Series_Hardware_Design 124 / 125
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Smart Module Series SC200R Series Hardware Design 13 Appendix D EDGE Modulation and Coding Schemes Table 65: EDGE Modulation and Coding Schemes Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslots 4 Timeslots MCS-1 GMSK C 8.80 kbps 17.60 kbps 35.20 kbps MCS-2 GMSK B 11.2 kbps 22.4 kbps 44.8 kbps MCS-3 GMSK A 14.8 kbps 29.6 kbps 59.2 kbps MCS-4 GMSK C 17.6 kbps 35.2 kbps 70.4 kbps MCS-5 8-PSK B 22.4 kbps 44.8 kbps 89.6 kbps MCS-6 8-PSK A 29.6 kbps 59.