Specifications

155
ELOW-LEVEL HARDWARE MAP
ThisappendixprovidesdetailsfortheCPMinputandoutput,mainmemorymaps,and
SMBusmaps.AdditionalinformationisprovidedforthePCIbusdevicemap,including
interruptlinesforthePCIdeviceperipherals.Thisappendixprovidescrucialinformation
forthedeveloperwhoneedstoknowmemorylocationsoftheperipheraldevicesand
theirinterruptrouting.
PCI bus device map
Table 51providesdeviceidentificationfortheCPM’speripheralconnections.Manyofthe
devicesavailableinthevariouschipsetcomponentsarenotused.Theyareshownhere,
butthedevicesdonotshowupinaPCIscanwhentheyaredisabledbythesystemBIOS.
Table 51. PCI device map
Peripheral Device ID Device # Function # Bus #
INTR
mapping
Enabled?
Intel 5520 I/O Hub
ESI (Dev 0 in ESI mode) 3406h 0 0 0 N.A. Yes
PCI-Express Root Port 0 (Dev #0 in
PCIe Mode)
3420h or
3421h
00 0N.A.Yes
PCI-Express Root Port 1 3408h 1 0 0 N.A. No
PCI-Express Root Port 2 3409h 2 0 0 N.A. No
PCI-Express Root Port 3 340Ah 3 0 0 N.A. Yes
PCI-Express Root Port 4 340Bh 4 0 0 N.A. Yes
PCI-Express Root Port 5 340Ch 5 0 0 N.A. Yes
PCI-Express Root Port 6 340Dh 6 0 0 N.A. Yes
PCI-Express Root Port 7 340Eh 7 0 0 N.A. Yes
PCI-Express Root Port 8 340Fh 8 0 0 N.A. No
PCI-Express Root Port 9 3410h 9 0 0 N.A. Yes
PCI-Express Root Port 10 3411h 10 0 0 N.A. Yes
Intel QPI Port 0 3425h 16 0 0 N.A. No
Intel QPI Port 0 3426h 16 1 0 N.A. No
Intel QPI Port 1 3427h 17 0 0 N.A. Yes
Intel QPI Port 1 3428h 17 1 0 N.A. Yes
IOxAPIC 342Dh 19 0 0 N.A. Yes
Core 342Eh 20 0 0 N.A. Yes
Core 3422h 20 1 0 N.A. Yes
Core 3423h 20 2 0 N.A. Yes
Core 3438h 20 3 0 N.A. Yes