Specifications

4
LEDs and External Interfaces
23
Alignment keys
TheRTMismechanicallykeyedtopreventaccidentalinsertionoftheRTMintoan
incompatiblefrontmodule.TheZone2alignmentblock(K1)isassignedakeyingvalueof11.
TheZone3alignmentblock(K2)isassignedakeyingvalueof55.
Table 5. RTM connector P31 signals
Ro
w
AB CD EF GH
1 AMC_17_TX+ AMC_17_TX- AMC_17_RX+ AMC_17_RX- AMC_18_TX+ AMC_18_TX- AMC_18_RX+ AMC_18_RX-
2 AMC_19_TX+ AMC_19_TX- AMC_19_RX+ AMC_19_RX- AMC_20_TX+ AMC_20_TX- AMC_20_RX+ AMC_20_RX-
3 SATA1_RX+ SATA1_RX- SATA1_TX+ SATA1_TX- AMC2_18_TX+ AMC2_18_TX- AMC2_18_RX
+
AMC2_18_RX-
4 AMC2_19_TX+ AMC2_19_TX- AMC2_19_RX
+
AMC2_19_RX- AMC2_20_TX+ AMC2_20_TX- AMC2_20_RX
+
AMC2_20_RX-
5 PCIE1_RX2+ PCIE1_RX2- PCIE1_TX2+ PCIE1_TX2- PCIE1_RX3+ PCIE1_RX3- PCIE1_TX3+ PCIE1_TX3-
6 PCIE1_RX0+ PCIE1_RX0- PCIE1_TX0+ PCIE1_TX0- PCIE1_RX1+ PCIE1_RX1- PCIE1_TX1+ PCIE1_TX1-
7 AMC4_17_TX+ 
(RESET_7)
AMC4_17_TX-
(DEBUG_7)
PCI1_REFCLK
+
PCI1_REFCLK
-
AMC4_18_TX+ AMC4_18_TX- PCI0_REFCLK
+
PCI0_REFCLK
-
8 PCIE0_RX2+ PCIE0_RX2- PCIE0_TX2+ PCIE0_TX2- PCIE0_RX3+ PCIE0_RX3- PCIE0_TX3+ PCIE0_TX3-
9 AMC1_I2C_SC
L
AMC1_I2C_SD
A
SFP2_SCL SFP2_SDA SFP1_SCL SCP1_SDA AMC4_I2C_SC
L
AMC4_I2C_SD
A
10 PCIE0_RX0+ PCIE0_RX0- PCIE0_TX0+ PCIE0_TX0- PCIE0_RX1+ PCIE0_RX1- PCIE0_TX1+ PCIE0_TX1-
Notes:
• Each differential pair has an individual L-shaped ground contact (not shown).
• All signal names are based on the CPM signal names.
Gray indicates unused pins on the CPM