EPC-8A Hardware Reference RadiSys Corporation 5445 NE Dawson Creek Drive Hillsboro, OR 97124 (503) 615-1100 FAX: (503) 615-1150 www.radisys.
EPC-8A Hardware Reference EPC, INtime, and RadiSys are registered trademarks of RadiSys Corporation. † All other trademarks, registered trademarks, service marks, and trade names are the property of their respective owners. December 1998 Copyright 1998 by RadiSys Corporation All rights reserved.
Before you begin This guide describes the EPC-8A, a highly integrated PC-compatible computer designed specifically for use in the VMEbus and extended VMEbus (VXIbus) environments. About this guide This guide explains how to install, configure, and troubleshoot the EPC-8A, and describes the EPC-8A and how it works.
EPC-8A Hardware Reference Appendix Description J Error Messages and Diagnosis Provides troubleshooting information in these areas: • Problems that do not display an error message. • Beep codes (audible codes consist of patterns of beeps and pauses). • Error and warning messages. K Configuring the Ethernet Drivers Provides instructions for configuring network interface drivers after you install the EPC-8A.
Contents Chapter 1: Product description Overview........................................................................................................................................................... VMEbus ............................................................................................................................................................ System controller functions ....................................................................................................................
EPC-8A Hardware Reference Resident Flash/SRAM Memory ................................................................................................................ Resident Flash Memory...................................................................................................................... SRAM................................................................................................................................................. Watchdog Timer ........................................
Contents Appendix C: Connectors RS-232 Port (COM1)........................................................................................................................................ RS-422/485 Port (COM2)................................................................................................................................. Parallel Port.......................................................................................................................................................
EPC-8A Hardware Reference Adapter Architecture ................................................................................................................................. Boot PROM ............................................................................................................................................... Configuring Additional Ethernet Controllers ............................................................................................ Diagnostics ...............................
Contents Figures Figure 2-1. Figure 2-2. Figure 2-3. Figure 2-4. Figure 2-5. Figure 3-1. Figure 3-2. Figure 3-3. Figure 3-4. Figure 3-5. Figure 3-6. Figure 3-7. Figure 3-8. Figure 3-9. Figure 3-10. Figure 3-11. Figure 3-12. Figure 4-1. Figure 4-2. Figure 4-3. Figure 4-4. Figure 4-5. Figure E-1. Figure E-2. Figure E-3. Figure E-4. Figure E-5. Figure E-6. Figure E-7. Figure H-1. Figure H-2. Jumper Locations......................................................................................................
EPC-8A Hardware Reference Tables Table 1-1. Table 1-2. Table 2-1. Table 4-1. Table 4-2. Table 4-3. Table 5-1. Table 5-2. Table A-1. Table A-2. Table A-3. Table A-4. Table A-5. Table A-6. Table A-7. Table A-8. Table A-9. Table A-10. Table A-11. Table A-12. Table A-13. Table A-14. Table A-15. Table A-16. Table A-17. Table A-18. Table A-19. Table A-20. Table A-21. Table B-1. Table B-2. Table C-1. Table C-2. Table C-3. Table C-4. Table C-5. Table C-6. Table I-1. Table J-1. Table J-2.
Chapter 1 Product description 1 Overview The EPC-8A, compatible with major PC software environments such as Microsoft† DOS, Microsoft Windows† 3.x, Microsoft Windows 95, and Microsoft Windows NT† is a highly integrated PC-compatible computer designed specifically for use in the VMEbus and extended VMEbus (VXIbus) environments. The EPC-8A is available s either a Single- or Dual-slot 6U VMEbus module.
EPC-8A Hardware Reference NE2000+ Ethernet controllers. Interface configuration (Emulation mode and address/ interrupt control) is software controlled; a DOS-based application is provided to perform this operation. • Second modified RS-422/485 PC-compatible serial port interface implemented with RS-422/485 transmit and receive buffers. CTS, RTS, DSR and DTR are buffered to RS-422 levels. The Transmit lines are controlled by the RTS signal, providing RS-485 multidrop support.
Chapter 1: Product description VMEbus extended register set As an extension to the VMEbus interface, the EPC-8A implements the set of VXIbus (IEEE 1155-1992) standard multiprocessor support registers in the A16 space. These registers provide a set of standard identification, status, control and communication functions that are useful in multiprocessor environments.
EPC-8A Hardware Reference Table 1-2.
Chapter 2 Configuration and Installation 2 To configure and install the EPC-8A, you must complete the following steps: 1. Set jumpers as needed for Flash, BIOS, and Slot-1 2. Select the slot location 3. Install VMEbus backplane jumpers 4. Insert subplane into mainframe 5. Insert EPC-8A into mainframe 6. Connect peripherals 7. Power-up 8. Configure BIOS 9. Boot operating system 10. Install software/configure system Before you begin Unpack the EPC-8A and inspect it for shipping damage.
EPC-8A Hardware Reference • Starts the IACK and bus grant daisy chains. • Provides bus timeout error (BERR) function The EPC-8A can be user-configured to provide standard VMEbus Slot-1 functionality. The Slot-1 configuration option is enabled (default) by installing the Slot-1 shunt (jumper) on the processor board (see Figure 2-1). Removing the jumper disables Slot-1 functionality. When the EPC-8A is configured as the Slot-1 controller, it performs all the standard VMEbus system control functions.
Chapter 2: Configuration and Installation • The EPC-8A connects to its peripherals via a subplane which extends to the right of the EPC-8A. Make sure that the location you choose provides sufficient room for all the attached peripherals (EXMs and mass storage module). The EPC-8A plus EXM expansion modules plus any mass storage module can be considered together as a single subsystem.
EPC-8A Hardware Reference The daisy-chain signal concept is shown in Figure 2-2. The Slot-1 controller board initiates each daisy-chain signal. Each VMEbus slot to the right of the Slot-1 controller must pass through each of the daisy-chain signals. For each VMEbus slot, xxxIn pin must be connected to its corresponding xxxOut pin (For example, BG0In to BG0Out, BG1In to BG1Out,...,IackIn to IackOut) either through the board in that slot or by jumpers.
Chapter 2: Configuration and Installation J1 Connector BG0 BG0 BG0 BG0 IACK Figure 2-4. VMEbus Jumpers on Rear Wirewrap Pins If the stake pins are on the rear of the backplane, the most common location is in the middle of the J1 connector as shown in Figure 2-4. The connector may have wire-wrap tails on all pins, or just on the bus-grant and IAC pins. Stake pins (front or rear) can also be located adjacent to the slot being jumpered as shown in Figure 2-5.
EPC-8A Hardware Reference The subplane is installed first, connecting to the backplane. After installing the subplane, the EPC-8A processor module can be inserted into the VMEbus chassis. Make sure that power to your VME system is off. the EPC-8A module is not designed to be inserted or removed from live backplanes. When inserting the EPC-8A module, avoid touching the circuit board and connector pins, and make sure the environment is static-free.
Chapter 3 BIOS Configuration 3 This chapter details the various menus and sub-menus you use to configure the system. The EPC-8A uses the PhoenixBIOS program to configure and select various system options. While the chapter is written as though you are encountering each field in sequence and for the first time, your system may be pre-configured and require very little intervention. Some error messages might occur during the execution of the BIOS initialization sequence.
EPC-8A Hardware Reference Main BIOS Setup Menu The next figure shows the main BIOS setup menu. PhoenixBIOS Setup - Copyright 1985-95 Phoenix Technologies Ltd. Main Advanced EXM VME Exit System Time: System Date: Diskette A: Diskette B: IDE Adapter 0 Master IDE Adapter 0 Slave Video System: Memory Cache Memory Shadow Boot Sequence: Numlock: Item Specific Help [16:17:18] [03/02/1998] , , or [1.44MB, 3 1/2”] selects field.
Chapter 3: BIOS Configuration Field Boot Sequence Sub-Menu Description Displays a menu that you use to change the boot delay and boot sequence, and disable several displays during the boot process, such as the SETUP prompt, POST errors, floppy drive check, and summary screen. Once you set the boot sequence, your choice displays in the Main menu. For more information, see Boot Sequence Sub-Menu on page 17.
EPC-8A Hardware Reference Field Autotype Fixed Disk Type Description Sets up new disks. This option allows the BIOS to determine proper settings for the disk based on information on the disk, which is detected by the EPC-8A BIOS for drives that comply with ANSI specifications. Press the ENTER key to invoke this function. Existing (formatted) disks must be set up using the same parameters originally used when the disk was formatted.
Chapter 3: BIOS Configuration Memory Cache Sub-Menu PhoenixBIOS Setup - Copyright 1985-95 Phoenix Technologies Ltd. Main Memory Cache Memory Cache: F1 Help ESC Exit Item Specific Help [Enabled] ↑↓ Select Item ←→ Select Menu -/+ Change Values F9 Setup Defaults Enter Select Sub-Menu F10 Previous Values Figure 3-3. Memory Shadow sub-menu Field Memory Cache Description Enables or disables the Level 1 (L1) cache. The default is “Enabled”.
EPC-8A Hardware Reference Memory Shadow Sub-Menu The term “Memory Shadow” refers to the technique of copying information from ROM into RAM and accessing it in this alternate memory location. The Memory Shadow Sub-Menu is discussed below. PhoenixBIOS Setup - Copyright 1985-95 Phoenix Technologies Ltd.
Chapter 3: BIOS Configuration Boot Sequence Sub-Menu The Boot Sequence Sub-Menu allows you to change the boot sequence options. The following displays: PhoenixBIOS Setup - Copyright 1985-95 Phoenix Technologies Ltd. Main Boot Options Boot delay: Boot sequence: SETUP prompt: POST Errors: Floppy check: Summary screen: F1 Help ESC Exit [ 0] [A: then C:] [Enabled] [Enabled] [Enabled] [Enabled] ↑↓ Select Item ←→ Select Menu Item Specific Help .
EPC-8A Hardware Reference Field Floppy check Summary screen Description Enables or disables the floppy drive search during the boot. To speed up booting, you can disable the floppy check. It is still possible to boot from the A: drive even with the floppy check disabled. The default is to enable the floppy check. Enables or disables a summary of the system configuration, which displays before the operating system starts to load. To save time, you can disable the summary screen.
Chapter 3: BIOS Configuration Keyboard Features Menu Use this sub-menu to enable or disable various keyboard features. PhoenixBIOS Setup - Copyright 1985-95 Phoenix Technologies Ltd. Main Keyboard Features Item Specific Help Numlock: [Off] Key Click: [Disabled] Keyboard auto-repeat rate: [30/sec] Keyboard auto-repeat delay: [1/4 sec] F1 Help ESC Exit ↑↓ Select Item ←→ Select Menu -/+ Change Values F9 Setup Defaults Enter Select Sub-Menu F10 Previous Values Figure 3-6.
EPC-8A Hardware Reference Advanced Menu Main PhoenixBIOS Setup - Copyright 1985-95 Phoenix Technologies Ltd. Advanced EXM VME Exit Warning! Setting items on this menu to incorrect values may cause your system to malfunction.
Chapter 3: BIOS Configuration Field Flash ROMdisk Description Enables Flash memory on the EPC-8A. This must be selected for the Flash memory to appear as a drive. The base address you select defines where the Flash ROMdisk BIOS extension is installed. Options include: DC000–DFFF0h D8000–DBFF0h D4000–D7FF0h D0000–D3FF0h CC000–CFFF0h C8000–CBFFFh Not Installed Serial RFA Recovery Important: You cannot have an IDE drive if the resident Flash memory is the boot device.
EPC-8A Hardware Reference Field VME Scan Range Description Used for VME booting. To boot from VME: 1. Use XFORMAT with the /F option to first create a file that looks like a FAT/boot record. 2. Upload the file to VME memory on a 100000h boundary in one of the memory ranges below. 3. Set the scan range to match where in VME memory the file was placed. 4. Be sure to enable the VME ROMdisk BIOS extension to enable scanning.
Chapter 3: BIOS Configuration Field LPT Mode Description Options include: • ECP: Enables the parallel port’s Extended Capabilities Port (ECP). • Bi-directional: Enables the parallel port as bi-directional. • Output only: Enables the parallel port as output only. When you are finished, press ESC to exit back to the Advanced Menu. EXM Menu Use this menu to set up the optional EXM expansion modules in your EPC-8A. Enter the EXM-ID, plus option byte information for OB1 and OB2.
EPC-8A Hardware Reference OB1/OB2 Two “option” bytes of configuration information. C P U 1 3 5 0 2 4 Figure 3-10. Slot Numbering All slots not occupied by an EXM module should show an ID of FF and OB1/OB2 of 00 00 indicating that no EXM is present. Field Slots Description Identifies the slot to which the configuration information applies: • EXM Slot 31: Identifies the Flash memory address. Slot 31 refers to the optional resident Flash memory.
Chapter 3: BIOS Configuration Field ID Description Identifies the system’s EXMs. Enter the EXM-IDs for the EXMs you intend to install in this system. You can install up to six EXMs. Option Byte 1/ Option Byte 2 Specifies option byte configuration information. Each EXM expansion module has values you must enter for the option byte 1 and option byte 2 configuration data. When you are finished with this menu, press the right arrow key to move to the VME Menu, or press ESC.
EPC-8A Hardware Reference Field ULA Description Selects the unique logical address (ULA). Possible values range from 00 through FF. The logical address controls where in the VME A16SD space the EPC-8A extended registers are mapped. If the ULA=0, the registers are at C000. If the ULA=FF, the registers are at FFF0. In general, the registers map to [C000 + (ULA*40)] (all numbers in hexadecimal). Exit Menu Use the options in this menu to save and exit, or abandon your changes and exit to the system.
Chapter 3: BIOS Configuration Field Save Changes Exit & Update BIOS Description Saves the edits you made during this session but does not exit. Updates the BIOS from a floppy disk. Note: Select this exit option only if you obtained BIOS update replacement software from your supplier and reviewed the documentation and procedures provided with that distribution. If you select this option by mistake, changes made to the BIOS are lost unless already saved using the Save Current Values option.
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Chapter 4 Theory of Operation 4 Overview The EPC-8A is a PC/AT compatible computer with standard PC peripherals, a VMEbus interface, and modular expansion capability via the EXM expansion interface. The Block Diagram on page 30 provides an diagrammatic overview of the system functional blocks. Most of the standard functions of the PC architecture are embodied in the RadiSys R400EX chipset. DRAM and VGA are interfaced to the processor by a 32-bit local bus.
EPC-8A Hardware Reference Resident Flash memory (on the EPC-8A board) is I/O mapped and appears as an EXM expansion module as if in EXM slot 31. SRAM is memory mapped. The PC BIOS is shadowed into main memory at start-up. 1–32 MB VGA 512 K 486 100MHz option FPM/EDO, Parity DRAM 32 Video 16 32 32 16 512 K 128 K BIOS SRAM 32-bit local bus RS-232 R400EX System Controller (Kybd Ctlr, RTC) 8 16 32 Battery Reset Sw.
Chapter 4: Theory of Operation Memory The following memory options are supported: 8 Mbytes, 16 Mbytes, and 32 Mbytes. One SIMM socket is available. For memory upgrade instructions, see Appendix D, Memory. Memory Map The 232 byte physical address space seen by the Intel486 occupies three areas: • Addresses between 0 and 1 Mbytes, which are largely defined by the IBM PC/AT architecture. • Addresses between 1 Mbytes and 256 Mbytes, which largely depend on how much DRAM is installed in the EPC-8A.
EPC-8A Hardware Reference FFFE0000 System BIOS 128 Kbytes FFFC0000 Boot BIOSs, VGA BIOS 128 Kbytes FFFA0000 CMOS data 128 Kbytes FFFC0000 Unused 128 Kbytes Figure 4-2. Flash Boot Device Memory The BIOS initialization software copies the ROM contents into DRAM (a process called shadowing) at addresses 0F0000–0FFFFF (also called the “F” page). The VGA BIOS is copied into 0C0000–0C7FFF of DRAM.
Chapter 4: Theory of Operation The BIOS does not enable (using bit 2 of register 8102h) the VGA controller if another VGA controller is enabled on the EXM expansion interface. Ethernet Controller The EPC-8A contains an on-board Ethernet controller connected through the 16-bit EXM expansion interface, which is compatible with Western Digital 8013, Novell NE2000 and NE2000+ cards through the use of National Semiconductor’s DP83905 (AT/LANTIC chip).
EPC-8A Hardware Reference WDT (bit 3 of register 8154h) is set. A local “warm” hardware reset occurs. Bits 1, 2, and 3 of register 815Dh are cleared to prevent the watchdog timer from expiring on a warm reset that is initiated from a source other than a watchdog timeout. The BIOS must set the BTOE bit. VME SYSFAIL* is also asserted. When exiting a hardware reset condition, the BIOS can check the WDT bit.
Chapter 4: Theory of Operation and quickly place the new battery into the empty socket. Replace the SIMM module and reinsert the EPC-8A into the system. Peripheral Ports The I/O address and IRQ of the peripheral ports are determined by the CMOS parameters established by default and modified via BIOS Setup screens. RS-232 Port The RS-232 port is a standard PC COM port based on the 16550 architecture. It is normally configured as COM1 (I/O address = 3F8–3FF, IRQ4).
EPC-8A Hardware Reference TEST This LED is lit whenever the system is running its power-on self-test, as reflected in the PASS bit in the VXI registers. If PASS is 0, then this LED is lit. This only occurs during a hardware reset. Resetting the EPC-8A You can reset (reboot) the EPC-8A in a number of ways. Resets are summarized in the table below, with details in the paragraphs that follow. Table 4-3. Reset Conditions Power-On Reset Power < 3.0 V Power 3–4.
Chapter 4: Theory of Operation Ctrl+Alt+Del “Warm” software reset. This keyboard sequence is also called a “warm boot”. The EPC-8A does not reinitialize all of the processor’s hardware. The power-on self-test does not run. However, the operating system is reloaded. VMEbus SYSRESET “Warm” hardware reset. The EPC-8A can be software-configured to respond or not respond to the VMEbus SYSRESET* line. Asserting bit 7(SRIE) of register 8144h allows the VME SYSRESET* signal to reset the EPC-8A.
EPC-8A Hardware Reference that were enabled prior to SRST being asserted, resume (with the counter starting in the cleared state). The EPC-8A’s reaction to SYSRESET* being asserted on the VME bus depends upon whether the SRIE bit (SYSRESET Input Enable, bit 7 of the Status/Control register) SYSRESET is set or clear. When SRIE is asserted (set), the assertion of SYSRESET* results in the same “warm” hardware reset that a watchdog timer reset causes.
Chapter 4: Theory of Operation This ID byte is the same identification byte discussed earlier in Chapter 3, BIOS Configuration in the section on the EXM Menu. The EXM expansion interface is provided on rows A, C, and D of the EPC-8A’s 4-row DIN P2 connector. The subplane carries the EXM interface to other modules, such as to EXM modules and the EXP-MX Mass Storage module. These EXM interface signals are not passed through to the VMEbus.
EPC-8A Hardware Reference Byte Ordering There are two fundamentally different ways of storing numerical values in byte locations in memory: • Little endian, characteristic of Intel microprocessors, where the least-significant data byte (LSB) is stored in the lowest byte address Address + 3 Address + 2 Address + 1 Address Byte 3 Byte 2 Byte 1 Byte 0 MSB • LSB Big endian, characteristic of Motorola microprocessors and the VMEbus environment in general, where the most-significant data byte (MSB) i
Chapter 4: Theory of Operation When big-endian is selected, the bytes are swapped between the 486 and VME as shown in the next diagram. D16 access Addr+1 Addr 32 10 D32 access LSB Addr+1 Addr 10 32 MSB 486 Address Motorola Address Addr+3 Addr+2 Addr+1 Addr 76 54 32 10 LSB Addr+3 Addr+2 Addr+1 Addr 76 54 32 10 MSB Figure 4-4.
EPC-8A Hardware Reference Passing VME Interrupts and Events to the CPU The diagram below shows how VME interrupts and VME events are generated and passed to the CPU: RRDY WRDY IRQ1 IRQ2 IRQ3 VME interrupt enable register VME interrupt enable register IRQ4 IRQ5 IRQ6 PC architecture IRQ10 IRQ7 SYSFAIL BERR (sticky) ACFAIL WDT SIGNAL FIFO VME event enable register VME event enable register RESET (sticky) Figure 4-5.
Chapter 5 Programming the VMEbus Interface 5 This chapter describes the EPC-8A VMEbus interface as seen by a program. Users should avoid direct use of most of these facilities. Whenever possible, the VMEbus interface should be accessed through the EPConnect software or other higher level programming facilities. The EPC-8A VMEbus interface registers are defined in Appendix F, Registers. For specific bit definitions, refer to that appendix.
EPC-8A Hardware Reference Setting the VMEbus Access Bit Before any VMEbus accesses can occur, the VMEbus access bit must be set. The EPC-8A provides two separate VMEbus access bits corresponding to the two access methods described above. Both of these access bits are part of the configuration register at port 8102h. In both cases setting the bit (1) enables accesses and clearing the bit (0) disables accesses. Bit 0 is used to enable direct VMEbus accesses above 256 MByte. Bit 1 enables E-page accesses.
Chapter 5: Programming the VMEbus Interface Supported Address Modifiers The table below lists supported address modifiers: Table 5-1.
EPC-8A Hardware Reference for these bits. 2Dh = 00101101b Bit Bit Bit Bit 3 2 1 0 (Address (Address (Address (Address Modifier Modifier Modifier Modifier bit bit bit bit 5) 4) 2) 1) = = = = 1 0 1 0 Thus, 8151h should be set to 1100 1010 or CAh. 1. Map the address. Add the A16 address to the “E page” address Addr ← segment:offset + A16 address 2. Read the data.
Chapter 5: Programming the VMEbus Interface 5. Set register 8130h with the value corresponding to bits 21–16 of the VMEbus address with the two low-order bits of the register set to 0. VMEbus Address bits 21–16 Res Res 6. Map the address. 7.
EPC-8A Hardware Reference masked after doing the EOI to the interrupt controller. Remember to re-enable them prior to leaving the interrupt handler. • If you are using DOS, you may need to switch to an internal stack. This may or may not be necessary in other environments and applications. You should also store the state of the VMEbus (i.e., current byte ordering, bus mappings and address modifiers) if you expect the state to change. Be sure to restore the state before leaving the interrupt handler.
Chapter 5: Programming the VMEbus Interface directly addressable. All A24 and A16 space is directly addressable. The chart following shows how this direct mapping is used. VME access is enabled by two bits in register 8102h. Bit 1, if set, enables the E-page access mechanism, and bit 0, if set, enables the 32-bit access mechanism. If the E-page mechanism is disabled, then the E-page is available for EXMbus options that require more DOS memory below 1MB.
EPC-8A Hardware Reference high-order address nibble is 1, C, or D, i.e., only in A16 direct access mode). Note that an IACK overrides any of the other access modes. With the EPC-8A programmers are not restricted to using the E-page to signal an IACK; direct VME memory access is possible. In protected mode you cannot access physical addresses—only virtual addresses. Thus for addressing, map the flat 32-bit physical address to a virtual pointer.
Appendix A A Chipset and I/O Map The following defines the I/O addresses decoded by the EPC-8A. It does not define addresses that might be decoded by EXMs and the EXP-MX. Table A-1.
EPC-8A Hardware Reference Table A-4. Counter-Timer functions: RadiSys R400EX emulating 8254 of PC⁄AT I/O Addr 040 041 042 043 Functional group Timer Usage Counter 0 Counter 1 Counter 2 Control (W) Table A-5. Keyboard Port: RadiSys R400EX emulating 8742 of PC/AT I/O Addr 060 061 064 Functional group Keyboard controller Port B Keyboard controller Usage Data I/O register R400EX Miscellaneous control bits Command/status register Table A-6.
Appendix A: Chipset and I/O Map Table A-7. DMA Page Registers: RadiSys R400EX emulating 74LS612 of PC/AT I/O Addr 08B 08F Functional group Usage Channel 5 page register Refresh page register Table A-8. Port A I/O Addr 092 Functional group Port A Usage Fast A20 and reset control Table A-9. EXM Configuration I/O Addr 096 Functional group EXM Config Usage EXM slot register (part of the subplane) Table A-10.
EPC-8A Hardware Reference Table A-12. Coprocessor Interface: For the EPC-8A DX, DX replaces the 80287 of PC⁄AT I/O Addr 0F0 0F1 Functional group Coprocessor Usage Clear coprocessor busy Reset coprocessor Table A-13. EXM Configuration I/O Addr 100 102 103 Functional group EXM Configuration Usage EXM IDs (on each EXM module) EXM option byte 1 (slot-specific) EXM option byte 2 (slot-specific) Table A-14.
Appendix A: Chipset and I/O Map Table A-17.
EPC-8A Hardware Reference Table A-21. VXI, VME/Misc., and On-board EXM-2A Registers I/O Addr 8140 8141 8142 8143 8144 8145 8148 8149 814A 814B 814C 814D 814E 814F 8150 8151 8152 8153 8154 8155 8158 815C 815D 815E 815F 8380 8381 8382 8383 8384 8385 8386 8387 56 Functional group VXI Registers VME and misc.
Appendix B B Interrupts and DMA Channels Interrupts The assignment of interrupts for the EPC-8A is shown in the following table: Table B-1.
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Appendix C C Connectors This Appendix specifies the details of the connectors on the EPC-8A. Please note, however, that all the connectors adhere to existing standards. The EXM expansion interface connectors are not defined here; their definition is available upon request. Connectors on EXMs and the EXP-MX are described in the separate manuals for those products. Pins are labeled from the point of view of looking into the front of the connector on the EPC-8A.
EPC-8A Hardware Reference Parallel Port The DB-25 LPT1 parallel port connector is defined as: Table C-3.
Appendix C: Connectors VGA The SVGA DB-15 monitor connector is defined as follows: Table C-5. DB-15 Pin-out 10 Pin 1 2 3 4 5 6 7 8 5 15 11 1 6 Signal Red Green Blue (not used) Ground Ground Ground Ground Pin 9 10 11 12 13 14 15 Signal (key) Ground (not used) (not used) Horizontal sync Vertical sync programmable output Ethernet The DTE RJ-45 phone jack supplies the 10BASE-T interface to the Ethernet controller. Table C-6.
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Appendix D D Memory Do not handle the EPC-8A or memory modules unless you are in a static-free environment. Memory The EPC-8A has a single SIMM socket that can handle a SIMM as large as 32 MB. The memory configurations use a SIMMs with the following specifications: • 72 pin • Fast page mode or EDO (parit or non-parity). • 80 ns (or better). • Single-sided or double-sided For 8 MB, Use a 2M x 36 SIMM. RadiSys P/N 70-0041 We recommend Toshiba THM362020ASG-80 For 16 MB, Use a 4M x 36 SIMM.
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Appendix E Subplanes E Subplane Installation A subplane is a printed-circuit board with connectors on both sides. A subplane provides several functions. Primarily it acts as the PC/AT bus. Additionally, it provides power from the VMEbus backplaneVME to the EPC-8A and expansion modules. Depending on the particular EPC-8A subsystem configuration, a specific subplane may need installing. Locate the appropriate subsection for the subplane you are using either by name or by picture.
EPC-8A Hardware Reference EXP-BP2 Subplane This subplane is to provide connectivity for the processor and two EXM modules. The EXP-BP2 is an L-shaped board with three connectors on each side. After jumpering the backplane, plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-8A subsystem will occupy.
Appendix E: Subplanes EXP-BP4 Subplane The EXP-BP4 subplane is used to couple an EPC-8A processor module, two TXM modules, and an EXP-MX Mass Storage module. The EXP-BP4 is a T-shaped board with four connectors on the front side and three on the rear. After jumpering the backplane, plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-8A subsystem will occupy.
EPC-8A Hardware Reference EXP-BP3A Subplane The EXP-BP3A subplane allows for a processor and a total of four EXM modules. The EXP-BP3A has five connectors on each side. After jumpering the backplane, plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-8A subsystem will occupy. The EXM slot numbers are shown in the drawing. Insert EPC-8A in these two slots Figure E-4.
Appendix E: Subplanes EXP-BP5 Subplane The EXP-BP5 subplane is used to build a system with a processor, four EXM modules, and an EXP-MS Mass Storage module. The EXP-BP5 has six connectors on the front side and five on the rear. After jumpering the backplane, plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-8A subsystem will occupy. The EXM slot numbers are shown in the drawing.
EPC-8A Hardware Reference EXP-BP4A Subplane The EXP-BP4A subplane is used in systems needing a CPU and six EXM modules. The EXP-BP4A has seven connectors on each side. After jumpering the backplane, plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-8A subsystem will occupy. The EXM slot numbers are shown in the drawing. Insert EPC-8A in these two slots Figure E-6.
Appendix E: Subplanes EXP-BP6 Subplane The EXP-BP6 subplane is used in a configuration with an EPC-8A processor module, six EXM modules, and an EXP-MX Mass Storage module. The EXP-BP6 has eight connectors on the front side and seven on the rear. Plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-8A subsystem will occupy. The EXM slot numbers are shown in the drawing.
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Appendix F F Registers Registers Specific to the EPC-8A Registers in the I/O space that are specific to the EPC-8A are defined below. Only registers 8140h–814Fh are “dual-ported” to both the PC and VME bus. The addresses shown below are used by the PC port. The VME addresses for the registers 8140h–814Fh are described later.
EPC-8A Hardware Reference Where a bit position has been described by a 0 or 1, the bit is a ROM bit, and writing to it has no effect. Unless otherwise noted below, all registers and bit values are readable and writeable. Configuration (8102h) ARBPRI RELM ARBM GPO VGA VME-E VME-32 This register controls VGA controller enables and the VMEbus interface.
Appendix F: Registers VME A21–16 Address Register (8130h) VMEbus Address bits 21–16 1 1 When the EPC-8A performs an access in its “E page” (address range 0E0000–0EFFFF), the access is mapped onto the VMEbus. The least-significant sixteen of the VME address bits are provided directly (from the 486), and the remaining 8 (for an A24 access) or 16 (for an A32 access) bits must come from somewhere else.
EPC-8A Hardware Reference bit is then set if four rising edges of the SYSCLK signal are detected. This bit is intended to be used to detect that SYSCLK is being generated on the backplane. READY This is a RAM bit defined by the VXI specification. In a VXIbus software environment, if READY=1 and PASS=1, the EPC-8A is ready to accept VXI-defined messages. This bit is read-only from the VME port and may be read/written from the PC port. This bit is also held clear while the SRST bit is asserted.
Appendix F: Registers Protocol Register/Signal FIFO (8148h and 8149h) Lower Upper 1 1 1 1 1 1 1 1 0 0 0 1 1 1 1 1 A read of this register from either the PC or VME ports reads the ROM constants stored in the protocol register. A write from either the PC or VME port writes the signal register.
EPC-8A Hardware Reference read-only. MLCK This EPC-8A specific bit is used for synchronization of messages from multiple senders, something not provided for in the VXI specification. 1 The message register can be locked for the sending of a message. 0 The message register is locked. WRCP This EPC-8A specific bit is a read-only copy of the WRDY bit. FSIG Defined only when SIG=1, in which case FSIG is the number (0 or 1) of the register in the FIFO holding the earliest signal.
Appendix F: Registers Reserved (814C and 814D) Lower Upper 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 These registers are reserved and return 1s when read. Writes to these registers have no effect. Message Low Register (814Eh and 814Fh) Lower Upper RAM RAM There are actually two 16-bit registers at this address, outgoing and incoming 16 bit registers (UART model). • Outgoing register: A write from the PC side fills the outgoing register.
EPC-8A Hardware Reference VME Interrupt State Register (8152h) IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 IRQ2 IRQ1 MSGR This read-only register defines the state of the VMEbus and message interrupts. IRQx If clear (0), the associated VMEbus interrupt line is asserted. MSGR If clear (0), a message interrupt is being signaled. MSGR is clear if both bits RRDY and WRDY in the response register are clear.
Appendix F: Registers a 1 and the corresponding bit in the event state register is a 0, the EPC-8A IRQ10 interrupt is asserted. Software may then examine the interrupt and event state registers to determine the cause. VME Interrupt Generator Register (8158h) SLOT1* 1 1 1 1 INTERRUPT-OUT This register is used to assert one of the VMEbus interrupt signals. If the INTERRUPT-OUT bits are zero, no interrupt line is asserted by the EPC-8A. If lower three bits are set to 001, VMEbus IRQ1 is asserted.
EPC-8A Hardware Reference 00 Disables events from the watchdog timer 01 8.2 S 10 128 ms 11 1.02 S A read of the module status/control register also has a side effect of resetting the watchdog timer. Therefore, if you are using the watchdog timer, the intention is that you are required to read this register within the defined period of the timer to prevent its generating an interrupt.
Appendix G XFORMAT Software for the EPC-8A G XFORMAT Software You use the XFORMAT utility program to: • Build DOS file structures on the EPC-8A’s optional resident flash memory. • Build file system images that can be used in VME RAM disks. For complete information about XFORMAT, see the XFORMAT Software User’s Manual.
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Appendix H AUTOSET Software H AUTOSET Software The AUTOSET program is used to configure the Ethernet controller. Since this may be set up by your supplier, you may never be required to use this program. The software is contained on the optional Net 1 software diskette that is an optional item for the EPC-8A. The AUTOSET program must be run from DOS or a DOS shell and enables these actions: • Select one adapter to be configured. Up to four adapters may be installed.
EPC-8A Hardware Reference To start the program, move to the Ethernet controller subdirectory and type AUTOSET, then press Enter. The menu depicted in the figure below displays. Figure H-1. AUTOSET Program Main Menu The following options are in the main menu: Display/Change Adapter Configuration, Diagnostics, and Quit.
Appendix H: AUTOSET Software For a single Ethernet controller installation, follow these steps: 1. From the AUTOSET program, select “Display/Change Adapter Settings” to set up the Ethernet controller just installed. 2. Skip the Novell Configuration prompt. It does not apply to the EPC-8A. 3. Select the I/O base address. Use the tab key to change the Ethernet controller's I/O base address to any available location.
EPC-8A Hardware Reference Ethernet controller must use the same I/O base address parameter as the Ethernet controller. The Ethernet controller is programmed at the factory with a default I/O base address of 300h. If necessary, use the tab key to choose an optional address according to the guidelines set out in the following sections. AUTOSET allows selection of the following I/ O base addresses: 240h, 280h, 2C0h, 300h, 320h, and 340h.
Appendix H: AUTOSET Software NE2000 and NE2000+ users should select the I/O Port mode. WD8003 and WD8013 users should select the Shared Memory mode. Systems with limited amounts of memory should select I/O Port mode to avoid conflicts with other memory-mapped devices. Systems with ample memory, where increased performance is important, should select Shared Memory mode. Boot PROM (This option is for systems with an EXM-10A installed. The EPC-8A does not support the boot PROM option of AUTOSET.
EPC-8A Hardware Reference Diagnostics Once the LAN adapter is installed and cabled, use the AUTOSET diagnostic program to check the adapter installation. Note that the AUTOSET diagnostic program test requires that the adapter be attached to a properly-terminated network or to a BNC “T” connector that has two terminators connected (if thin Ethernet is used). Once the cable is installed, use the AUTOSET diagnostic program to check the network interconnection.
Appendix H: AUTOSET Software • Boot PROM changes occur only after cold boot of PC This message displays following a saved change to the boot ROM configuration. Boot ROM changes are not in effect until a hardware reset is initiated—either push the reset button, or turn the system off, wait ten seconds, then turn it back on. • Error — no new adapter This message displays when the user has attempted to enable a disabled Ethernet controller, but the software never found the disabled adapter.
EPC-8A Hardware Reference • Using AUTOSET on Large Systems If you are using AUTOSET on a system with more than eight (8) EXM slots, you must use a switch when starting AUTOSET to tell it how many slots are present.
Appendix I I SVGA Video Controller Hardware The EPC-8A contains an SVGA graphics controller using the Chips and Technologies 65545. This is connected to the CPU local bus to give the best possible graphics performance.
EPC-8A Hardware Reference Before you begin The following instructions assume that the user is familiar with DOS and certain DOS commands. Please review the associated DOS commands before performing the installation. Notational conventions Throughout this manual, the term ’DOS’ refers to both MS-DOS and PC-DOS, except when noting features that are unique to one or the other. Table I-1 shows the typographic conventions that are used throughout this section: Table I-1.
Appendix I: SVGA Utility software The Chips and Technologies SVGA software for Windows 95 provides several functions for setting screen resolution and color depths. These are selected under the Display tab as normally accessed through Windows 95. Microsoft Windows 3.
EPC-8A Hardware Reference To install Windows 3.1 drivers from within Windows, proceed as follows: 1. Ensure that Windows 3.1 is already installed on your computer and start Windows 2. From the Main window of the Program Manager run the Windows 3.1 Setup program. 3. Highlight the desired choice by moving the cursor to the correct display driver, and then press [Enter]. 4. Select Change System Settings... from the Options menu of Setup. 5. Click on the down arrow at the right side of the Display: line.
Appendix I: SVGA 3. Click the Settings tab, then click the Advanced Properties button. 4. Click the Change button in the Adapter area. 5. Click the Have Disk button, then click the OK button. 6. Specify the path to the new driver and press the key. 7. Insert the drivers disk labeled “VGA Disk 1 of 2” in the A: floppy drive, and enter A:\. The “Select Device” dialog box appears. 8. Select the adapter that corresponds to the one you installed in your machine and click the OK button.
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Appendix J J Error Messages and Diagnosis Troubleshooting This section deals with problems that you may encounter that do not provide an error message. If an error message displays, see the Error Messages and Diagnosis section of this Appendix, starting on page 99. Table J-1. Troubleshooting Error Messages Symptoms System appears to boot (evidenced by RUN LED being on, floppy and hard disk being accessed) but provides no video.
EPC-8A Hardware Reference Table J-1. Troubleshooting Error Messages Symptoms System hangs during boot process (Master LED on; RUN LED off) Possible cause(s) VMEbus has no Slot-1 controller providing bus timeout. Solution You are probably loading an expanded memory manager (for example, EMM386.EXE) in your CONFIG.SYS file. This can cause the system to hang if: • There is no Slot-1 controller • The Slot-1 controller is not providing the proper bus timeout • The Bus Grantbus jumpers are not installed.
Appendix J: Error Messages and Diagnosis Bad or missing command interpreter Problem: The DOS operating system cannot find the Command line interpreter. Solution(s): Either COMMAND.COM is not present at the specified (or default) directory level of the boot disk or the “SHELL=” statement in your CONFIG.SYS lists the file incorrectly (wrong directory or misspelled). Operating system not found Problem: No boot disk could be found. Solution(s): This could occur in several different ways.
EPC-8A Hardware Reference If you are using the EXM-9 to cable to an external disk, make sure that you have power to the disk, the ribbon cable is good and correctly oriented, and that the end of the ribbon cable is not shorting to the front panel of the EXM-9. If you are not using an IDE drive, run the BIOS setup program. Change the drive type to match the device being used.
Appendix J: Error Messages and Diagnosis it is a PC/XT-only or PS/2 keyboard). If this is the case, replace the keyboard with a PC/AT style keyboard. Memory parity interrupt at ... Problem: This could be a software error (reading a nonexistent memory area) or a true hardware failure. Solution(s): Attempt to repeat the error. If the error occurs during the execution of your own proprietary software, verify that the memory location specified in your software is valid.
EPC-8A Hardware Reference execution of your own proprietary software, verify that the memory location specified in your software is valid. Real time clock error Problem: The battery-backed TOD clock fails the BIOS test. Solution(s): Run the BIOS setup program to determine what is wrong, and correct it. If the error occurs repeatedly, the EPC-8A’s battery may have failed. System CMOS checksum bad - run SETUP Problem: Something in the nonvolatile CMOS RAM is incorrect.
Appendix K Configuring the Ethernet Drivers K After the EPC-8A is installed, cabled and configured, follow the instructions in this appendix to configure the network interface drivers. The distribution diskettes supplied with the EPC-8A contain drivers for IPX, ODI, NDIS and a packet driver under DOS/ Windows. The majority of users running DOS/Windows select the ODI driver in 16-bit mode, if supported by their network software.
EPC-8A Hardware Reference single workstation. Refer to the Novell NetWare ODI Shell for DOS manual for additional installation instructions. Once the EPC-8A is configured using AUTOSET, and the distribution diskettes are loaded onto the system, use a text editor to modify the NET.CFG file to match the AUTOSET parameters. The interrupt, I/O address, mode, and interface type must all match. Then add the following programs into the AUTOEXEC.BAT file: LSL.COM Link support layer ATLANTIC.
Appendix K: Configuring the Ethernet Drivers Packet Driver Installation The diskettes distributed with the EPC-8A contain two packet drivers named ATDRIVE.COM (for 16-bit NE2000 mode) and WD8003E.COM (for 16-bit Western Digital mode). RadiSys also supplies files named TELBIN (a Telnet terminal emulation) and FTPBin (an FTP or File Transfer Program) that work with TCP/IP. To install the packet drivers, first run AUTOSET to initialize the adapter (IRQ, I/O port, shared memory base, and so on.
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Index A C A16 41, 44, 45, 49, 82 A24 44, 45, 49, 75 A32 44, 45, 46, 49, 75 ACFAIL 47, 80 address lines 44 address modifier 45, 49, 79 Altitude 3 Arbitration mode 74 Arbitration priority 74 ATLANIC.
EPC-8A Hardware Reference error messages 100 ESD 5 EXM 7, 38, 69 configuration error 102 expansion interface 38, 59 setup menu 39 slot numbers 69 EXMID signal 38 EXP-AM 7 EXP-BP2 65, 66 EXP-BP3A 68 EXP-BP4 67 EXP-BP4A 70 EXP-BP5 69 EXP-BP6 71 EXP-MC 7 EXP-MS/MX 7, 69 extended memory 31 EZSetup I/O base address 87, 88 Interrupt 88 Other Parameters 88, 89 Program 85, 89 Installation 5 Interrupt 88 acknowledge 49, 79, 81 acknowledge cycle 41 acknowledge signal 7 assignments 24 generator register 41 mapping 5
: Index N NDIS 105, 106 NET.CFG file 106 network interface drivers 105 Non-system disk error 103 notational conventions iv O ODI 105, 106 P P2 39 packet driver 105, 107 parallel port 24, 60 Parity error 103 part numbers 63 PASS bit 37 PC/AT bus 65 peripherals 7, 10 power 3, 65 power-on self-test 36 Printer port 24 priority 5, 39 Priority arbiter 74 processor 30 Protocol register 77 PROTOCOL.
EPC-8A Hardware Reference address bits 75 chassis 9 event enable register 81 mapped registers 82 modifier register 40 VME access bit 74 VMEbus 49 accesses 39, 43, 45, 49 addressing 4 arbiter 4 backplane 65 daisy-chain signals 8 direct mapping 39, 43 interface 39, 74 interrupt handler 4 interrupter 4 interrupts 80 master data transfer 4 requester 4 slave data transfer 4 slots 7 specifications 3 system controller 4 timeout duration 39 112 VXI device type 4 manufacturer code 4 model code 4 protocols 4 regis
