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EPC -8 Hardware Reference RadiSys Corporation 15025 SW Koll Parkway Beaverton OR 97006 Phone: (503) 646-1800 Fax: (503) 646-1850 ______________________________________________________________________ 07-0226-01 June 1995 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
EPC-8 Hardware Reference Portions of this manual are Copyright 1993-1994 Cirrus Logic, Inc. AT/LANTIC is a trademark of National Semiconductor, Inc. IBM, OS/2, and PC/AT are trademarks of International Business Machines Corporation. Intel and Intel 80486 are registered trademarks of Intel Corp. Microsoft and MS-DOS are registered trademarks of Microsoft Corporation. Motorola is a registered trademark of Motorola, Inc. Novell is a registered trademark of Novell, Inc.
EPC-8 Hardware Reference Table of Contents Chapter 1 - Product Description ............................................................................. 1-1 Overview........................................................................................................... 1-1 VMEbus ............................................................................................................ 1-3 System controller functions ......................................................................
EPC-8 Hardware Reference Video Controller ....................................................................................... 4-6 Ethernet Controller ................................................................................... 4-7 Resident Flash/SRAM Memory................................................................ 4-7 Resident Flash Memory .................................................. 4-7 SRAM.............................................................................
EPC-8 Hardware Reference Appendix B - Interrupts and DMA Channels ....................................................... B-1 Interrupts ........................................................................................................... B-1 DMA Channels.................................................................................................. B-2 Appendix C - Connectors ......................................................................................... C-1 RS-232 Port (COM1) ...........
EPC-8 Hardware Reference Appendix I - SVGA................................................................................................... I-1 Video Controller Hardware ............................................................................... I-1 Display Drivers and Utilities Software.............................................................. I-1 Introduction ....................................................................................................... I-2 Before you begin .............
EPC-8 Hardware Reference Packet Driver Installation.................................................................................. K-5 Windows NT Driver Installation ....................................................................... K-5 SCO UNIX Installation ..................................................................................... K-6 Configuring an EPC-8 .............................................................................. K-6 Disabling the COM2 Serial Port Driver..............
EPC-8 Hardware Reference List of Figures Figure 2-1. Jumper Locations .................................................................... 2-3 Figure 2-2. Daisy-Chain Signal Concept ................................................... 2-5 Figure 2-3. Backplane Jumpers Required for EPC-8 Subsystem ............... 2-6 Figure 2-4. VMEbus Jumpers on Rear Wirewrap Pins .............................. 2-8 Figure 2-5. VMEbus Jumpers on Front Stake Pins .................................... 2-9 Figure 3-1. Main Menu.
EPC-8 Hardware Reference List of Tables Table 1-1. EPC-8 Environmental Specifications ....................................... 1-4 Table 1-2. Additional EPC-8 Specifications.............................................. 1-5 Table 2-1. VME Slots Available................................................................ 2-4 Table 4-1. Reset Conditions....................................................................... 4-12 Table 5-1. Supported Address Modifiers ..............................................
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1 Chapter 1 - Product Description Overview The EPC-8 is a highly integrated PC-compatible computer designed specifically for use in the VMEbus and extended VMEbus (VXIbus) environments. It is compatible with all major PC software environments, including Microsoft DOS, Microsoft Windows 3.x, Microsoft Windows NT, and IBM OS/2, plus others. It is available as either a one-slot or two-slot 6U VMEbus module.
EPC-8 Hardware Reference 1 1 o Phoenix BIOS with RadiSys enhancements to support the additional on-board features and VMEbus environment. Additional features (some optional) include: o SVGA interface. This local-bus interface is based on the Cirrus GD54xx chipset, with 512 Kbytes of video RAM providing local bus graphics performance and non-interlaced resolutions to 1024 x 768, with 16 colors.
Product Description 1 VMEbus The VMEbus implementation provides a complete bus interface with enhancements for multiprocessor environments. This is described in three sections covering the system controller functions, the VMEbus master interface, and VMEbus extended register set. System controller functions A single hardware configuration jumper allows the EPC-8 to provide full VME slot-1 arbitration functions.
EPC-8 Hardware Reference 1 1 The EPC-8 includes a complete set of VXIbus-defined message-based device registers. These registers, implemented in a proprietary gate array and mapped into the VMEbus A16 address space, include a device-type identifier register (supporting geographic addressing), bus status and control registers, and a register-based message passing facility. Specifications The following are the environmental specifications for the EPC-8.
Product Description 1 The following table contains additional specifications. Characteristic Electrical Current Other Weight VME VXI Value +5V +12V -12V 4.0A typical 0.2A typical 0.2A typical without EXMs master address master transfer slave address slave transfer interrupter interrupt handler requester arbiter system controller 2.7 lb. (1.
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Configuration and Installation Chapter 2 - Configuration and Installation 2 In order to configure and install the EPC-8, the following steps must be completed: 1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
EPC-8 Hardware Reference Configuring the EPC-8 Slot-1 Functionality 2 2 Every VMEbus system must have a System (Slot-1) Controller. The Slot-1 controller provides the following functionality: • Serves as the bus arbiter (priority or round-robin) • Drives the 16 MHz SYSCLK signal • Starts the IACK and bus grant daisy chains. • Provides bus timeout error (BERR) function The EPC-8 can be user-configured to provide standard VMEbus Slot-1 functionality.
Configuration and Installation JP3 Alive Slot 1 Controller Jumper 2 JP5 Flash JP4 BIOS JP2 Loop JP6 rcvr Figure 2-1. Jumper Locations. Selecting the EPC-8 Slot Location There are two main considerations in determining where the EPC-8 should be positioned in the chassis. • Per the VMEbus specification (Rule 3.3), the Slot-1 controller must be in Slot 1. All other boards must be to the right of the Slot-1 controller.
EPC-8 Hardware Reference The EPC-8 plus EXM expansion modules plus any mass storage module can be considered together as a single subsystem. Use the following worksheet in Table 2-1 to determine the total number of VME slots your particular subsystem configuration requires. 2 2 Product Double-slot EPC-8 (Includes first two EXM modules) Additional EXP-MC(s) (Holds additional two EXM modules) EXP-AM VME Slots Mass Storage Module (EXP-MX) Total 2 1 each 2 2 Total VMEbus slots used .....................
Configuration and Installation xxxIN xxxIN xxxIN xxxIN xxxOUT xxxOUT xxxOUT xxxOUT 2 VMEbus Slots Figure 2-2. Daisy-Chain Signal Concept. The daisy-chain signal concept is shown in Figure 2-2. The Slot-1 controller board initiates each daisy-chain signal. Each VMEbus slot to the right of the Slot-1 controller must pass through each of the daisy-chain signals. For each VMEbus slot, xxxIn pin must be connected to its corresponding xxxOut pin (e.g. BG0In to BG0Out, BG1In to BG1Out,...
EPC-8 Hardware Reference indicates jumper needed 2 2 Figure 2-3. Backplane Jumpers Required for EPC-8 Subsystem. The figure above shows the jumpers required for a five-slot EPC-8 subsystem, consisting of a two-slot EPC-8, an EXP-MC module carrier for two additional EXM modules, and an EXP-MX storage module. Note that the left-most slot does not require any jumpers. All other slots occupied by the subsystem require all five jumpers be installed. 2-6 Artisan Technology Group - Quality Instrumentation ...
Configuration and Installation Once you have determined where the jumpers need to be, you must determine how to jumper your particular backplane. Different backplane manufacturers handle this in different ways; some provide stake pins on the rear of the backplane while others provide stake pins on the front of the backplane. These stake pins can be located in several different places. J1 Connector 2 BG0 BG1 BG2 BG3 IACK Figure 2-4. VMEbus Jumpers on Rear Wirewrap Pins.
EPC-8 Hardware Reference J1 Connectors 2 BG0 BG1 BG2 2 BG3 IACK Figure 2-5. VMEbus Jumpers on Front Stake Pins. Consult your VME chassis reference manual or contact the chassis manufacturer if you are unsure where to jumper your particular system. 2-8 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
Configuration and Installation EPC-8 Insertion The EPC-8 must be installed onto a subplane that fits between the EPC-8 and the VMEbus backplane. Subplanes are discussed in more detail in Appendix E. The subplane is installed first, connecting to the backplane. After installing the subplane, the EPC-8 processor module can be inserted into the VMEbus chassis. MAKE SURE THAT POWER TO YOUR VME SYSTEM IS OFF. THE EPC-8 MODULE IS NOT DESIGNED TO BE INSERTED OR REMOVED FROM LIVE BACKPLANES.
EPC-8 Hardware Reference The next step of installation is connecting peripherals, typically a video display and keyboard, but also perhaps a mouse, modem, printer, etc. Pin-outs for the EPC-8 front-panel connectors are specified in Appendix C, Connectors. 2 2 Remaining Steps The remaining configuration steps may include BIOS configuration, driver software installation and application software installation.
Chapter 3 - BIOS Configuration 3 Introduction The EPC-8 uses the Phoenix BIOS to configure and select various system options. This section details the various menus and sub-menus that are used to configure the system. While the section is written as though you are encountering each field in sequence and for the first time, your system may be pre-configured and require very little intervention. Some error messages might occur during the execution of the BIOS initialization sequence.
EPC-8 Hardware Reference Use the up and down cursor (arrow) keys to move from field to field. Use the right and left arrows to move from menu to menu, as noted in the menu bar at the top of the screen. If you use the arrow keys to leave a menu and then return, your active field is always at the beginning of the menu. If you select a sub-menu and then return to the main menu, you return to that sub-menu heading.
BIOS Configuration The fields in each menu and sub-menu are explained below. information is available in the help area on the BIOS setup screen. Additional help System Time:/System Date: These values are changed by moving to each field and typing in the desired entry. Use the tab key to move from hour to minute to second, or month to day to year. Diskette A:/Diskette B: This field identifies the type of floppy disk drive installed as the A drive.
EPC-8 Hardware Reference There are two more lines on the Main BIOS Setup Screen: ‘‘System Memory’’ and ‘‘Extended Memory.’’ These are display-only fields set by the BIOS. No user interaction is required. IDE Adapter Sub-Menus 3 3 There are two IDE adapter sub-menus: one for the master drive and one for the slave drive. To use an EXM-HD, EXM-MX, or EXP-MX series mass storage unit, you must configure a master adapter; the slave is optional, and not relevant to most RadiSys hardware.
BIOS Configuration Existing (formatted) disks must be set up using the same parameters that were used originally when the disk was formatted. You must enter the specific cylinder, head, sector information as listed on the label attached to the drive at the factory. Use the ‘‘User’’ type described below. Type For the majority of users who are using a system that was pre-configured, you probably have an IDE hard disk drive. Select ‘‘None’’ if you are not using an IDE hard disk drive.
EPC-8 Hardware Reference PhoenixBIOS Setup - Copyright 1992-94 Phoenix Technologies Ltd. Boot Options Item Specific Help Boot Delay: Boot Sequence 3 [0] [A: then C:] SETUP Prompt: [Enabled] POST Errors: [Enabled] Floppy Check: [Enabled] Summary Screen: [Enabled] 3 F1 ESC Help Exit Select Item Select Menu -/+ Change Values Enter Select Sub-Menu F9 Setup Defaults F10 Previous Values Figure 3-3. Boot Sequence Sub-Menu.
BIOS Configuration The default is C: then A:. The setting chosen here displays in the Boot Sequence SubMenu prompt. About Drive Letter Assignment The BIOS determines the boot device algorithmically. First it determines where the floppy drive fits into the sequence; however, for simplicity here, assume no A: drive. The BIOS starts by determining if an IDE controller is enabled. If so, this becomes the C: drive and is expected to be the boot device.
EPC-8 Hardware Reference Summary Screen: Use this option to enable or disable a summary of the system configuration, which displays before the operating system starts to load. To save time, you can disable the summary screen. The default is to enable the summary screen display. When you have completed the Boot Options Menu, exit back to the Main BIOS Setup Menu using the ESC key and complete the Keyboard Features Sub-Menu.
BIOS Configuration Key Click Use this option to enable or disable the key click feature on the keyboard. If enabled, the keyboard produces an audible click each time a key is pressed. Keyboard auto-repeat rate: Use this option to set the auto-repeat rate if holding a key down on the keyboard. The rates are from 2-30 per second. 3 Keyboard auto-repeat delay: Use this option to set the delay between when a key is pressed and when the autorepeat feature begins. Options are 1/4, 1/2, 3/4, and one second.
EPC-8 Hardware Reference The Advanced Menu contains settings for integrated peripherals, memory shadow, watchdog timer, large disk access mode, and setting the Flash and VME ROMdisk BIOS extension base addresses. Integrated Peripherals Sub-Menu Use this option to select the Integrated peripherals sub-menu, in order to configure the COM and LPT ports. This does not configure Ethernet, video, or Flash memory. For more information, turn to the section concerning the Integrated Peripherals Sub-Menu.
BIOS Configuration Options are the following: DC000-DFFF0h D8000-DBFF0h D4000-D7FF0h D0000-D3FF0h CC000-CFFF0h C8000-CBFFFh Not Installed An important implication is that you cannot have an IDE drive if the resident Flash memory is the boot device. For more information, refer to ‘‘About Drive Letter Assignment’’ on page 3-7. 3 VME ROMdisk: Use this option to enable VME memory on the EPC-8. This must be selected for the VME memory to appear as a drive.
EPC-8 Hardware Reference Integrated Peripherals Sub-Menu Use the options in this sub-menu to configure the COM and LPT ports. PhoenixBIOS Setup - Copyright 1992-94 Phoenix Technologies Ltd. Integrated Peripherals RadiSys EPC-8 3 Item Specific Help COM 1 COM 2 LPT 1 ECP 3 F1 ESC Help Exit [3F8, IRQ4] [2F8, IRQ3] [378, IRQ7] [Disabled] Select Item Select Menu -/+ Change Values Enter Select Sub-Menu F9 Setup Defaults F10 Previous Values Figure 3-6. Integrated Peripherals Sub-Menu.
BIOS Configuration Memory Shadow Sub-Menu The term ‘‘Memory Shadow’’ refers to the technique of copying information from ROM into RAM and accessing it in this alternate memory location. The Memory Shadow Sub-Menu is discussed below. PhoenixBIOS Setup - Copyright 1992-94 Phoenix Technologies Ltd.
EPC-8 Hardware Reference EXM Menu Use this menu to set up the optional EXM expansion modules in your EPC-8. Enter the EXM-ID, plus option byte information for OB1 and OB2. This information is found in the hardware reference manual shipped with each EXM expansion module. PhoenixBIOS Setup Main 3 3 - Advanced Copyright 1992-94 Phoenix Technologies Ltd.
BIOS Configuration C 1 3 5 P U 3 0 2 4 Figure 3-9. Slot Numbering. All slots not occupied by an EXM module should show an ID of FF and OB1/OB2 of 00 00 indicating that no EXM is present ID: Enter the EXM-IDs for the EXMs you intend to install in this system. Up to six EXMs can be installed. Option Byte 1:/ Option Byte 2: Each EXM expansion module has values you must enter for the option byte 1 and option byte 2 configuration data.
EPC-8 Hardware Reference When using EXMs with configurable interrupts, DMA channels, I/O addresses, and/or memory addresses, avoid conflicts with built-in functions of the EPC-8. Guidelines are: 1. If an interrupt is needed, use IRQ3, IRQ5, IRQ9, IRQ12, or IRQ15. IRQ7 can be used if the printer port is not being used. IRQ3 should not be used if the COM2 port is being used. Use DMA channels 1, 3, 6, and 7. Do not select I/O addresses that conflict with those in the EPC-8.
BIOS Configuration Arbitration Priority: Use this option to set the arbitration priority. Possible values are 0, 1, 2, and 3, with a value of 0 indicating the highest priority. This determines which VMEbus request signal the EPC-8 uses when it accesses the VMEbus. Arbitration Mode: Use this option to select the arbitration mode. Possible values are ‘‘Round Robin’’ or ‘‘Priority.’’ This determines how the EPC-8 performs bus arbitration when it is the VMEbus Slot-1 controller.
EPC-8 Hardware Reference Exit Menu Use the options in this menu to save and exit, or abandon your changes and exit to the system. PhoenixBIOS Setup Main - Advanced Copyright 1992-94 Phoenix Technologies Ltd. EXM VME Exit RadiSys EPC-8 3 3 Item Specific Help , , or selects field.
BIOS Configuration Load previous values Use this option if you want to load the system with the previous values before this editing session started. You do not exit. Save Current values Use this option to save the edits you have made during this session. You do not exit. 3 Exit and Update BIOS This option is only for users who plan to update their BIOS from a floppy disk.
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Theory of Operation Chapter 4 - Theory of Operation Overview The EPC-8 is a PC/AT compatible computer with standard PC peripherals, a VMEbus interface, and modular expansion capability via the EXM expansion interface. Figure 4-1 provides an diagrammatic overview of the system functional blocks. Most of the standard functions of the PC architecture are embodied in the VLSI 82C486 chipset. DRAM and VGA are interfaced to the 486 processor by a 32-bit local bus.
EPC-8 Hardware Reference 4 4 Figure 4-1. EPC-8 Block Diagram. 4-2 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
Theory of Operation Processor board The EPC-8 processor board conforms with the VMEbus standard 6U form-factor. Processor and Coprocessor There are two processor options for the EPC-8. There may be an Intel486 DX2 (32bit bus interface) running at 50 MHz, or an Intel486 DX2 running at 66 MHz. The 50 MHz DX2 and 66 MHz DX2 each have a built-in math coprocessor. Memory The following memory options are supported: 4 Mbytes, 8 Mbytes, and 16 Mbytes. One SIMM socket is available.
EPC-8 Hardware Reference Memory at addresses between 0 and 1 MB (0FFFFFh) is mapped as follows: Range 000000 - 09FFFF 0A0000 - 0BFFFF 4 4 Content DRAM (first 640 KB) Almost always used by a video controller as video RAM. If the onboard VGA is populated and enabled, then this memory is accessed over the CPU local bus. Otherwise, it is mapped to the EXM interface. 0C0000 - 0C7FFF Write-protected DRAM containing video BIOS 0C8000 - 0DFFFF* Uncommitted; mapped to EXM interface.
Theory of Operation BIOS ROM and ROM Shadowing The EPC-8 contains a Flash boot device (chip) as its BIOS ROM. The BIOS ROM is mapped into the top of the processor's 32-bit address space. The BIOS consists of an 8 Kbytes boot block and a System BIOS combined with a VGA BIOS in a 112 Kbytes partition. The Flash boot device is memory addressed and resides in the last 128 Kbytes of system memory at address FFFE0000H to FFFFFFFFH. The layout is described in Figure 4-2.
EPC-8 Hardware Reference Be aware that the contents of this block are included in the BIOS checksum so any modification to this area also requires a modification to the checksum value itself. CMOS Backup and Restore Use the CMOSTOOL.EXE function to copy and restore CMOS parameters into the 4 Kbyte-sized “ parameter block 1” on the Flash boot device chip. This is useful if battery life becomes an issue, or for backup.
Theory of Operation Ethernet Controller The EPC-8 contains an on-board Ethernet controller connected through the 16-bit EXM expansion interface, which is compatible with Western Digital 8013, Novell NE2000 and NE2000+ cards through the use of National Semiconductor's DP83905 (AT/LANTIC chip). The default configuration for the Ethernet port is as a WD8013compatible card. The I/O base address is 240. Interrupts are signaled on IRQ5. These parameters can be changed by running the AUTOSET.
EPC-8 Hardware Reference Watchdog Timer The watchdog timer is a binary counter which, upon overflow, will signal a watchdog timer event. The counter will cause a watchdog event after approximately 125 mS, 1 second or 8 seconds (depending on the value of FWDT and SWDT, bits 2 and 1 in register 815D) if the application software does not reset the timer. An I/O read to address 815D resets the counter.
Theory of Operation Battery The battery powers the CMOS RAM and TOD clock when system power is not present. At 60°C, the battery should have a shelf life of over four years. In a system that is powered on much of the time and where the ambient power-off temperature is less than 60°C, the battery is estimated to have a life of 10 years. If system power is present, the VME +5V STDBY voltage also powers the CMOS RAM and TOD clock.
EPC-8 Hardware Reference RS-422/485 Port The modified RS-422/RS-485 port is normally configured as COM2 (I/O address = 2F8-2FF, IRQ3). This port is also a standard PC COM port based on the 16450 architecture. If not needed, COM2 can be disabled in the setup screen to free up the I/O address and interrupt for usage by other expansion products. The RXD and TXD signals are RS422 compatible with differential receiver and driver, respectively.
Theory of Operation TEST This LED is lit whenever the system is running its power-on self-test, as reflected in the PASS bit in the VXI registers. If PASS is 0, then this LED is lit. This only occurs during a hardware reset. Resetting the EPC-8 There are a number of ways to reset (reboot) the EPC-8. Power-off, Power-on Known as a cold hardware reset. This causes all boards in the VMEbus to reset. The system runs the power-on self-tests and reboots the OS. Power low ‘‘Warm’’ hardware reset.
EPC-8 Hardware Reference 4 4 Power-On Reset Power Low < 3.0 V Power Heading Lower 34.5 V FrontPanel Reset Button CtrlAlt-Del ‘‘Cold’’ reset ‘‘Cold’’ reset ‘‘Warm reset ‘‘Warm’’ reset POST runs 80C486, 82C486, all VXI registers reset POST runs 80C486, 82C486, all VXI registers reset AT. RESET generated SYS RESET* generated AT. RESET generated SYS RESET* generated POST runs 80C486, 82C486, most VXI registers reset bits 4-7 of 8102 not reset; bits1,2,4 & 6 of 815D not reset AT.
Theory of Operation Register State after Reset A ‘‘cold’’ or hardware reset of the EPC-8 (not a keyboard CTRL+ALT+DEL reset) clears all of the register bits to 0, except for RELM, ARBM, and ARBPRI, which may be in an undefined state. (All bits, however, are cleared by a power-on reset.) However, this may not be apparent because the BIOS initialization sequence then reinitializes values in these register fields, largely as a result of the non-volatile configuration information specified in the setup screen.
EPC-8 Hardware Reference The EPC-8's reaction to SYSRESET* being asserted on the VME bus depends upon whether the SRIE bit (SYSRESET Input Enable, bit 7 of the Status/Control register) is set or clear. When SRIE is asserted (set), the assertion of SYSRESET* results in the same "warm" hardware reset that a watchdog timer reset causes. When SRIE is not asserted, the EPC-8 responds to the assertion of SYSRESET* by placing the EPC8 into a state almost identical to the Soft Reset state.
Theory of Operation SRFIFO(FSIG) and does the above action). The only apparent purpose of these writes is testability. EXM Expansion Interface The EXM expansion interface is electrically similar to the PC/AT ISA (16-bit data) bus. In addition, it contains a signal EXMID* used for dynamic recognition and configuration of EXMs. EXMs respond to one or more I/O addresses in the range 100h - 105h only when their EXMID* line is asserted.
EPC-8 Hardware Reference • Drives the 16 MHz SYSCLK signal • Starts the IACK bus grant daisy chain. • Provides Bus time-out function When configured as the Slot-1 controller, the EPC-8 detects and terminates data transfer bus timeouts. Once it sees either the DS0 or DS1 lines asserted, a counter is started. If the counter expires before both DS0 and DS1 are deasserted, the EPC-8 asserts the VMEbus BERR signal until both data strobes are deasserted.
Theory of Operation The EPC-8 contains programmable byte-swapping hardware to allow programs to read or write VMEbus memory in either byte order. When using the E-page to access the VMEbus, the order is selected by bit 5 (BORD) in the VME modifier register (8151). When using direct memory mapping, the order is address-range dependent (e.g., E0000000-E0FFFFFF accesses the A24 space with big endian byte ordering, and 20000000-20FFFFFF accesses the A24 space with little endian byte ordering).
EPC-8 Hardware Reference When using big-endian byte ordering, care must be taken to assure that the VME address is aligned on a boundary; for D16 accesses the VME address must be on a word boundary (address evenly divisible by 2) and for D32 accesses the VME address must be on a double-word boundary (evenly divisible by 4). If this is not done, the results will be "scrambled" data.
Theory of Operation Refer to Appendix F, VMEbus Mapped Registers for additional information. Passing VME Interrupts and Events to the CPU The diagram below shows how VME interrupts and VME events are generated and passed to the CPU: RRDY WRDY IRQ1 IRQ2 IRQ3 IRQ4 VME interrupt state register VME interrupt enable register 4 IRQ5 IRQ6 PC architecture IRQ10 IRQ7 SYSFAIL BERR (sticky) ACFAIL WDT VME event state register VME event enable register SIGNAL FIFO RESET (sticky) Figure 4-3.
EPC-8 Hardware Reference Interrupt-causing signals are visible in two state registers. Most of these are unlatched, meaning that a read of the state register shows the actual state of the signals at the instant of the read. The exceptions are (1) BERR, which is a "sticky" bit, meaning that the bit signifies whether BERR had ever been asserted (the SBER register bit), and (2) RESET, another sticky bit. The convention used is that a 0 bit signifies an asserted (interrupting) state.
Chapter 5 - Programming the VMEbus Interface This chapter describes the EPC-8 VMEbus interface as seen by a program. Users should avoid direct use of most of these facilities. Whenever possible, the VMEbus interface should be accessed through the EPConnect software or other higher level programming facilities. The EPC-8 VMEbus interface registers are defined in Appendix F. For specific bit definitions, refer to that Appendix.
EPC-8 Hardware Reference Read-Modify-Write Operations VMEbus RMW (read-modify-write) cycles can be performed through use of the LOCK instruction prefix with certain instructions. All of these instructions perform a read followed by a write. When such a read occurs that is mapped to the VMEbus, the EPC-8 treats it as the start of a VME RMW cycle. The next VME access from the CPU is treated as the write that terminates the RMW cycle.
Programming the VMEbus Interface Real-Mode “E-page” VMEbus Accesses The following summarizes the source of the VMEbus address lines for accesses through the “E” page. A32 31 24 23 From port 8150 22 21 From port 8151 16 15 From port 8130 0 From 486 address bits 15-0 A24 23 22 21 From port 8151 16 15 From port 8130 0 From 486 address bits 15-0 A16 15 0 From 486 address bits 15-0 5 It should be noted that the EPC-8 drives all 32 address lines even when performing an A24 or A16 access.
EPC-8 Hardware Reference Supported Address Modifiers The table below lists supported address modifiers: 5 5 29h A16 non-privileged 2Dh A16 supervisor 39h 3Ah 3Dh 3Eh A24 non-privileged data A24 non-privileged program A24 supervisor data A24 supervisor program 09h 0Ah 0Dh 0Eh A32 non-privileged data A32 non-privileged program A32 supervisor data A32 supervisor program Table 5-1. Supported Address Modifiers.
Programming the VMEbus Interface 4. Set the access mode in the VME Modifier Register (8151) as follows: VME WA23-22 BORD IACK AM5 AM4 AM2 AM1 (Note that register bits are not defined for the VMEbus address modifier lines AM3 and AM0 since, for all defined address modifier values in the VMEbus specification, AM3 is 1 and AM0 is the inverse of AM1. Therefore these two bit values are generated by hardware.
EPC-8 Hardware Reference Microsoft C code for Example 1 #define WORD unsigned short #define LWORD unsigned long WORD addr; /* 16-bit A16 address */ WORD data; WORD far * wptr; outp(0x8102,(inp(0x8102)|2)); /* set VME E-page enable access bit */ outp(0x8151,0xCA); /* Set address modifier to A16 supervisory access */ wptr = (WORD far *) (0xE0000000L + addr); data = *wptr; /* Read through window */ Example #2 Example #2 performs a byte (8-bit) write into the VMEbus A32 space.
Programming the VMEbus Interface VMEbus Address bits 21-16 6. Map the address. 7.
EPC-8 Hardware Reference 1) The 8259 interrupt controller is enabled to capture interrupts before a VMEbus interrupt occurs (otherwise VMEbus interrupts will be totally missed) and 2) You must handle all pending VMEbus interrupts before returning from the interrupt handler. 5 • When an interrupt occurs, first acknowledge the interrupt to the PC/AT 8259 interrupt controllers by sending both interrupt controllers an End-of-Interrupt (EOI).
Programming the VMEbus Interface 3- The address modifiers and transfer length are dependent on the hardware generating the interrupt. 4- Perform a read of the VMEbus where the address being read reflects the interrupt level being responded to. Address lines A3-A1 must reflect the interrupt level in binary form. Multiply the interrupt level by 2 and use that as the address of the read operation. 5- After the read operation, clear the IACK bit in the VME Modifier register.
EPC-8 Hardware Reference Protected-Mode Direct VMEbus Accesses Addresses above 256 MB map directly onto the VMEbus. When direct "protectedmode" addressing of A24 or A16 space, the high-order nibble is used to define the access mode and byte ordering. For A32 space, the high-order 2 bits define the access mode leaving 30 bits available for addressing. Thus, only the first 1 Gigabyte of VMEbus A32 space is directly addressable. All A24 and A16 space is directly addressable.
Programming the VMEbus Interface When using the EPC-8 this way to perform VMEbus accesses, you would typically set up the E-page window for interrupt acknowledge accesses. Also note that the direct access mappings do not cover the entire VMEbus A32 address range and do not provide all VMEbus-defined address modifier encodings, but you can use the E-page mechanism if needed to provide these.
EPC-8 Hardware Reference Bits 1 and 2 of the Module Status/Control register (0x815D) are cleared by a ‘‘warm reset’’. This keeps the watchdog timer from expiring on a ‘‘warm reset’’ that is not initiated from a source other than a watchdog timeout. ENSYSO (bit 6 of 0x815D) also has to be cleared by the BIOS in response to warm resets to keep from losing the watchdog timeout bit while setting the BTOE bit (the VME Bus Timeout Enable bit).
A Appendix A Chip Set & I/O Map The following defines the I/O addresses decoded by the EPC-8. It does not define addresses that might be decoded by EXMs and the EXP-MX.
EPC-8 Hardware Reference A A I/O Addr 040 041 042 043 Counter-Timer functions: VLSI 82C113A/114 emulating 8254 of PC/AT Functional group Usage Timer Counter 0 Counter 1 Counter 2 Control (W) I/O Addr 060 Keyboard Port: Intel 8242 emulating 8742 of PC/AT Functional group Usage Keyboard controller Data I/O register 061 NMI status NMI status 064 Keyboard controller Command/status register I/O Addr 070 071 I/O Addr 081 082 083 087 089 08A 08B 08F Time-of-Day Clock: VLSI 82C486 emulating MC6818 of
Appendix A: Chip Set & I/O Map A Port A Usage Fast A20 and reset control I/O Addr 092 Functional group Port A I/O Addr 096 EXM Configuration Functional group Usage EXM Config EXM slot register (part of the subplane) I/O Addr 0A0 0A1 I/O Addr 0C0 0C2 0C4 0C6 0C8 0CA 0CC 0CE 0D0 0D2 0D4 0D6 0D8 0DA 0DC 0DE 0EC 0ED Second Interrupt Controller: VLSI 82C486 emulating 8259 of PC/AT Functional group Usage Interrupt controller 2 Port 0 Port 1 Second (16-bit) DMA Controller: VLSI 82C486 emulating 8237 of PC/
EPC-8 Hardware Reference A A I/O Addr 0EE 0EF 0F4 0F5 0F9 0FB I/O Addr 100 102 103 I/O Addr 240-25F I/O Addr 2F8 2F9 2FA 2FB 2FC 2FD 2FE I/O Addr 378 379 37A Miscellaneous Functional group Usage Fast A20 Dummy read enables Fast A20, dummy write disables Fash A20 Fast CPU reset Dummy read resets the CPU Slow CPU reset Dummy write enables slow clock and non-turbo mode Fast CPU register Dummy write enables Fast clock and turbo mode Configuration disable Dummy write disables access to configuration regi
Appendix A: Chip Set & I/O Map A VGA I/O Addr 3B4 3B5 3BA Functional group VGA 3C0 3C1 3C2 3C3 3C4 3C5 3C6 3C7 3C8 3C9 3CA 3CC 3CE 3CF 3D4 3D5 3DA 3F0 3F1 46E8 I/O Addr 3F8 3F9 3FA 3FB 3FC 3FD 3FE I/O Addr 8102 VGA Usage CRT Controller index CRT Controller data Feature control output, Input status Attribute controller Index/Data Attribute controller Index/Data Miscellaneous output, Input status Sleep Sequencer Index Sequencer Data Video DAC pixel mask, Hidden DAC register Pixel address read mode, DAC
EPC-8 Hardware Reference A A I/O Addr 8130 VME Registers Functional group Usage VME and Misc VME map WA21-16 I/O Addr 8140 8141 8142 8143 8144 8145 8148 8149 814A 814B 814C 814D 814E 814F VXI Registers Functional group Usage VXI Registers ID low ID high Device type low Device type high Status/Control low Status/Control high Protocol low Protocol high Response low Response high Message low low Message low high Message high low Message high high I/O Addr 8150 8151 8152 8153 8154 8155 8158 815C 815D 815E
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Appendix B Interrupts and DMA Channels B Interrupts The assignment of interrupts for the EPC-8 is shown in the following table: NMI IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8 IRQ9 IRQ10 IRQ11 IRQ12 IRQ13 IRQ14 IRQ15 DRAM parity error, EXM expansion interface I/O channel check timer keyboard IRQ8 - IRQ15 cascade through IRQ2 COM2 serial port COM1 serial port unassigned usually needed for floppy disk controller LPT1 parallel port clock unassigned VME interrupt/event unassigned unassigned coprocessor used
EPC-8 Hardware Reference DMA Channels The assignment of DMA channels for the EPC-8 is shown in the following table. B B 0 1 2 3 4 5 6 7 unassigned (8-bit) unassigned (8-bit) usually needed for floppy disk (8-bit) usually needed for SCSI disk (8-bit) (Channel 0 - Channel 3 cascade through Channel 4) unassigned (16-bit) unassigned (16-bit) unassigned - not connected to EXM expansion interface (16-bit) Table B-2. DMA Channels. B-2 Artisan Technology Group - Quality Instrumentation ...
Appendix C - Connectors This Appendix specifies the details of the connectors on the EPC-8. Please note, however, that all the connectors adhere to existing standards. The EXM expansion interface connectors are not defined here; their definition is available upon request. Connectors on EXMs and the EXP-MX are described in the separate manuals for those products. C Pins are labeled from the point of view of looking into the front of the connector on the EPC-8.
EPC-8 Hardware Reference RS-422/485 Port (COM2) The modified RS-422/485 serial port is a female DB-9 connector. C Pin 1 2 3 4 5 6 7 8 9 C Function RTS DTR RXDTXDGND CTS DSR RXD+ TXD+ Table C-2. COM2 RS-422/RS485 Port Pin-out.
Connectors Keyboard The keyboard connector is a 6-pin DIN defined as: Pin 1 2 3 1 Signal Data not used Ground Reference voltage Pin 4 5 6 2 Signal +5V Clock not used Speaker tone Table C-4. Keyboard Pin-Out.
EPC-8 Hardware Reference RJ45 Connector The DTE RJ45 phone jack that supplies the 10-Base-T interface to the ethernet controller is defined in the following table: C Pin 1 2 3 4 5 6 7 8 C Signal Tx+ TxRxNo connect No connect Rx+ No connect No connect Table C-6. RJ45 Phone Jack Pin-out. C-4 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
Appendix D Memory ☛ DO NOT HANDLE THE EPC-8 OR MEMORY MODULES UNLESS YOU ARE IN A STATIC-FREE ENVIRONMENT. D Memory The EPC-8 has a single SIMM socket that can handle a SIMM as large as 16 MB. The memory configurations use a SIMM with the following specifications: • • • • 72 pin fast page mode 80 nanosec. (or better) single-sided or double-sided For 4 MB, Use a 1 MB x 36 SIMM. RadiSys P/N 70-0042 We recommend Toshiba THM361000ASG-80 For 8 MB, Use a 2M x 36 SIMM.
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Appendix E Subplanes Subplane Installation A subplane is a printed-circuit board with connectors on both sides. A subplane provides several functions. Primarily it acts as the PC/AT bus. Additionally, it provides power from the VMEbus backplane to the EPC-8 and expansion modules. Depending on the particular EPC-8 subsystem configuration, a specific subplane will need to be installed. Locate the appropriate subsection for the subplane you are using either by name or by picture.
EPC-8 Hardware Reference EXP-BP1 Subplane This subplane is used in the smallest configuration, where a single-slot EPC-8 processor is used by itself. The EXP-BP1 is a rectangular-shaped board with two connectors, on on each side. No backplane jumpers are required. E E Figure E-1. EXP-BP1 Subplane. E-2 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
Subplanes EXP-BP2 Subplane This subplane is to provide connectivity for the processor and two EXM modules. The EXP-BP2 is an L-shaped board with three connectors on each side. After jumpering the backplane, plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC8 subsystem will occupy. The lower EXM connector is denoted as EXM slot 0 and the upper as slot 1 as shown in the diagram.
EPC-8 Hardware Reference EXP-BP4 Subplane The EXP-BP4 subplane is used to couple an EPC-8 processor module, two TXM modules, and an EXP-MX Mass Storage module. The EXP-BP4 is a T-shaped board with four connectors on the front side and three on the rear. E E After jumpering the backplane, plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-8 subsystem will occupy.
Subplanes EXP-BP3A Subplane The EXP-BP3A subplane allows for a processor and a total of four EXM modules. The EXP-BP3A has five connectors on each side. After jumpering the backplane, plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-8 subsystem will occupy. The EXM slot numbers are shown in the drawing. E Figure E-4. EXP-BP3A Subplane.
EPC-8 Hardware Reference EXP-BP5 Subplane The EXP-BP5 subplane is used to build a system with a processor, four EXM modules, and an EXP-MX Mass Storage module. The EXP-BP5 has six connectors on the front side and five on the rear. E E After jumpering the backplane, plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-8 subsystem will occupy.
Subplanes EXP-BP4A Subplane The EXP-BP4A subplane is used in systems needing a CPU and six EXM modules. The EXP-BP4A has seven connectors on each side. After jumpering the backplane, plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-8 subsystem will occupy. The EXM slot numbers are shown in the drawing. E Figure E-6. EXP-BP4A Subplane.
EPC-8 Hardware Reference EXP-BP6 Subplane The EXP-BP6 subplane is used in a configuration with an EPC-8 processor module, six EXM modules, and an EXP-MX Mass Storage module. The EXP-BP6 has eight connectors on the front side and seven on the rear. Plug the subplane into the VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-8 subsystem will occupy. E E The EXM slot numbers are shown in the drawing.
Appendix F Registers Registers Specific to the EPC-8 Registers in the I/O space that are specific to the EPC-8 are defined below. Only registers 0x8140-0x814F are "dual-ported" to both the PC and VME bus. The addresses shown below are used by the PC port. The VME addresses for the registers 0x8140-0x814F are described later.
EPC-8 Hardware Reference 0 MODID SYSR R RESDET 1 1 1 8145 Status/Control Register, upper 1 1 1 1 1 1 1 1 8146 1 1 1 1 1 1 1 8147 1 1 1 1 1 1 1 8148 1 1 1 8149 Reserved, lower 1 Reserved, upper 1 Protocol Register (read)/Signal FIFO (write), lower 0 0 0 1 1 Protocol Register (read)/Signal FIFO (write), upper R 1 SIG MLCK WRCP FSIG LSIG 814A DOR DIR ERR RRDY WRDY 1 814B RRIEN Response Register, lower 0 1 Response Register, upper F F 1 1 1 1
Registers IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 IRQ2 IRQ1 MSGR 8152 IRQ4 IRQ3 IRQ2 IRQ1 MSGR 8153 SIGR WDT ACFA BERR SYSF 8154 SIGR WDT ACFA BERR SYSF 8155 1 1 VME Interrupt State Register IRQ7 IRQ6 IRQ5 VME Interrupt Enable Register 1 1 VMER VME Event State Register 1 1 VMER VME Event Enable Register SLOT1* 1 1 INTERRUPT-OUT 8158 Interrupt Generator Register 815C ULA Unique Logical Address Register DONE ENSYSO 1 BTOE WDTR FWDT SWDT 1 815D Module Status/Control Regis
EPC-8 Hardware Reference F F VME-32 VME 32-bit enable. If set (1), this bit enables VME accesses through the 32-bit addressing mechanism. When clear (0), this mechanism is disabled. This bit is automatically set by the BusManager software when using EPConnect. Please note the VMER bit (bit 5 of the VME Event State register), if asserted, will also disable this function, but does not clear the VME-32 bit. VME-E VME E-page enable. If set (1), this bit enables VME accesses through the DOS "E page".
Registers VME A21-16 Address Register (8130) VMEbus Address bits 21-16 1 1 When an access is performed by the EPC-8 in its "E page" (address range 0E00000EFFFF), the access is mapped onto the VMEbus. The least-significant sixteen of the VME address bits are provided directly (from the 486), and the remaining 8 (for an A24 access) or 16 (for an A32 access) bits must come from somewhere else. Six of them come from this register.
EPC-8 Hardware Reference This register adheres to the VXIbus specification and also contains EPC-8 specific bits. SRIE SYSRESET input enable. If set, assertion of VME SYSRESET generates a reset of the EPC-8. One use of this bit is having EPC-8 software reset other VME devices (via bit SYSR) without resetting the EPC-8. This bit may be read/written from the PC port, but is read-only from the VME port. SYSCLK SYSCLK status bit. Only PC port writes to this register have the effect of clearing this bit.
Registers SYSR SYSRESET. The EPC-8 asserts the VME SYSRESET line while this bit is 1. When using this bit, it is the software's responsibility to ensure that the VME-specified minimum assertion time of SYSRESET is met. This bit may be read/written from the PC port, but is read-only from the VME port. R A read/write bit that is available for software use (e.g. SURM). RESDET This bit is cleared by a hardware reset.
EPC-8 Hardware Reference A write to the signal register is a happening of some significance for the EPC8, since it potentially asserts an EPC interrupt, shuffles a signal-register FIFO, and may return BERR if the FIFO is already full. For these reasons, the full semantics of writing to the signal register are discussed separately in a later section.
Registers WRCP This EPC-8 specific bit is a read-only copy of the WRDY bit. FSIG Defined only when SIG=1, in which case FSIG is the number (0 or 1) of the register in the FIFO holding the earliest signal. This is a read-only bit. LSIG Defined only when SIG=1, in which case LSIG is the number (0 or 1) of the register in the FIFO holding the most recent signal. This is a read-only bit FSIG and LSIG have no utility to software. They exist as read-only bits for tests of the EPC-8 during manufacture.
EPC-8 Hardware Reference Reserved (814C & 814D) These registers are reserved and return 1s when read. Writes to these registers have no effect. Message Low Register (814E & 814F) RAM Lower RAM Upper There are actually two 16 bit registers at this address , outgoing and incoming 16 bit registers (UART model). A write from the PC side fills the outgoing register. This register can only be read from the VME port and when this occurs the RRDY bit is deasserted in the Response register.
Registers BORD Byte order. This bit controls the ordering of data bytes for D16 and D32 VMEbus accesses. If 0, the bytes are transmitted in little endian (Intel) order; if 1, byte-swapping hardware transmits the bytes in big endian (Motorola) order. Refer to the previous section in this chapter on byte ordering. IACK This bit, when set, is used to define the VMEbus access as an interrupt acknowledge cycle. The interrupt being acknowledged must be encoded by software as a value on VME address lines A1-A3.
EPC-8 Hardware Reference BERR This bit is cleared (asserted low) when an access from the EPC-8 to the VMEbus is terminated with a BERR (bus error). It is also held clear when the SRST bit is set. This bit may be deasserted by writing a "1" (provided SRST is not asserted) into this bit position. SYSF VMEbus SYSFAIL is asserted. WDT Watchdog timer expired VMER A SYSRESET or soft reset has occurred. This bit is held clear while SYSRESET is asserted or the SRST bit is asserted.
Registers Bit 7 of register 8158 is read-only and returns the value of the slot1 jumper setting . If the slot 1 shunt is installed (slot1 operation), then 0 is returned. If the slot1 shunt is not installed, then 1 is returned. Unique Logical Address Register (815C) ULA This register contains the EPC-8's ULA. The ULA contents are used to map the EPC8's register set into VME A16 space as described below in the VMEbus Mapped Registers section.
EPC-8 Hardware Reference SWDT Slow watchdog timer. FWDT and SWDT produce the following timeout values: 00 - disables events from the watchdog timer , 01 - 8.2 s, 10 - 128ms, 11 - 1.02 s. A read of the module status/control register also has a side effect of resetting the watchdog timer. Therefore, if you are using the watchdog timer, the intention is that you are required to read this register within the defined period of the timer to prevent its generating an interrupt.
Registers Offset from ULA Upper byte Lower byte 0 ID (8141) ID (8140) 2 Device type (8143) Device type (8142) 4 Status/control (8145) Status/control (8144) 6 Reserved (8147) Reserved (8146) 8 Protocol/Signal (8149) Protocol/Signal (8148) A Response (814B) Response (814A) C Message high (814D) Message high (814C) E Message low(814F) Message low(814E) 2A Alternate Response Alternate Response The registers occupy the first 16 bytes of the 64-byte space, but DTACK (BERR in the case
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Appendix G - XFORMAT Software for the EPC-8 XFORMAT Software XFORMAT is a utility program used to build DOS file structures on the EPC-8’s optional resident flash memory. XFORMAT is also used to build file system images that can be used in VME RAM disks. For complete information about XFORMAT, refer to the XFORMAT Software User’s Manual. G G-1 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
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Appendix H AUTOSET Software AUTOSET Software The AUTOSET program is used to configure the Ethernet controller. Since this may be set up by your supplier, you may never be required to use this program. The software is contained on the optional Net 1 software diskette that is an optional item for the EPC-8. The AUTOSET program must be run from DOS or a DOS shell and enables the following actions: • Select one adapter to be configured. Up to four adapters may be installed.
EPC-8 Hardware Reference Using the AUTOSET Program Make sure that network software is NOT currently running on the computer system. If network software is running, reboot or unload the network software. To start the program, move to the Ethernet controller subdirectory and type AUTOSET, then press Enter. The menu depicted in the figure below displays. Figure H-1. AUTOSET Program Main Menu. H H H-2 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
AUTOSET Software The following options are in the main menu: Display/Change Adapter Configuration, Diagnostics, and Quit. To initialize an Ethernet controller for the first time, to change the configuration, or to configure multiple Ethernet controllers, select "Display/Change Adapter Configuration" in the main menu. To diagnose problems or verify the configuration, select "Diagnostics.
EPC-8 Hardware Reference 4. Select the Interrupt Assignment. Be sure to avoid any interrupts used by other interfaces in the system. 5. Select the Physical Media cabled up: only 10-Base-T is available for the EPC-8. 6. Select the Adapter architecture. Use "I/O Port" for NE2000 mode, or use "Shared Memory" for Western Digital mode. 7. Skip the Boot PROM prompt. It does not apply to the EPC-8. 8.
AUTOSET Software Novell Configuration There are several pre-set Novell Configuration options programmed into the AUTOSET program that are not applicable to the EPC-8. The Novell Configuration option must be set to None. I/O Base Address The Ethernet controller uses 32 bytes in I/O space. The I/O Base Address must be selected using the AUTOSET program.
EPC-8 Hardware Reference For Microsoft Windows, include the following statement in the [386Enh] section of the SYSTEM.INI file: EMMExclude=dc00-dfff Note that the area excluded may be greater than that required by the Ethernet controller due to other system requirements. For example, VME and VXI EPCs also require excluding the E page (E000 to EFFF). If you are unsure how to make these changes, refer to the Microsoft DOS User's Guide and Reference and Microsoft Windows Operating System manuals.
AUTOSET Software Boot PROM (This option is for systems with an EXM-10A installed. The EPC-8 does not support the boot PROM option of AUTOSET. Refer to the EXM-10A Hardware Reference Manual for more information.) Configuring Additional Ethernet Controllers To configure multiple Ethernet controllers for use in a single EPC, each Ethernet controller must be inserted in the computer and configured, one at a time, before inserting the next Ethernet controller.
EPC-8 Hardware Reference Diagnostics Once the LAN adapter is installed and cabled, use the AUTOSET diagnostic program to check the adapter installation. Note that the AUTOSET diagnostic program test requires that the adapter be attached to a properly-terminated network or to a BNC "T" connector that has two terminators connected (if thin Ethernet is used). Once the cable is installed, use the AUTOSET diagnostic program to check the network interconnection. Select the Diagnostics option in the AUTOSET menu.
AUTOSET Software Error - multiple boot ROM's detected This error has been automatically corrected Please re-power the PC to enable the corrections This message displays when more than one installed Ethernet controller adapter has enabled a boot ROM. Only one network boot ROM should ever be installed in a PC. To correct this, the adapter at the lowest address should remain enabled, and all other adapters should be set for no boot ROM.
EPC-8 Hardware Reference Incorrect PROM ID Byte This message displays when there is a hardware problem in the EEPROM. I/O mode is thus disabled. Contact RadiSys Technical Support. (xfer to memory) (xfer from memory) Failed after X bytes with X These messages display if there is a problem during the Buffer Memory test. The first two messages highlight errors in the transfer of data. The third message identifies where the data transfer error occurred. This is a fatal hardware error.
Appendix I SVGA Video Controller Hardware The EPC-8 contains an SVGA graphics controller using the Cirrus Logic SVGA GD54xx. This is connected to the CPU local bus to give the best possible graphics performance.
EPC-8 Hardware Reference Introduction This section provides operating instructions for user utilities and installation instructions for the display drivers supplied with your Cirrus Logic SVGA for the RadiSys EPC-8. Before you begin The following instructions assume that the user is familiar with DOS and certain DOS commands. Please review the associated DOS commands before performing the installation.
SVGA Easy installation The installation utility is provided to facilitate the smooth installation of the display drivers and utility software. The installation program is menu-driven and allows you to select and install only those display drivers for software and applications currently in use. It is important to note that some display drivers need to have the associated vendor's application program already installed on the system prior to loading the Cirrus Logic SVGA display drivers.
EPC-8 Hardware Reference Utility software Several utility programs are supplied with you Cirrus Logic SVGA software. The following section describes these utilities and how to use them. CLMode is a program used to configure it's various options. SetRES lets the user change the operating resolution and the number of colors from within Windows. The Display Power Manager for Windows 3.1 provides a mechanism to control the amount of power used by a computer's monitor.
SVGA Select the Monitor Type button. The Monitor Type setup window will be displayed. The current monitor type will be highlighted initially. Use the cursor keys or the mouse to choose the type of monitor attached. Selecting the Advanced monitor type will enable you to customize the monitor timings for the monitor you are using. To customize the monitor timings, use the mouse or the tab key to select the gray Set Advanced button. It will only be available if the Advanced monitor type is selected.
EPC-8 Hardware Reference Centering adjust Centering is available while in Video Modes Preview (only for extended Graphics modes 58h and greater). While in Preview, you have the option to use the Right/Left/Up/Down arrow keys to adjust your screen accordingly. The screen adjustments have predefined limits, and in some cases, the limit for the right side adjustment for some modes will have already been reached when entering the Preview mode. In that case, no right side adjustment will be allowed.
SVGA Getting help CLMode provides Help for the following items: Configuration, Monitor Type, Video Modes, Mouse, Keyboard and About CLMode. The Configuration help window explains the flat panel configuration options. The Monitor Type help window explains the different capabilities of each monitor type. The Video Modes help window defines the information given in the Video Mode window. The Keyboard and Mouse help windows explain how to use the keyboard and the mouse to make selections.
EPC-8 Hardware Reference Where: {modenum} mode number {montype} monitor type Valid monitor types: 0 VGA 1 8514 2 Super VGA 3 Extended Super VGA 4 Multifrequency 5 Extended Multifrequency 6 Super Multifrequency 7 Extended Super Multifrequency {montype} t6=x(Hz) t8=x(Hz) t1=x(Hz) t2=x(Hz) s monitor type 640x480 @ (0 = 60, 1 = 72) 800x600 @ (0 = 56, 1 = 60, 2 = 72) 1024x768 @ (0 = 87i, 1 = 60, 2 = 70) 1280x1024 @ (0 = 87i, 1 = Not available) List status information.
SVGA Monitor Type Examples Horizontal Frequency (kHz) Vertical Frequency (Hz) Display Resolutions 0 IBM 8512, 8513, 8503 31.5 60 640x480 1 IBM 8514, 8515 31.535.5 60 43.5 interlaced 640x480 1024x768 2 NEC 2A 31.535.2 60 56 640x480 800x600 3 NEC II 31.535.235.5 60 56 43.5 interlaced 640x480800x 600 1024x768 4 NEC 3D 31.537.837.8 606043.5 interlaced 640x480 800x6001024 x768 5 Sony CPD1304, NEC 3FGx, Nanao 9065S, 9070U 31.5 48.0 48.048.0 60 72 6043.
EPC-8 Hardware Reference SetRES The SetRES utility runs under Windows 3.1 and allows the user to change the screen resolution, number of available colors, and to select either large or normal size fonts and system resources. After new options have been selected, the user can either immediately restart Windows, in which case the new resolution will take effect immediately, or continue working in the current resolution, in which case the new resolution will take effect the next time Windows is started.
SVGA Power management screen saver About the screen saver The Display Power Manager for Windows 3.1 provides a mechanism to control the amount of power used by a computer's monitor. It provides a total of 5 levels of power savings. The first level is a conventional screen saver that turns the screen black and bounces a logo around. The black screen provides substantial power savings and the animation lets you know that the computer is still active. The other four levels of power savings are...
EPC-8 Hardware Reference The screen saver will cycle through all of the selected power saving modes one after another until the maximum selected power saving mode has been reached. The number of minutes that is specified for each level is the number of minutes after the previous mode has been enabled. It is not the total time before entering that mode. Please refer to your Windows User’s Guide for information on how to install screen savers in Windows. PM.EXE VGA BIOS versions prior to v1.
SVGA Using the screen saver When the screen saver is started, it will initially display a bouncing logo on a black background. To enable additional levels of power savings, select them from the Screen Saver Mode section of the Setup dialog box. Screen saver mode The Screen Saver Mode section has four check boxes in it. They are ReducedOn, StandBy, Suspend and Off. The screen saver detects the type of graphics controller that is being used and the types of power savings that it is capable of.
EPC-8 Hardware Reference Display drivers The Cirrus Logic video controller is 100% VGA compatible. The display drivers described in this manual are supplied to improve the resolution for each supported software application package. The installation instructions for each display driver will follow the introduction section. Follow the instructions carefully to be sure that each display driver is correctly installed. All of the installation instructions assume that VGA Disk 1 of 2 is located in drive A:.
SVGA Installing Windows 3.1 display drivers If you haven't already installed the SetRES utility program, these instructions will install a single driver for a single resolution. If you want to be able to easily switch between different resolutions, you should install SetRES before this procedure. To install the Windows 3.1 drivers from the DOS prompt, proceed as follows: 1. Insure that Windows 3.1 is already installed on your computer. 2.
EPC-8 Hardware Reference To install the Windows 3.1 drivers from within Windows, proceed as follows: 1. 2. 3. 4. 5. 6. 7. 8. I Ensure that Windows 3.1 is already installed on your computer and start Windows. From the Main window of the Program Manager run the Windows 3.1 Setup program. Select Change Systems Settings... from the Options menu of Setup. Click on the down arrow at the right side of the Display: line.
Appendix J - Error Messages & Diagnosis Troubleshooting This section deals with problems that you may encounter that do not provide an error message. If an error message is displayed, see the next section of this Appendix, Common Error Messages. J J-1 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
EPC-8 Hardware Reference J Symptoms Possible cause(s) Solution System appears to boot (evidenced by RUN LED being on, floppy and hard disk being accessed) but provides no video. If not using the built-in VGA, then the EXMbased video adapter may not be fully seated in subplane. Remove the video adapter. If the subplane is secured to the VMEbus backplane by retaining screws, verify that the subplane is not warped from over tightening the screws.
Error Messages and Diagnosis Symptoms Possible cause(s) Solution System fails at power-up -will not run power-on self-test. May be accompanied by combinations of beep tones from the speaker. The system is not getting power. Check the backplane and verify that +5V power is good. Verify that the subplane is fully seated in the VME backplane and the EPC-8 is fully seated in the subplane. BIOS detected a failure See BIOS Beep Codes table below. SIMM missing or loose.
EPC-8 Hardware Reference Symptoms Possible cause(s) Solution System will not talk across VMEbus. The VMEbus backplane may not be jumpered correctly. See the section Installing the VMEbus Backplane Jumpers in Chapter 2. More than 1 master may be set to provide Slot-1 functions. Make sure that only 1 system is configured as the Slot-1 controller and that it is the left-most system in the chassis. There may be no Slot-1 controller providing bus arbitration.
Error Messages and Diagnosis BIOS Beep Codes If the BIOS detects a critical error condition while running the Power On Self Test (POST) code, it may halt after issuing a beep code and attempting to display the error code in the upper left corner of the screen. The audible codes consist of patterns of beeps and pauses. If this occurs, you should contact your supplier for technical support.
EPC-8 Hardware Reference Common Error Messages This section contains a summary of error and warning messages alphabetized by message text. These are messages generated by the BIOS and MS-DOS that may be related to your hardware configuration. Bad or missing command interpreter Problem: The DOS operating system cannot find the Command line interpreter. Solution(s): Either COMMAND.COM is not present at the specified (or default) directory level of the boot disk or the "SHELL=" statement in your CONFIG.
Error Messages and Diagnosis Diskette drive A error or Diskette drive B error Problem: The floppy diskette(s) installed in the system do not match the configuration information listed in the BIOS setup screen. This may be due to incorrect entries in the BIOS setup screen or one or both drives may not be responding at power-up. Solution(s): Run the BIOS setup program. Make sure the BIOS setup entries relating to floppy drives correctly reflect the attached floppy drives.
EPC-8 Hardware Reference EXM configuration error (with two short beeps) Problem: The EXMs installed (or not installed) do not match the configuration information in the CMOS Setup. Solution(s): Run the BIOS setup program. Enter the EXM menu. Verify the information listed on the screen, save any changes and reboot. If necessary, refer to the Chapter 3, BIOS Configuration of this manual and/or your EXM manual(s) for more details. General failure reading drive ...
Error Messages and Diagnosis Keyboard error (with two short beeps) Problem: This message indicates that the system did not recognize a keyboard at power-up or you pressed a key during the power-on self test. Solution(s): Check the integrity of the keyboard connector. If you think you pressed a key during power-up, reboot the system using the front panel reset button.
EPC-8 Hardware Reference Missing operating system Problem: Although the system could read the hard disk and find the active partition, the operating system files could not be found. Solution(s): This is can be caused by using a drive type number or head/cylinder combination in the EPC-8’s IDE Adapter 0 Master Menu that does not match the type number used to format the hard disk. Run the BIOS setup program.
Error Messages and Diagnosis Not ready reading drive ... Problem: This is usually caused by not fully inserting a diskette into the floppy drive. Solution(s): Eject the floppy diskette and reinsert making sure that the diskette seats completely into the floppy drive. Parity error in segment ... Problem: This could be a software error (reading a nonexistent memory area) or a true hardware failure. Solution(s): Attempt to repeat the error.
EPC-8 Hardware Reference System battery is dead - Replace and run SETUP Problem: The CMOS clock battery indicator shows the battery is dead. Solution(s): Run the BIOS setup program to determine what is wrong, and correct it. If the error occurs repeatedly, the EPC-8's battery has failed and needs to be replaced. J J J-12 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
K Appendix K - Configuring the Ethernet Drivers After the EPC-8 is installed, cabled and configured, follow the instructions in this chapter to configure the network interface drivers. The distribution diskettes supplied with the EPC-8 contain drivers for IPX, ODI, NDIS and a packet driver under DOS/Windows and OS/2. The majority of users running DOS/Windows select the ODI driver in 16-bit mode, if supported by their network software. Most OS/2 users select the ODI driver.
EPC-8 Hardware Reference K K NetWare IPX Driver for DOS Installation The Internet Packet Exchange (IPX) drivers provided with the EPC-8 distribution diskettes are NE2000.COM and ATLANTIC.COM. The NE2000.COM driver is used in 8-bit, NE2000 mode with the IPX interface. Once the EPC-8 is configured using AUTOSET, and the distribution diskettes are loaded onto the system, use a text editor to modify the AUTOEXEC.BAT file, entering these commands at the end of the file: ne2000 /o0 netx.
Configuring the Ethernet Drivers K Then add the following programs into the AUTOEXEC.BAT file: LSL.COM ATLANTIC.COM IPXODI.COM NETX.COM Link support layer Multiple Link Interface Driver IPX/SPX Protocol (provided by operating system or workstation distribution diskettes) While editing the AUTOEXEC.BAT file, make sure that the path= statement includes the directory containing the NET.CFG file. The ATLANTIC.COM driver is used for the ODI interface in 16-bit Western Digital mode and 16-bit NE2000 mode.
EPC-8 Hardware Reference K K 6. Modify/create NET.CFG according to the environment. For example: Link Driver NE2000 Frame Ethernet_802.3 Protocol IPX Port 300 f 7. Reboot the system. NDIS Driver for DOS Installation The NDIS ethat2 driver is used for 16-bit Western Digital mode and 16-bit NE2000 mode for the NDIS interface. It is used by various protocol stacks and applications, such as Windows for Workgroups (WFW). NDIS 3.0 protected mode support is already included in WFW.
Configuring the Ethernet Drivers K Packet Driver Installation The diskettes distributed with the EPC-8 contain two packet drivers named ATDRIVE.COM (for 16-bit NE2000 mode) and WD8003E.COM (for 16-bit Western Digital mode). RadiSys also supplies files named TELBIN (a Telnet terminal emulation) and FTPBin (an FTP or File Transfer Program) that work with TCP/IP. In order to install the packet drivers, first run AUTOSET to initialize the adapter (IRQ, I/O port, shared memory base, etc.
EPC-8 Hardware Reference K K 5. Select the File Manager icon. Select "Network Connection" under the Disk Menu. Additional drives that are now available display in the list, verifying the installation. SCO UNIX Installation This section describes instructions for properly installing the TCP/IP drivers of SCO Open Desktop version 1.1 and 2.0 and the equivalent SCO UNIX/386 version. First, configure the EPC-8 using the methods described in the previous sections. Do this under DOS.
Configuring the Ethernet Drivers K Disabling the COM2 Serial Port Driver. The SCO UNIX COM2 serial port driver can be disabled in version 2.0 by running makdev serial and uninstalling the IBM-COM2 "board." COM2 can also be disabled manually by editing two kernel configuration files and rebuilding the kernel: 1. Edit the file /etc/conf/sdevice.d/sio.
EPC-8 Hardware Reference K K VenturCom VENIX Installation Configuring an EPC-8 Ethernet controller to work with VenturCom VENIX requires that the EPC-8 be configured to execute effectively with the other devices in the system. VenturCom VENIX may also require re-configuration, depending on the EPC-8's configuration parameters. Configuring an EPC-8 To configure an EPC-8, execute the AUTOSET program. This program configures the EPC-8's interrupt vector, I/O base address, and RAM buffer addresses.
Configuring the Ethernet Drivers K LynxOS Installation The EPC-8 must be configured by the AUTOSET program in Shared Memory (WD8013-compatible) mode. For more information on driver data structure editing and building the kernel to operate correctly, reference the LynxOS TCP/IP Installation and Configuration Manual. There are three basic steps to the installation of LynxOS TCP/IP: 1. 2. 3. Retrieve TCP/IP from the floppies or tape. Configure the EPC-8 in Western Digital mode.
EPC-8 Hardware Reference K K Install TCP/IP into the Kernel Before starting the install script, decide on a host name and check with the Network Administrator to guarantee that the selected host name is unique. The script INSTALL.TCPIP adds TCP/IP to the driver library and device library and then rebuilds the kernel. It will also prompt for the system's host name. To install TCP/IP into the kernel, type the following: /usr/bin/Install.
Index A A16, 4-18, 5-3, 5-4, 5-10, F-14 A24, 5-3, 5-4, 5-10, F-5 A32, 5-3, 5-4, 5-6, 5-10, F-5 ACFAIL, 5-7, F-11 address lines, 5-3 address modifier, 5-5, 5-11, F-10 address modifiers, 5-4 Altitude, 1-4 Arbitration mode, F-4 Arbitration priority, F-4 ATLANTIC.
EPC-8 Hardware Reference D D08, 4-17, 4-18 D16, 4-17, 4-18 D32, 4-17, 4-18 daisy chain, 2-2, 4-16 daisy-chain lines, 2-4 DB-25, C-2 DB-9, C-1 Display Drivers and Utilities, I-1 DMA channels, 3-16, B-2 E E page, 4-16, 4-17, 5-10, F-5 electrostatic discharge, 2-1 EMM driver, 4-4 EPC-1 compatibility, F-5 EPConnect, 4-18, 5-1, 5-7 error messages, J-6 ESD, 2-1 EXM, 2-4, 4-15, Error! Not a valid bookmark in entry on page E-3, E-6 EXM Configuration Error, J-8 EXM expansion interface, 4-15, C-1 EXM menu, 4-15 EXM
Index interrupt generator register, 4-18 interrupt mapping, B-1 interrupts, 5-7 IPX, K-1, K-2, K-3, K-4 IRQ10 interrupt, F-11, F-12 model code, F-5 MODID, F-6 module identification, F-6 Module status/control register, F-13 mouse, 2-10 MSGR interrupt, F-8 Multiple EXM-10s, H-7 J J1 connector, 2-7, 4-15 J2 connector, 4-15 jumper, 2-2, 2-4, 2-5 jumpers, 2-6, 2-7, J-3 N NDIS, K-1, K-4 NET.
EPC-8 Hardware Reference R Read ready, F-8 REAL TIME CLOCK ERROR, J-11 reboot, 4-11 Release on request, F-4 Request on no request, F-4 reset, 4-8, 4-11, 4-13, 5-12, F-3 interrupt, F-12 watchdog timer, F-13 Response register, F-8 RMW cycle, 5-2 ROM, 4-5 ROM shadowing, 4-5 RONR, F-4 ROR, F-4 round-robin, 2-2, 4-16 Round-robin arbitration, F-4 Run, 4-10 S SBER bit, 4-20 selftest, F-6 serial port, C-1 Servant, F-7 setup parameters, 4-9 Setup screen, 3-1–3-20 shadowing, 4-5 Shock, 1-4 Signal register, F-7 Signa
Index video BIOS, 4-4 Video controller CLMode, I-7 monitor type examples, I-9 Power Manager screen saver, I-11 SetRES utility, I-10 Video Modes preview window, I5 Windows drivers, I-15 VME access bit, F-4 VME address bits, F-5 VME chassis, 2-8 VME event enable register, F-12 VME mapped registers, F-14 VME modifier register, 4-17 VMEbus, 5-10 addressing, 1-5 arbiter, 1-5 interrupt handler, 1-5 interrupter, 1-5 master data transfer, 1-5 requester, 1-5 slave data transfer, 1-5 specifications, 1-5 system contro
EPC-8 Hardware Reference NOTES Index-6 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
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