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TL/H/5583

ADC0831/ADC0832/ADC0834 and ADC0838

8-Bit Serial I/O A/D Converters with Multiplexer Options

January 1995

ADC0831/ADC0832/ADC0834 and ADC0838

8-Bit Serial I/O A/D Converters with Multiplexer Options

General Description

The ADC0831 series are 8-bit successive approximation

A/D converters with a serial I/O and configurable input mul-

tiplexers with up to 8 channels. The serial I/O is configured

to comply with the NSC MICROWIRE

serial data ex-

change standard for easy interface to the COPS

family of

processors, and can interface with standard shift registers

or mPs.

The 2-, 4- or 8-channel multiplexers are software configured

for single-ended or differential inputs as well as channel as-

signment.

The differential analog voltage input allows increasing the

common-mode rejection and offsetting the analog zero in-

put voltage value. In addition, the voltage reference input

can be adjusted to allow encoding any smaller analog volt-

age span to the full 8 bits of resolution.

Features

NSC MICROWIRE compatibleÐdirect interface to

COPS family processors

Easy interface to all microprocessors, or operates

‘‘stand-alone’’

Operates ratiometrically or with 5 V

voltage

reference

No zero or full-scale adjust required

2-, 4- or 8-channel multiplexer options with address

logic

Shunt regulator allows operation with high voltage

supplies

0V to 5V input range with single 5V power supply

Remote operation with serial digital data link

TTL/MOS input/output compatible

0.3

standard width, 8-, 14- or 20-pin DIP package

20 Pin Molded Chip Carrier Package (ADC0838 only)

Surface-Mount Package

Key Specifications

Resolution 8 Bits

Total Unadjusted Error

(/2 LSB and

1 LSB

Single Supply 5 V

Low Power 15 mW

Conversion Time 32 ms

Typical Application

TL/H/5583–1

TRI-STATE

is a registered trademark of National Semiconductor Corporation.

COPS

and MICROWIRE

are trademarks of National Semiconductor Corporation.

1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.

Summary of content (32 pages)

PAGE 1
ADC0831/ADC0832/ADC0834 and ADC0838 8-Bit Serial I/O A/D Converters with Multiplexer Options General Description The ADC0831 series are 8-bit successive approximation A/D converters with a serial I/O and configurable input multiplexers with up to 8 channels. The serial I/O is configured to comply with the NSC MICROWIRETM serial data exchange standard for easy interface to the COPSTM family of processors, and can interface with standard shift registers or mPs.
PAGE 2
Absolute Maximum Ratings (Notes 1 & 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Current into V a (Note 3) Supply Voltage, VCC (Note 3) Voltage Logic Inputs Analog Inputs b 0.3V to VCC a 0.3V b 0.3V to VCC a 0.3V Input Current per Pin (Note 4) Package g 5 mA g 20 mA Storage Temperature Package Dissipation at TA e 25§ C (Board Mount) b 65§ C to a 150§ C 15 mA 6.
PAGE 3
Converter and Multiplexer Electrical Characteristics (Continued) The following specifications apply for VCC e V a e 5V, TA e Tj e 25§ C, and fCLK e 250 kHz unless otherwise specified. Boldface limits apply from TMIN to TMAX.
PAGE 4
AC Characteristics The following specifications apply for VCC e 5V, tr e tf e 20 ns and 25§ C unless otherwise specified.
PAGE 5
Typical Performance Characteristics Unadjusted Offset Error vs VREF Voltage Linearity Error vs VREF Voltage Linearity Error vs fCLK Power Supply Current vs Temperature (ADC0838, ADC0831, ADC0834) Linearity Error vs Temperature TL/H/5583 – 2 Output Current vs Temperature Note: For ADC0832 add IREF.
PAGE 6
TRI-STATE Test Circuits and Waveforms t1H t1H t0H t0H TL/H/5583–4 TL/H/5583 – 23 Timing Diagrams Data Input Timing Data Output Timing TL/H/5583–24 TL/H/5583 – 25 ADC0831 Start Conversion Timing TL/H/5583 – 26 6
PAGE 7
Timing Diagrams (Continued) ADC0831 Timing TL/H/5583 – 27 *LSB first output not available on ADC0831.
PAGE 8
* Make sure clock edge Ý18 clocks in the LSB before SE is taken low ADC0838 Timing TL/H/5583 – 6 Timing Diagrams (Continued) 8
PAGE 9
TL/H/5583 – 7 ADC0838 Functional Block Diagram *Some of these functions/pins are not available with other options. Note 1: For the ADC0834, D1 is input directly to the D input of SELECT 1. SELECT 0 is forced to a ‘‘1’’. For the ADC0832, DI is input directly to the DI input of ODD/SIGN. SELECT 0 is forced to a ‘‘0’’ and SELECT 1 is forced to a ‘‘1’’.
PAGE 10
Connection Diagrams ADC0838 8-Channel MUX ADC0834 4-Channel MUX Small Outline/Dual-In-Line Package (J, M and N) Small Outline/Dual-In-Line Package (J, M, and N) TL/H/5583 – 30 Top View COM internally connected to A GND TL/H/5583–8 Top View ADC0832 2-Channel MUX ADC0832 2-Channel MUX Dual-In-Line Package (J and N) Small Outline Package (M) ADC0831 Single Differential Input Dual-In-Line Package (J and N) TL/H/5583–31 Top View TL/H/5583 – 32 Top View COM internally connected to GND.
PAGE 11
Functional Description 1.0 MULTIPLEXER ADDRESSING The design of these converters utilizes a sample-data comparator structure which provides for a differential analog input to be converted by a successive approximation routine. The actual voltage converted is always the difference between an assigned ‘‘ a ’’ input terminal and a ‘‘b’’ input terminal. The polarity of each input terminal of the pair being converted indicates which line the converter expects to be the most positive.
PAGE 12
Functional Description (Continued) TABLE II.
PAGE 13
Functional Description (Continued) To understand the operation of these converters it is best to refer to the Timing Diagrams and Functional Block Diagram and to follow a complete conversion sequence. For clarity a separate diagram is shown of each device. 1. A conversion is initiated by first pulling the CS (chip select) line low. This line must be held low for the entire conversion. The converter is now waiting for a start bit and its MUX assignment word. 2.
PAGE 14
Functional Description (Continued) The DI and DO lines can be tied together and controlled through a bidirectional processor I/O bit with one wire. This is possible because the DI input is only ‘‘looked-at’’ during the MUX addressing interval while the DO line is still in a high impedance state. 4. When the start bit has been shifted into the start location of the MUX register, the input channel has been assigned and a conversion is about to begin.
PAGE 15
Functional Description (Continued) 5.2 Full-Scale 4.0 THE ANALOG INPUTS The most important feature of these converters is that they can be located right at the analog signal source and through just a few wires can communicate with a controlling processor with a highly noise immune serial bit stream. This in itself greatly minimizes circuitry to maintain analog signal accuracy which otherwise is most susceptible to noise pickup.
PAGE 16
Functional Description (Continued) to be derived from the clock. The low current requirements of the A/D and the relatively high clock frequencies used (typically in the range of 10k – 400 kHz) allows using the small value filter capacitor shown to keep the ripple on the VCC line to well under (/4 of an LSB. The shunt zener regulator can also be used in this mode. This requires a clock voltage swing which is in excess of VZ.
PAGE 17
Applications (Continued) Digital Link and Sample Controlling Software for the Serially Oriented COP420 and the Bit Programmable I/O INS8048 TL/H/5583 – 13 8048 CODING EXAMPLE COP CODING EXAMPLE Mnemonic LEI SC OGI CLR A AISC 1 XAS LDD NOP XAS Mnemonic ANL P1, Ý0F7H MOV B, Ý5 MOV A, ÝADDR LOOP 1: RRC A JC ONE Instruction ;SELECT A/D (CS e 0) ;BIT COUNTER w 5 ;A w MUX ADDRESS ;CY w ADDRESS BIT ;TEST BIT ;BIT e 0 ZERO: ANL P1, Ý0FEH ;DI w 0 JMP CONT ;CONTINUE ;BIT e 1 ONE: ORL P1, Ý1 ;DI w 1 CONT: CALL PU
PAGE 18
Applications (Continued) A ‘‘Stand-Alone’’ Hook-Up for ADC0838 Evaluation *Pinouts shown for ADC0838. For all other products tie to pin functions as shown.
PAGE 19
Applications (Continued) Digitizing a Current Flow TL/H/5583 – 15 Operating with Ratiometric Transducers TL/H/5583 – 37 *VIN( b ) e 0.
PAGE 20
Applications (Continued) Span Adjust: OVsVINs3V Zero-Shift and Span Adjust: 2VsVINs5V TL/H/5583 – 16 20
PAGE 21
Applications (Continued) Obtaining Higher Resolution TL/H/5583 – 17 Controller performs a routine to determine which input polarity (9-bit example) or which channel pair (10-bit example) provides a non-zero output code. This information provides the extra bits.
PAGE 22
Applications (Continued) High Accuracy Comparators DO e all 1s if a VIN l b VIN DO e all 0s if a VIN k b VIN TL/H/5583 – 38 Digital Load Cell TL/H/5583 – 19 # # # # Uses one more wire than load cell itself Two mini-DIPs could be mounted inside load cell for digital output transducer Electronic offset and gain trims relax mechanical specs for gauge factor and offset Low level cell output is converted immediately for high noise immunity 22
PAGE 23
Applications (Continued) 4 mA–20 mA Current Loop Converter # All power supplied by loop # 1500V isolation at output TL/H/5583 – 20 Isolated Data Converter # No power required remotely # 1500V isolation TL/H/5583 – 39 23
PAGE 24
Two Wire Interface for 8 Channels Applications (Continued) TL/H/5583 – 21 24
PAGE 25
Applications (Continued) Two Wire 1-Channel Interface TL/H/5583 – 22 Ordering Information Part Number Analog Input Channels ADC0831BCJ ADC0831BCN ADC0831CCJ ADC0831CCN ADC0831CIWM ADC0831CCWM 1 ADC0832BIWM ADC0832BCN ADC0832CIWM ADC0832CCN ADC0832CCWM Total Unadjusted Error Package Temperature Range g (/2 Hermetic (J) Molded (N) b 40§ C to a 85§ C 0§ C to a 70§ C Hermetic (J) Molded (N) SO(M) SO(M) b 40§ C to a 85§ C 0§ C to a 70§ C b 40§ C to a 85§ C 0§ C to a 70§ C g (/2 SO(M) Molded (N)
PAGE 26
Ordering Information (Continued) Analog Input Channels Part Number Total Unadjusted Error g (/2 ADC0834BCN ADC0834CCJ ADC0834CCN ADC0834CCWM ADC0834CIWM 4 ADC0838BCJ ADC0838BCV ADC0838BCN g1 g (/2 ADC0838CCJ ADC0838CCV ADC0838CCN ADC0838CIWM ADC0838CCWM 8 g1 Temperature Range Package Molded (N) 0§ C to a 70§ C Hermetic (J) Molded (N) SO(M) SO(M) b 40§ C to a 85§ C 0§ C to a 70§ C 0§ C to a 70§ C b 40§ C to a 85§ C Hermetic (J) PCC (V) Molded (N) b 40§ C to a 85§ C 0§ C to a 70§ C 0§ C to a 7
PAGE 27
PAGE 28
Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) NS Package Number J08A Ceramic Dual-In-Line Package (J) NS Package Number J14A 28
PAGE 29
Physical Dimensions inches (millimeters) (Continued) Ceramic Dual-In-Line Package (J) NS Package Number J20A Hermetic Dual-In-Line Package (M) NS Package Number M14B 29
PAGE 30
Physical Dimensions inches (millimeters) (Continued) Hermetic Dual-In-Line Package (M) NS Package Number M20B Molded Dual-In-Line Package (N) NS Package Number N08E 30
PAGE 31
Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) NS Package Number N14A Molded-Dual-In-Line Package (N) NS Package Number N20A 31
PAGE 32
ADC0831/ADC0832/ADC0834 and ADC0838 8-Bit Serial I/O A/D Converters with Multiplexer Options Physical Dimensions inches (millimeters) (Continued) Molded Chip Carrier Package (V) Order Number ADC0838BCV or ADC0838CCV NS Package Number V20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1.