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TL/H/11020

ADC10061/ADC10062/ADC10064 10-Bit 600 ns A/D Converter

with Input Multiplexer and Sample/Hold

December 1994

ADC10061/ADC10062/ADC10064 10-Bit 600 ns

A/D Converter with Input Multiplexer and Sample/Hold

General Description

Using an innovative, patented multistep* conversion tech-

nique, the 10-bit ADC10061, ADC10062, and ADC10064

CMOS analog-to-digital converters offer sub-microsecond

conversion times yet dissipate a maximum of only 235 mW.

The ADC10061, ADC10062, and ADC10064 perform a

10-bit conversion in two lower-resolution ‘‘flashes’’, thus

yielding a fast A/D without the cost, power dissipation, and

other problems associated with true flash approaches. The

ADC10061 is pin-compatible with the ADC1061 but much

faster, thus providing a convenient upgrade path for the

ADC1061.

The analog input voltage to the ADC10061, ADC10062, and

ADC10064 is sampled and held by an internal sampling cir-

cuit. Input signals at frequencies from dc to over 200 kHz

can therefore be digitized accurately without the need for an

external sample-and-hold circuit.

The ADC10062 and ADC10064 include a ‘‘speed-up’’ pin.

Connecting an external resistor between this pin and ground

reduces the typical conversion time to as little as 350 ns

with only a small increase in linearity error.

For ease of interface to microprocessors, the ADC10061,

ADC10062, and ADC10064 have been designed to appear

as a memory location or I/O port without the need for exter-

nal interface logic.

Features

Built-in sample-and-hold

Single

5V supply

1, 2, or 4-input multiplexer options

No external clock required

Speed adjust pin for faster conversions (ADC10062 and

ADC10064). See ADC10662/4 for high speed guaran-

teed performance.

Key Specifications

Conversion time to 10 bits 600 ns typical,

900 ns max over temperature

Sampling Rate 800 kHz

Low power dissipation 235 mW (max)

Total unadjusted error

1.0 LSB (max)

No missing codes over temperature

Applications

Digital signal processor front ends

Instrumentation

Disk drives

Mobile telecommunications

Ordering Information

ADC10061

Industrial (

C) Package

ADC10061BIN, ADC10061CIN N20A Molded DIP

ADC10061BIWM, ADC10061CIWM M20B Small Outline

Military (

125

C) Package

ADC10061CMJ/883 J20A Cerdip

ADC10062

Industrial (

C) Package

ADC10062BIN, ADC10062CIN N24A Molded DIP

ADC10062BIWM, ADC10062CIWM M24B Small Outline

Military (

125

C) Package

ADC10062CMJ/883 J24A Cerdip

ADC10064

Industrial (

C) Package

ADC10064BIN, ADC10064CIN N28B Molded DIP

ADC10064BIWM, ADC10064CIWM M28B Small Outline

Military (

125

C) Package

ADC10064CMJ/883 J28A Cerdip

*U.S. Patent Number 4918449

TRI-STATE

is a registered trademark of National Semiconductor Corporation.

1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

Summary of content (18 pages)

PAGE 1
ADC10061/ADC10062/ADC10064 10-Bit 600 ns A/D Converter with Input Multiplexer and Sample/Hold General Description Features Using an innovative, patented multistep* conversion technique, the 10-bit ADC10061, ADC10062, and ADC10064 CMOS analog-to-digital converters offer sub-microsecond conversion times yet dissipate a maximum of only 235 mW.
PAGE 2
Absolute Maximum Ratings (Notes 1, 2) Operating Ratings (Notes 1, 2) Temperature Range TMIN s TA s TMAX ADC10061BIN, ADC10061BIWM, ADC10061CIN, ADC10061CIWM, ADC10062BIN, ADC10062BIWM, ADC10062CIN, ADC10062CIWM, ADC10064BIN, ADC10064BIWM, ADC10064CIN, b 40§ C s TA s a 85§ C ADC10064CIWM ADC10061CMJ/883, ADC10062CMJ/883, b 55§ C s TA s a 125§ C ADC10064CMJ/883 Supply Voltage Range 4.5V to 5.
PAGE 3
DC Electrical Characteristics The following specifications apply for V a e a 5V, VREF( a ) e 5V VREF(b) e GND, and Speed Adjust pin unconnected unless otherwise specified. Boldface limits apply for TA e TJ e TMIN to TMAX; all other limits TA e TJ e a 25§ C. Symbol VIN(1) Parameter Conditions Logical ‘‘1’’ Input Voltage V a e 5.
PAGE 4
AC Electrical Characteristics (Continued) The following specifications apply for V a e a 5V, tr e tf e 20 ns, VREF( a ) e 5V, VREF(b) e GND, and Speed Adjust pin unconnected unless otherwise specified. Boldface limits apply for TA e TJ e TMIN to TMAX; all other limits TA e TJ e a 25§ C.
PAGE 5
Typical Performance Characteristics Zero (Offset) Error vs Reference Voltage Linearity Error vs Reference Voltage Analog Supply Current vs Temperature Digital Supply Current vs Temperature Conversion Time vs Temperature Conversion Time vs Temperature Conversion Time vs Speed-Up Resistor (ADC10062 and ADC10064 Only) Conversion Time vs Speed-Up Resistor (ADC10062 and ADC10064 Only) Spectral Response with 100 kHz Sine Wave Input Spectral Response with 100 kHz Sine Wave Input TL/H/11020 – 2 5
PAGE 6
Typical Performance Characteristics (Continued) Signal-to-Noise a THD Ratio vs Signal Frequency Linearity Change vs Speed-Up Resistor (ADC10062 and ADC10064 Only) Linearity Change vs Speed-Up Resistor (ADC10062 and ADC10064 Only) Linearity Error Change vs Sample Time TL/H/11020 – 4 6
PAGE 7
TRI-STATE Test Circuits and Waveforms TL/H/11020 – 6 TL/H/11020 – 5 TL/H/11020 – 8 TL/H/11020 – 7 Timing Diagrams TL/H/11020 – 9 FIGURE 1. Mode 1. The conversion time (tCONV) is set by the internal timer.
PAGE 8
Timing Diagrams (Continued) TL/H/11020 – 10 FIGURE 2. Mode 2 (RD Mode). The conversion time (tCRD) includes the sampling time and is determined by the internal timer.
PAGE 9
Connection Diagrams Dual-In-Line Package Dual-In-Line Package Dual-In-Line Package TL/H/11020–11 Top View TL/H/11020 – 12 Top View TL/H/11020 – 13 Top View Pin Descriptions VREFb, VREF a DVCC, AVCC These are the digital and analog positive supply voltage inputs. They should always be connected to the same voltage source, but are brought out separately to allow for separate bypass capacitors. Each supply pin should be bypassed with a 0.
PAGE 10
Functional Description To perform a conversion, the estimator compares the input voltage with the tap voltages on the seven resistors on the left. The estimator decoder then determines which MSB Ladder tap points will be connected to the sixteen comparators on the right. For example, assume that the estimator determines that VIN is between 11/16 and 13/16 of VREF.
PAGE 11
Applications Information 1.953 mV). Note, however, that linearity and offset errors become larger when lower reference voltages are used. See the Typical Performance Curves for more information. For this reason, reference voltages less than 2V are not recommended. In most applications, VREFb will simply be connected to ground, but it is often useful to have an input span that is offset from ground.
PAGE 12
Applications Information (Continued) TL/H/11020 – 15 FIGURE 4. Typical Connection. Note the multiple bypass capacitors on the reference and power supply pins. If VREFb is not grounded, it should also be bypassed to analog ground using multiple capacitors (see 5.0 ‘‘Power Supply Considerations’’). AGND and DGND should be at the same potential. VIN0 is shown with an input protection network. Pin 17 is normally left open, but optional ‘‘speedup’’ resistor RSA can be used to reduce the conversion time.
PAGE 13
Applications Information (Continued) One way of describing the A/D’s performance as a function of signal frequency is to make a plot of ‘‘effective bits’’ versus frequency. An ideal A/D converter with no linearity errors or self-generated noise will have a signal-to-noise ratio equal to (6.02n a 1.8) dB, where n is the resolution in bits of the A/D converter. A real A/D converter will have some amount of noise and distortion, and the effective bits can be found by: 7.
PAGE 14
Physical Dimensions inches (millimeters) Order Number ADC10061CMJ/883 NS Package Number J20A Order Number ADC10062CMJ/883 NS Package Number J24A 14
PAGE 15
Physical Dimensions inches (millimeters) (Continued) Order Number ADC10064CMJ/883 NS Package Number J28A Order Number ADC10061BIWM or ADC10061CIWM NS Package Number M20B 15
PAGE 16
Physical Dimensions inches (millimeters) (Continued) Order Number ADC10062BIWM or ADC10062CIWM NS Package Number M24B Order Number ADC10064BIWM or ADC10064CIWM NS Package Number M28B 16
PAGE 17
Physical Dimensions inches (millimeters) (Continued) Order Number ADC10061BIN or ADC10061CIN NS Package Number N20A Order Number ADC10062BIN or ADC10062CIN NS Package Number N24A 17
PAGE 18
ADC10061/ADC10062/ADC10064 10-Bit 600 ns A/D Converter with Input Multiplexer and Sample/Hold Physical Dimensions inches (millimeters) (Continued) Order Number ADC10064BIN or ADC10064CIN NS Package Number N28B LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1.