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TL/H/10559

ADC1061 10-Bit High-Speed mP-Compatible A/D Converter with Track/Hold Function

December 1994

ADC1061 10-Bit High-Speed mP-Compatible

A/D Converter with Track/Hold Function

General Description

Using a modified half-flash conversion technique, the 10-bit

ADC1061 CMOS analog-to-digital converter offers very fast

conversion times yet dissipates a maximum of only 235 mW.

The ADC1061 performs a 10-bit conversion in two lower-

resolution ‘‘flashes’’, thus yielding a fast A/D without the

cost, power dissipation, and other problems associated with

true flash approaches.

The analog input voltage to the ADC1061 is tracked and

held by an internal sampling circuit. Input signals at frequen-

cies from DC to greater than 160 kHz can therefore be digi-

tized accurately without the need for an external sample-

and-hold circuit.

For ease of interface to microprocessors, the ADC1061 has

been designed to appear as a memory location or I/O port

without the need for external interface logic.

Features

1.8 ms maximum conversion time to 10 bits

Low power dissipation: 235 mW (maximum)

Built-in track-and-hold

No external clock required

Single

5V supply

No missing codes over temperature

Applications

Waveform digitizers

Disk drives

Digital signal processor front ends

Mobile telecommunications

Simplified Block and Connection Diagrams

TL/H/10559–2

Dual-In-Line Package

TL/H/10559–1

Top View

Order Number

ADC1061CIJ, ADC1061CIN,

ADC1061CIWM or ADC1061CMJ

See NS Package J20A,

M20B or N20A

Ordering Information

Industrial (

C) Package

ADC1061CIJ J20A

ADC1061CIN N20A

ADC1061CIWM M20B

Military (

125

C) Package

ADC1061CMJ J20A

TRI-STATE

is a registered trademark of National Semiconductor Corporation.

1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

Summary of content (12 pages)

PAGE 1
ADC1061 10-Bit High-Speed mP-Compatible A/D Converter with Track/Hold Function General Description Features Using a modified half-flash conversion technique, the 10-bit ADC1061 CMOS analog-to-digital converter offers very fast conversion times yet dissipates a maximum of only 235 mW. The ADC1061 performs a 10-bit conversion in two lowerresolution ‘‘flashes’’, thus yielding a fast A/D without the cost, power dissipation, and other problems associated with true flash approaches.
PAGE 2
Absolute Maximum Ratings (Notes 1 & 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
PAGE 3
DC Electrical Characteristics The following specifications apply for V a e a 5V, VREF( a ) e 5V, and VREF(b) e GND unless otherwise specified. Boldface limits apply for TA e TJ e TMIN to TMAX; all other limits TA e TJ e 25§ C. Symbol Parameter Conditions Typical (Note 7) Limit (Note 8) Units (Limits) VIN(1) Logical ‘‘1’’ Input Voltage V a e 5.25V 2.0 V (Min) VIN(0) Logical ‘‘0’’ Input Voltage V a e 4.75V 0.8 V (Max) IIN(1) Logical ‘‘1’’ Input Current VIN(1) e 5V 0.005 1.
PAGE 4
AC Electrical Characteristics (Continued) The following specifications apply for V a e a 5V, tr e tf e 20 ns, VREF( a ) e 5V, and VREF(b) e GND unless otherwise specified. Boldface limits apply for TA e TJ e TMIN to TMAX; all other limits TA e TJ e 25§ C.
PAGE 5
Timing Diagrams TL/H/10559 – 7 FIGURE 1. Mode 1. The conversion time (tCONV) is determined by the internal timer. TL/H/10559 – 8 FIGURE 2. Mode 2 (RD Mode). The conversion time (tCRD) includes the sampling time, and is determined by the internal timer.
PAGE 6
Typical Performance Characteristics Zero (Offset) Error vs Reference Voltage Linearity Error vs Reference Voltage TL/H/10559–9 TL/H/10559 – 10 Mode 1 Conversion Time vs Temperature Mode 2 Conversion Time vs Temperature TL/H/10559–11 TL/H/10559 – 12 Pin Descriptions Symbol DVCC, AVCC (1, 6) INT (2) Function These are the digital and analog positive supply voltage inputs.
PAGE 7
connected, in groups, to the sixteen comparators at the right of the diagram. Pin Descriptions (Continued) Symbol GND (10) Function This is the power supply ground pin. The ground pin should be connected to a ‘‘clean’’ ground reference point. DB0 – DB9 (11-20) These are the TRI-STATE output pins. On the left side of the diagram is a string of seven resistors connected between VREF a b VREFb.
PAGE 8
MODE 1 Functional Description (Continued) In this mode, the S/H pin controls the start of conversion. S/H is pulled low for a minimum of 250 ns. This causes the comparators in the ‘‘coarse’’ flash converter to become active. When S/H goes high, the result of the coarse conversion is latched and the ‘‘fine’’ conversion begins. After approximately 1.2 ms (1.8 ms maximum), INT goes low, indicating that the conversion results are latched and can be read by pulling RD low.
PAGE 9
achieved at the minimum sample time. If the sampling time is increased, the source impedance can be larger. If a signal source has a high output impedance, its output should be buffered with an operational amplifier. The operational amplifier’s output should be well-behaved when driving a switched 35 pF/600X load. Any ringing or voltage shifts at the op amp’s output during the sampling period can result in conversion errors.
PAGE 10
6.0 Layout and Grounding All bypass capacitors should be located as close to the converter as possible and should connect to the converter and to ground with short traces. The analog input should be isolated from noisy signal traces to avoid having spurious signals couple to the input. Any external component (e.g., a filter capacitor) connected across the converter’s input should be connected to a very clean ground return point.
PAGE 11
Physical Dimensions inches (millimeters) Order Number ADC1061CIJ or ADC1061CMJ NS Package Number J20A Order Number ADC1061CIWM NS Package Number M20B 11
PAGE 12
ADC1061 10-Bit High-Speed mP-Compatible A/D Converter with Track/Hold Function Physical Dimensions inches (millimeters) (Continued) Lit. Ý 101004 Order Number ADC1061CIN NS Package Number N20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1.