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TL/H/11192

ADC10662/ADC10664 10-Bit 360 ns A/D Converter

with Input Multiplexer and Sample/Hold

January 1995

ADC10662/ADC10664 10-Bit 360 ns

A/D Converter with Input Multiplexer and Sample/Hold

General Description

Using an innovative, patented multistep* conversion tech-

nique, the 10-bit ADC10662 and ADC10664 are 2- and 4-in-

put CMOS analog-to-digital converters offering sub-micro-

second conversion times yet dissipating a maximum of only

235 mW. The ADC10662 and ADC10664 perform a 10-bit

conversion in two lower-resolution ‘‘flashes’’, thus yielding a

fast A/D without the cost, power dissipation, and other

problems associated with true flash approaches. In addition

to standard static performance specifications (Linearity,

Full-Scale Error, etc.) dynamic performance (THD,

S/N) is guaranteed.

The analog input voltage to the ADC10662 and ADC10664

is sampled and held by an internal sampling circuit. Input

signals at frequencies from dc to over 250 kHz can there-

fore be digitized accurately without the need for an external

sample-and-hold circuit.

The ADC10662 and ADC10664 include a ‘‘speed-up’’ pin.

Connecting an external resistor between this pin and ground

reduces the typical conversion time to as little as 360 ns.

For ease of interface to microprocessors, the ADC10662

and ADC10664 have been designed to appear as a memory

location or I/O port without the need for external interface

logic.

Features

Built-in sample-and-hold

Single

5V supply

2- or 4-input multiplexer options

No external clock required

Key Specifications

Conversion time to 10 bits 360 ns typical,

466 ns max over temperature

Sampling Rate 1.5 MHz (min)

Low power dissipation 235 mW (max)

Total harmonic distortion (50 kHz)

60 dB (max)

No missing codes over temperature

Applications

Digital signal processor front ends

Instrumentation

Disk drives

Mobile telecommunications

Ordering Information

ADC10662

Industrial

Package

(

ADC10662CIN N24A Molded DIP

ADC10662CIWM M24B Small Outline

ADC10664

Industrial

Package

(

ADC10664CIN N28B Molded DIP

ADC10664CIWM M28B Small Outline

*U.S. Patent Number 4918449

TRI-STATE

is a registered trademark of National Semiconductor Corporation.

1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

Summary of content (16 pages)

PAGE 1
ADC10662/ADC10664 10-Bit 360 ns A/D Converter with Input Multiplexer and Sample/Hold General Description Features Using an innovative, patented multistep* conversion technique, the 10-bit ADC10662 and ADC10664 are 2- and 4-input CMOS analog-to-digital converters offering sub-microsecond conversion times yet dissipating a maximum of only 235 mW.
PAGE 2
Absolute Maximum Ratings (Notes 1, 2) Storage Temperature Range If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
PAGE 3
DC Electrical Characteristics The following specifications apply for V a e a 5V, VREF( a ) e 5V VREF(b) e GND, and Speed Adjust pin connected to ground through a 14.0 kX resistor (Mode 1) or an 8.26 kX resistor (Mode 2) unless otherwise specified. Boldface limits apply for TA e TJ e TMIN to TMAX; all other limits TA e TJ e a 25§ C. Symbol VIN(1) Parameter Conditions Logical ‘‘1’’ Input Voltage V a e 5.
PAGE 4
AC Electrical Characteristics (Continued) The following specifications apply for V a e a 5V, tr e tf e 20 ns, VREF( a ) e 5V, VREF(b) e GND, and Speed Adjust pin connected to ground through a 14.0 kX resistor (Mode 1) or an 8.26 kX resistor (Mode 2) unless otherwise specified. Boldface limits apply for TA e TJ e TMIN to TMAX; all other limits TA e TJ e a 25§ C.
PAGE 5
Typical Performance Characteristics Zero (Offset) Error vs Reference Voltage Linearity Error vs Reference Voltage Analog Supply Current vs Temperature Digital Supply Current vs Temperature Conversion Time vs Temperature Conversion Time vs Temperature Conversion Time vs Speed-Up Resistor Conversion Time vs Speed-Up Resistor Spectral Response with 100 kHz Sine Wave Input Spectral Response with 100 kHz Sine Wave Input TL/H/11192 – 1 5
PAGE 6
Typical Performance Characteristics (Continued) Signal-to-Noise a THD Ratio vs Signal Frequency Linearity Change vs Speed-Up Resistor Linearity Change vs Speed-Up Resistor Linearity Error Change vs Sample Time TL/H/11192 – 2 6
PAGE 7
TRI-STATE Test Circuits and Waveforms TL/H/11192 – 4 TL/H/11192 – 3 TL/H/11192 – 6 TL/H/11192 – 5 Timing Diagrams TL/H/11192 – 7 FIGURE 1. Mode 1. The conversion time (tCONV) is set by the internal timer.
PAGE 8
Timing Diagrams (Continued) TL/H/11192 – 8 FIGURE 2. Mode 2 (RD Mode). The conversion time (tCRD) includes the sampling time and is determined by the internal timer.
PAGE 9
Connection Diagrams Dual-In-Line Package Dual-In-Line Package TL/H/11192 – 10 Top View TL/H/11192 – 11 Top View Pin Descriptions VREFb, VREF a DVCC, AVCC These are the digital and analog positive supply voltage inputs. They should always be connected to the same voltage source, but are brought out separately to allow for separate bypass capacitors. Each supply pin should be bypassed with a 0.1 mF ceramic capacitor in parallel with a 10 mF tantalum capacitor to ground.
PAGE 10
Functional Description To perform a conversion, the estimator compares the input voltage with the tap voltages on the seven resistors on the left. The estimator decoder then determines which MSB Ladder tap points will be connected to the sixteen comparators on the right. For example, assume that the estimator determines that VIN is between 11/16 and 13/16 of VREF.
PAGE 11
Applications Information Note, however, that linearity and offset errors become larger when lower reference voltages are used. See the Typical Performance Curves for more information. For this reason, reference voltages less than 2V are not recommended. In most applications, VREFb will simply be connected to ground, but it is often useful to have an input span that is offset from ground. This situation is easily accommodated by the reference configuration used in the ADC10662 and ADC10664.
PAGE 12
Applications Information (Continued) TL/H/11192 – 13 FIGURE 4. Typical Connection. Note the multiple bypass capacitors on the reference and power supply pins. If VREFb is not grounded, it should also be bypassed to analog ground using multiple capacitors (see 5.0 ‘‘Power Supply Considerations’’). AGND and DGND should be at the same potential. VIN0 is shown with an input protection network.
PAGE 13
Applications Information (Continued) sus frequency. An ideal A/D converter with no linearity errors or self-generated noise will have a signal-to-noise ratio equal to (6.02n a 1.8) dB, where n is the resolution in bits of the A/D converter. A real A/D converter will have some amount of noise and distortion, and the effective bits can be found by: ic characteristics such as signal-to-noise ratio (SNR) and total harmonic distortion (THD), are quantitative measures of this capability.
PAGE 14
Physical Dimensions inches (millimeters) Order Number ADC10662CIWM NS Package Number M24B 14
PAGE 15
Physical Dimensions inches (millimeters) (Continued) Order Number ADC10664CIWM NS Package Number M28B Order Number ADC10662CIN NS Package Number N24A 15
PAGE 16
ADC10662/ADC10664 10-Bit 360 ns A/D Converter with Input Multiplexer and Sample/Hold Physical Dimensions inches (millimeters) (Continued) Order Number ADC10664CIN NS Package Number N28B LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1.