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TL/H/11390

ADC10731/ADC10732/ADC10734/ADC10738 10-Bit Plus Sign Serial I/O

A/D Converters with Mux, Sample/Hold and Reference

December 1994

ADC10731/ADC10732/ADC10734/ADC10738

10-Bit Plus Sign Serial I/O A/D Converters

with Mux, Sample/Hold and Reference

General Description

This series of CMOS 10-bit plus sign successive approxima-

tion A/D converters features versatile analog input multi-

plexers, sample/hold and a 2.5V band-gap reference. The

1-, 2-, 4-, or 8-channel multiplexers can be software config-

ured for single-ended or differential mode of operation.

An input sample/hold is implemented by a capacitive refer-

ence ladder and sampled-data comparator. This allows the

analog input to vary during the A/D conversion cycle.

In the differential mode, valid outputs are obtained even

when the negative inputs are greater than the positive be-

cause of the 10-bit plus sign output data format.

The serial I/O is configured to comply with the NSC

MICROWIRE

serial data exchange standard for easy in-

terface to the COPS

and HPC

families of controllers,

and can easily interface with standard shift registers and

microprocessors.

Applications

Medical instruments

Portable and remote instrumentation

Test equipment

Features

0V to 5V analog input range with single 5V power

supply

Serial I/O (MICROWIRE compatible)

1-, 2-, 4-, or 8-channel differential or single-ended

multiplexer

Software or hardware power down

Analog input sample/hold function

Ratiometric or absolute voltage referencing

No zero or full scale adjustment required

No missing codes over temperature

TTL/CMOS input/output compatible

Standard DIP and SO packages

Key Specifications

Resolution 10 bits plus sign

Single supply 5V

Power dissipation 37 mW (Max)

Ð In powerdown mode 18 mW

Conversion time 5 ms (Max)

Sampling rate 74 kHz (Max)

Band-gap reference 2.5V

2% (Max)

ADC10738 Simplified Block Diagram

TL/H/11390–1

COPS

, HPC

and MICROWIRE

are trademarks of National Semiconductor Corporation.

1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

Summary of content (30 pages)

PAGE 1
ADC10731/ADC10732/ADC10734/ADC10738 10-Bit Plus Sign Serial I/O A/D Converters with Mux, Sample/Hold and Reference General Description Features This series of CMOS 10-bit plus sign successive approximation A/D converters features versatile analog input multiplexers, sample/hold and a 2.5V band-gap reference. The 1-, 2-, 4-, or 8-channel multiplexers can be software configured for single-ended or differential mode of operation.
PAGE 2
Connection Diagrams for Dual-In-Line and SO Packages TL/H/11390–2 Top View See NS Package Number N16E or M16B TL/H/11390 – 4 Top View See NS Package Number N20A or M20B TL/H/11390–3 Top View See NS Package Number N20A or M20B TL/H/11390 – 5 Top View See NS Package Number N24A or M24B Connection Diagram for the SSOP Package Ordering Information TL/H/11390–34 See NS Package Number MSA20 2 Industrial Temperature Range b 40§ C s TA s a 85§ C Package ADC10731CIN ADC10731CIWM ADC10732CIN ADC10732C
PAGE 3
Absolute Maximum Ratings (Notes 1 & 3) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Operating Ratings (Notes 2 and 3) Operating Temperature Range TMIN s TA s TMAX ADC10731CIN, ADC10731CIWM, ADC10732CIN, ADC10732CIWM, ADC10734CIN, ADC10734CIWM, ADC10734CIMSA, ADC10738CIN, b 40§ C s TA s a 85§ C ADC10738CIWM Supply Voltage (V a e AV a e DV a ) 6.5V Total Reference Voltage (VREF a – VREFb) 6.
PAGE 4
Electrical Characteristics (Continued) The following specifications apply for V a e AV a e DV a e a 5.0 VDC, VREF a e 2.5 VDC, VREFb e GND, VINb e 2.5V for Signed Characteristics, VINb e GND for Unsigned Characteristics and fCLK e 2.5 MHz unless otherwise specified. Boldface limits apply for TA e TJ e TMIN to TMAX; all other limits TA e TJ e a 25§ C.
PAGE 5
Electrical Characteristics (Continued) The following specifications apply for V a e AV a e DV a e a 5.0 VDC, VREF a e 2.5 VDC, VREFb e GND, VINb e 2.5V for Signed Characteristics, VINb e GND for Unsigned Characteristics and fCLK e 2.5 MHz unless otherwise specified. Boldface limits apply for TA e TJ e TMIN to TMAX; all other limits TA e TJ e a 25§ C.
PAGE 6
Electrical Characteristics (Continued) The following specifications apply for V a e AV a e DV a e a 5.0 VDC, VREF a e 2.5 VDC, VREFb e GND, VINb e 2.5V for Signed Characteristics, VINb e GND for Unsigned Characteristics and fCLK e 2.5 MHz unless otherwise specified. Boldface limits apply for TA e TJ e TMIN to TMAX; all other limits TA e TJ e a 25§ C. (Notes 8, 9 and 10) (Continued) Symbol Parameter Conditions Typical (Note 11) Limits (Note 12) 2.5V g 0.5% 2.
PAGE 7
Electrical Characteristics (Continued) The following specifications apply for V a e AV a e DV a e a 5.0 VDC, VREF a e 2.5 VDC, VREFb e GND, VINb e 2.5V for Signed Characteristics, VINb e GND for Unsigned Characteristics and fCLK e 2.5 MHz unless otherwise specified. Boldface limits apply for TA e TJ e TMIN to TMAX; all other limits TA e TJ e a 25§ C. (Note 16) Symbol Parameter Conditions Typical (Note 11) Limits (Note 12) Units (Limits) 3.0 5 2.
PAGE 8
Electrical Characteristics (Continued) Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Note 2: Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifcations and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.
PAGE 9
Electrical Characteristics (Continued) TL/H/11390 – 8 FIGURE 1A. Transter Characteristic TL/H/11390 – 26 FIGURE 1B.
PAGE 10
Leakage Current Test Circuit TL/H/11390 – 9 Typical Performance Characteristics Analog Supply Current (IA a ) vs Temperature Analog Supply Current (IA a ) vs Clock Frequency Digital Supply Current (ID a ) vs Temperature Digital Supply Current (ID a ) vs Clock Frequency Offset Error vs Reference Voltage Offset Error vs Temperature TL/H/11390 – 33 10
PAGE 11
Typical Performance Characteristics (Continued) Linearity Error vs Clock Frequency Linearity Error vs Reference Voltage Linearity Error vs Temperature 10-Bit Unsigned Signal-to-Noise a THD Ratio vs Input Signal Level Spectral Response with 34 kHz Sine Wave Power Bandwidth Response with 380 kHz Sine Wave TL/H/11390 – 23 Typical Reference Performance Characteristics Load Regulation Line Regulation Output Drift vs Temperature (3 Typical Parts) Available Output Current vs Supply Voltage TL/H/11390
PAGE 12
TRI-STATE Test Circuits and Waveforms TL/H/11390–10 TL/H/11390 – 11 TL/H/11390–12 TL/H/11390 – 13 Timing Diagrams TL/H/11390 – 14 FIGURE 2. DI Timing TL/H/11390 – 15 FIGURE 3.
PAGE 13
Timing Diagrams (Continued) TL/H/11390 – 16 FIGURE 4. Delayed DO Timing TL/H/11390 – 17 FIGURE 5. Hardware Power Up/Down Sequence TL/H/11390 – 18 FIGURE 6.
PAGE 14
Timing Diagrams (Continued) TL/H/11390 – 19 Note: If CS is low during power up of the power supply voltages (AV a and DV a ) then CS needs to go high for tCS(H). The data output after the first conversion is invalid. FIGURE 7.
PAGE 15
Note: If CS is low during power up of the power supply voltages (AV a and DV a ) then CS needs to go high for tCS(H). The data output after the first conversion is not valid. FIGURE 8.
PAGE 16
Note: If CS is low during power up of the power supply voltages (AV a and DV a ) then CS needs to go high for tCS(H). The data output after the first conversion is not valid. FIGURE 9.
PAGE 17
Note: If CS is low during power up of the power supply voltages (AV a and DV a ) then CS needs to go high for tCS(H). The data output after the first conversion is not valid. FIGURE 10.
PAGE 18
TABLE I.
PAGE 19
Pin Descriptions CLK DI DO CS PD SARS CH0 – CH7 These are the analog inputs of the MUX. A channel input is selected by the address information at the DI pin, which is loaded on the rising edge of CLK into the address register (see Tables I – III). The voltage applied to these inputs should not exceed AV a or go below GND by more than 50 mV. Exceeding this range on an unselected channel will corrupt the reading of a selected channel. COM This pin is another analog input pln.
PAGE 20
Applications Hints device during power down. CMOS logic levels will give the least amount of current drain (3 mA). TTL logic levels will increase the total current drain to 200 mA. The ADC10731/2/4/8 use successive approximation to digitize an analog input voltage. The DAC portion of the A/D converters uses a capacitive array and a resistive ladder structure. The structure of the DAC allows a very simple switching scheme to provide a versatile analog input multiplexer.
PAGE 21
FIGURE 11.
PAGE 22
Applications Hints (Continued) output noise can be obtained by increasing the output capacitance. A 100 mF capacitor will yield a typical noise floor of 200 nV/0Hz. The pseudo-differential and differential multiplexer modes allow for more flexibility in the analog input voltage range since the ‘‘zero’’ reference voltage is set by the actual voltage applied to the assigned negative input pin.
PAGE 23
Applications Hints (Continued) 4 Single-Ended 4 PsuedoDifferential 2 Differential 2 Single-Ended and 1 Differential TL/H/11390 – 27 FIGURE 12. Analog Input Multiplexer Options a. Ratiometric Using the Internal Reference TL/H/11390 – 29 b. Absolute Using a 4.096V Span TL/H/11390 – 30 FIGURE 13.
PAGE 24
Applications Hints (Continued) 3.4 Optional Adjustments 3.5 The Input Sample and Hold 3.4.1 Zero Error The ADC10731/2/4/8’s sample/hold capacitor is implemented in the capacitor array. After the channel address is loaded, the array is switched to sample the selected positive analog input. The sampling period for the assigned positive input is maintained for the duration of the acquisition time (tA) 4.5 clock cycles. This acquisition window of 4.
PAGE 25
Applications Hints (Continued) (R1 a R2)//R3 s 1k TL/H/11390 – 31 Note 1: Diodes are 1N914. Note 2: The protection diodes should be able to withstand the output current of the op amp under current limit. FIGURE 15. Protecting the Analog Inputs *1% resistors TL/H/11390 – 32 FIGURE 16. Zero-Shift and Span-Adjust for Signed or Unsigned, Single-Ended Multiplexer Assignment, Signed Analog Input Range of 0.5V s VIN s 4.
PAGE 26
PAGE 27
Physical Dimensions inches (millimeters) Order Number ADC10731CIWM NS Package Number M16B Order Number ADC10732CIWM and ADC10734CIWM NS Package Number M20B 27
PAGE 28
Physical Dimensions inches (millimeters) (Continued) Order Number ADC10738CIWM NS Package Number M24B Order Number ADC10734CIMSA NS Package Number MSA20 28
PAGE 29
Physical Dimensions inches (millimeters) (Continued) Order Number ADC10731CIN NS Package Number N16E Order Number ADC10732CIN and ADC10734CIN NS Package Number N20A 29
PAGE 30
ADC10731/ADC10732/ADC10734/ADC10738 10-Bit Plus Sign Serial I/O A/D Converters with Mux, Sample/Hold and Reference Physical Dimensions inches (millimeters) (Continued) Order Number ADC10738CIN NS Package Number N24A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1.